SPECIFICATION
Product Type : EPD
Model Number :
Screen Size: 4.2"
Color: Black and White
Display Resolution: 400*300
Description :
: 2017.03.01
10F, International Science & Technology Building, Fuhong Rd,
a
Futian District, Shenzhen, China
Website: www..com
4.2" e-Paper
Revision History
Rev.
1.0
Issued Date
May.05.2015 Preliminary
Revised Contents
1.1.
Jul.27.2015
1.2
1.3
1.4
2.0
Aug.21.2015
Nov.03.2015
Nov.11.2015
Mar.01.2017
1.
1.
2.
1.
1.
1.
In part note 9-2: Modify each update interval time should be minimum at 150
seconds to 180 seconds.
In part 8: Modify typical operating sequence.
In part 12: Delete block diagram.
In part 6: Delete command 70h.
In part 4: Modify the mechanical drawing of EPD module.
In part 7-5): Modify Reference Circuit.
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TECHNICAL SPECIFICATION
CONTENTS
ITEM
Cover
Revision History
Contents
Application
Features
Mechanical Specifications
Mechanical Drawing of EPD module
Input/Output Terminals
Command Table
Electrical Characteristics
Typical Operating Sequence
Optical Characteristics
Handling, Safety and Environment Requirements
Reliability test
Point and line standard
Packing
NO.
-
-
-
1
2
3
4
5
6
7
8
9
10
11
12
13
4.2" e-Paper
PAGE
1
2
3
4
4
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5
6
8
27
35
39
41
42
44
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4.2" e-Paper
1. Over View
The display is a TFT active matrix electrophoretic display, with interface and a reference system design. The 4.2” active area
contains 400×300 pixels, and has 1-bit white/black full display capabilities. An integrated circuit contains gate buffer, source
buffer, interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM, and border are supplied with each panel.
2. Features
High contrast
High reflectance
Ultra wide viewing angle
Ultra low power consumption
Pure reflective mode
Bi-stable
Commercial temperature range
Landscape, portrait mode
Antiglare hard-coated front-surface
Low current deep sleep mode
On chip display RAM
Waveform stored in On-chip OTP
Serial peripheral interface available
On-chip oscillator
On-chip booster and regulator control for generating VCOM, Gate and source driving voltage
I2C Signal Master Interface to read external temperature sensor
Available in COG package IC thickness 300um
3. Mechanical Specifications
Parameter
Screen Size
Display Resolution
Active Area
Pixel Pitch
Pixel Configuration
Outline Dimension
Weight
Specifications
4.2
400(H)×300(V)
84.8(H)×63.6 (V)
0.212×0.212
Square
91.0(H)×77.0(V) ×1.18(D)
13.76±0.5
Unit
Inch
Pixel
mm
mm
mm
g
Remark
Dpi: 120
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4.2" e-Paper
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B
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R
U
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I
F
S
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N
I
W
A
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Y
T
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Q
S
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I
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C
E
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G
N
I
T
I
D
U
A
N
G
I
S
E
D
T
H
G
I
E
W
P
U
L
L
A
E
C
N
A
T
S
B
U
S
L
A
I
R
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A
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T
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N
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Q
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M
A
N
n
o
i
t
a
r
e
n
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G
.
o
N
f
o
.
O
N
(rtv area)
1.35 max
C
I
V
T
R
(without protective film)
S
S
A
L
G
C
E
1.18±0.1
1.5max
S
P
L
P
F
(ec area)
1.33 max
4. Mechanical Drawing of EPD module
9
.
0
2
.
1
1
72.3±0.2
69±0.2 FPL
67.1
D
P
E
2
0
±
1
9
.
.
S
P
2
0
±
2
9
8
.
L
P
F
2
A
A
1
.
.
0
±
8
.
6
8
0
±
8
4
8
.
B
1
1.2
0.9
A
63.6±0.1 AA
67.1
69±0.2 FPL
71.4±0.2 PS
77±0.2 EPD
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Remark
Keep Open
Note 5-5
Note 5-4
Note 5-3
Note 5-2
Note 5-1
5. Input/Output Terminals
5-1) Pin out List
Pin #
Type
Single
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC
GDR
RESE
VGL
VGH
TSCL
O
O
C
C
O
No connection and do not connect with other NC pins
N-Channel MOSFET Gate Drive Control
Current Sense Input for the Control Loop
Negative Gate driving voltage
Positive Gate driving voltage
I2C Interface to digital temperature sensor Clock pin
I/O
TSDA
I2C Interface to digital temperature sensor Date pin
I
O
I
I
I
I/O
I/O
I
I
C
C
C
C
C
C
C
BS1
BUSY
RES #
D/C #
CS #
D0
D1
Bus selection pin
Busy state output pin
Reset
Data /Command control pin
Chip Select input pin
serial clock pin (SPI)
serial data pin (SPI)
VDDIO
Power for interface logic pins
VCI
VSS
VDD
VPP
VSH
Power Supply pin for the chip
Ground
Core logic power pin
Power Supply for OTP Programming
Positive Source driving voltage
PREVGH
Power Supply pin for VGH and VSH
VSL
Negative Source driving voltage
PREVGL
Power Supply pin for VCOM, VGL and VSL
VCOM
VCOM driving voltage
Note 5-1: This pin (CS#) is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when
CS# is pulled Low.
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Note 5-2: This pin (D/C#) is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data will be
interpreted as data. When the pin is pulled Low, the data will be interpreted as command.
Note 5-3: This pin (RES#) is reset signal input. The Reset is active Low.
Note 5-4: This pin (BUSY) is Busy state output pin. When Busy is low, the operation of chip should not be interrupted and any
commands should not be issued to the module. The driver IC will put Busy pin low when the driver IC is working such
as:
- Outputting display waveform; or
- Programming with OTP
- Communicating with digital temperature sensor
Note 5-5: This pin (BS1) is for 3-line SPI or 4-line SPI selection. When it is “Low”, 4-line SPI is selected. When it is “High”, 3-line
SPI (9 bits SPI) is selected. Please refer to below Table.
Table: Bus interface selection
BS1 MPU Interface
L
H
4-lines serial peripheral interface (SPI)
3-lines serial peripheral interface (SPI) – 9 bits SPI
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C/D: 0: Command 1: Data
D7~D0: -: Don’t care
#: Valid Data
W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers
0
0
0
0
0
0
0
0
0
0
6. Command Table
W/R: 0: Write cycle 1: Read cycle
#
Command
1
Panel Setting (PSR)
2
3
4
5
6
7
Power
(PWR)
Setting
Power OFF(POF)
Power
Sequence
Setting(PFS)
Power ON(PON)
Power
Measure(PMES)
OFF
ON
Booster
Start(BTST)
Soft
8 Deep Sleep
9
Start
Display
Transmission
1(DTM1,
white/black Data)
(x-byte command)
10 Data Stop
11
12
Display
Refresh(DRF)
VCOM LUT(LUTC)
(45-byte command,
structure of bytes
2~7 repeated)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
1
1
1
1
1
0
0
1
0
0
0
1
1
1
0
1
0
1
1
1
0
1
0
#
0
-
-
-
-
-
0
0
-
0
0
0
#
#
-
0
1
0
#
..
#
0
#
0
#
0
-
-
-
-
-
0
0
-
0
0
0
#
#
-
0
0
0
#
..
#
0
-
0
#
0
-
-
#
#
#
0
0
#
0
0
0
#
#
#
0
1
0
#
..
#
0
-
0
#
0
-
-
#
#
#
0
0
#
0
0
0
#
#
#
0
0
1
#
..
#
1
-
1
#
0
-
-
#
#
#
0
0
-
0
0
0
#
#
#
0
0
0
#
..
#
0
-
0
#
0
-
#
#
#
#
0
0
-
1
1
1
#
#
#
1
1
0
#
..
#
0
-
0
#
0
#
#
#
#
#
1
1
-
0
0
1
#
#
#
1
0
0
#
..
#
0
-
1
#
1
#
#
#
#
#
0
1
-
0
1
0
#
#
#
1
1
0
#
..
#
1
-
0
0
0
0
1
0
0
0
0
0
Default
00h
0Fh
RES[1:0],REG,KW/R,UD,
SHL,SHD_N,RST_N
01h
VDS_EN,VDG_EN
03h
VCOM_HV,VGHL_LV[1:0] 00h
26h
VDH[5:0]
26h
VDL[5:0]
VDHR[5:0]
03h
02h
03h
T_VDS_OF
BT_PHA[7:0]
BT_PHB[7:0]
BT_PHC[5:0]
Check code
B/W Pixel Data (400×300)
KPXL[1:8]
..
KPXL[n-1:n]
00h
04h
05h
06h
17h
17h
17h
07h
A5h
10h
00h
…
00h
11h
00h
12h
20h
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