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5.83inch e-Paper B Datasheet(5.83inch_e-Paper_b_Specification).pdf

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SPECIFICATION Product Type : EPD Model Number : 5.83inch e-Paper HAT (B) Description : Screen Size: 5.83" Color: Black, White Red Display Resolution: 600*448 10F, International Science & Technology Building, Fuhong Rd, Futian District, Shenzhen, China Website EN: www.waveshare.com Website CN: www.waveshare.net
5.83inch e-Paper (B) Revision History Rev. 1.0 Issued Date Jul.19.2017 Preliminary Revised Contents 2/40
5.83inch e-Paper (B) TECHNICAL SPECIFICATION CONTENTS ITEM Cover Revision History Contents Over View Features Mechanical Specifications Mechanical Drawing of EPD module Input/Output Terminals Command Table Electrical Characteristics Typical Operating Sequence Optical Characteristics Handling, Safety and Environment Requirements Reliability test Point and line standard Packing NO. - - - 1 2 3 4 5 6 7 8 9 10 11 12 13 PAGE 1 2 3 4 4 4 5 6 8 24 30 34 36 37 39 40 3/40
5.83inch e-Paper (B) 1. Over View The display is a TFT active matrix electrophoretic display, with interface and a reference system design. The 5.83” active area contains 600×448 pixels, and has 3-bit white/black/red full display capabilities. An integrated circuit contains gate buffer, source buffer, interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM and border are supplied with each panel. 2. Features  High contrast  High reflectance  Ultra wide viewing angle  Ultra low power consumption  Pure reflective mode  Bi-stable  Commercial temperature range  Landscape, portrait mode  Antiglare hard-coated front-surface  Low current sleep mode  On chip display RAM  Serial peripheral interface available  On-chip oscillator  On-chip booster and regulator control for generating VCOM, Gate and source driving voltage  I2C Signal Master Interface to read external temperature sensor  Available in COG package IC thickness 280um 3. Mechanical Specifications Parameter Screen Size Display Resolution Active Area Pixel Pitch Pixel Configuration Outline Dimension Weight Specifications 5.83 600(H) × 448(V) 118.80(H) × 88.26(V) 0.198 × 0.197 Rectangle 125.40(H) × 99.50(V) × 1.18(D) 28±0.5 Unit Inch Pixel mm mm mm g Remark Dpi:128 4/40
4. Mechanical Drawing of EPD module 5.83inch e-Paper (B) E T O N T H G I E W P U L L A E C N A T S B U S L A I R E T A M Y T I T N A U Q E M A N n o i t a r e n e G . o N f o . O N S E M A N E L A C S m m T I N U R E B M U N E R U G I F S G N I W A R D Y T I L A U Q S C I N H C E T G N I T I D U A N G I S E D T N U O M A 1 / 1 E G A P E T A D K N I r e b m u n e l i f e h t e g n a h C S R E B M U N N G I S 5/40 2 C 1 C 2 R 1 R 1 U 4 2 1 B
5.83inch e-Paper (B) 5. Input/Output Terminals 5-1) Pin out List Pin # Type Single Description Remark 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I O O C C O I/O I O I I I I/O I/O I I C O C C C C C MFCSB GDR RESE VGL VGH TSCL TSDA BS1 BUSY RES # D/C # CS # D0 D1 VDDIO VCI VSS VDD FMSDO VSH PREVGH VSL PREVGL VCOM Serial communication chip select. It would bypass to MFCSB by R61H command. N-Channel MOSFET Gate Drive Control Current Sense Input for the Control Loop Negative Gate driving voltage Positive Gate driving voltage I2C Interface to digital temperature sensor Clock pin I2C Interface to digital temperature sensor Date pin Bus selection pin Busy state output pin Reset Data /Command control pin Chip Select input pin serial clock pin (SPI) serial data pin (SPI) Power for interface logic pins Power Supply pin for the chip Ground Core logic power pin Serial communication data output. It would bypass to FMSDO by R61H command. Positive Source driving voltage Power Supply pin for VGH and VSH Negative Source driving voltage Power Supply pin for VCOM, VGL and VSL VCOM driving voltage Note 5-5 Note 5-4 Note 5-3 Note 5-2 Note 5-1 Note 5-1: This pin (CS#) is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled Low. Note 5-2: This pin (D/C#) is Data/Command control pin connecting to the MCU. When the pin is pulled High, the data will be interpreted 6/40
5.83inch e-Paper (B) as data. When the pin is pulled Low, the data will be interpreted as command. Note 5-3: This pin (RES#) is reset signal input. The Reset is active Low. Note 5-4: This pin (BUSY) is Busy state output pin. When Busy is low the operation of chip should not be interrupted and any commands should not be issued to the module. The driver IC will put Busy pin low when the driver IC is working such as: - Outputting display waveform; or - Communicating with digital temperature sensor Note 5-5: This pin (BS1) is for 3-line SPI or 4-line SPI selection. When it is “Low”, 4-line SPI is selected. When it is “High”, 3-line SPI (9 bits SPI) is selected. Please refer to below Table. Table: Bus interface selection BS1 MPU Interface L H 4-lines serial peripheral interface (SPI) 3-lines serial peripheral interface (SPI) – 9 bits SPI 7/40
5.83inch e-Paper (B) 6. Command Table # Command 1 Panel setting(PSR) Sequence 2 3 4 5 6 Power setting (PWR) OFF Power OFF(POF) Power Setting(PFS) Power ON(PON) Booster Soft Start (BTST) 7 Deep sleep(DSLP) Data Start Transmission 1 (DTM1) (x-byte command) 8 9 Data Stop(DSP) 11 12 10 Display Refresh (DRF) Image Process Command (IPC) VCOM LUT(LUTC) (221-byte command, bytes 2-12 repeated 20 times) LUT Blue(LUTB) (261-byte command, bytes 2-14 repeated 20 times) LUT White (LUTW) (261-byte command, bytes 2~14 repeated 20 times) 14 13 W/R C/D D7 D6 D5 D4 D3 D2 D1 D0 Registers 0 0 0 0 0 0 0 0 0 0 RES[1],RES[0], LUT_EN, UD,SHL,SHD_N,RST_N VCM_HZ EDATA_SEL, EDATA_SET, VSource_LV_EN, VSource _EN, VGate_EN VGHL_LV[1:0] VDPS_LV[5:0] VDNS_LV[5:0] T_VDS_OFF[1:0] BT_PHA[7:0] BT_PHB[7:0] BT_PHC[5:0] Check code KPixel1[2:0], KPixel2[2:0] .. Kpixel[2M-1][2:0], Kpixel[2M][2:0] Data_flag IP_EN, IP_SEL[2:0] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 1 1 1 1 0 0 1 0 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 # - 0 - - - - 0 0 - 0 0 # # 0 1 0 - .. - 0 # 0 0 - 0 # - 0 - - - - 0 0 - 0 0 # # 0 0 0 # .. # 0 - 0 0 - 0 # - 0 # - # # 0 0 # 0 0 # # # 0 1 0 # .. # 0 - 0 0 - 1 - # 0 # - # # 0 0 # 0 0 # # # 0 0 1 # .. # 1 - 1 1 # 0 # - 0 - - # # 0 0 - 0 0 # # # 0 0 0 - .. - 0 - 0 0 - 0 # - 0 # # # # 0 0 - 1 1 # # # 1 1 0 # .. # 0 - 0 0 # 0 # - 0 # # # # 1 1 - 0 1 # # # 1 0 0 # .. # 0 - 1 1 # 0 # - 1 # # # # 0 1 - 0 0 # # # 1 1 0 # .. # 1 - 0 1 # 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 8/40 Default 00h 0Fh 00h 01h 07h 01h 05h 05h 02h 03h 00h 04h 06h 00h 00h 00h 07h A5h 10h 00h .. 00h 11h - 12h 13h 00h 20h 21h 22h
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