INTRODUCTION
FT5X06
True Multi-Touch
Capacitive Touch Panel Controller
The FT5x06 Series ICs are single-chip capacitive touch panel controller ICs with a built-in 8 bit Micro-controller unit (MCU).They
adopt the mutual capacitance approach, which supports true multi-touch capability. In conjunction with a mutual capacitive touch
panel, the FT5x06 have user-friendly input functions, which can be applied on many portable devices, such as cellular phones, MIDs,
netbook and notebook personal computers.
The FT5x06 series ICs include FT5206/FT5306/FT5406, the difference of their specifications will be listed individually in this
datasheet.
FEATURES
Mutual Capacitive Sensing Techniques
True Multi-touch with up to 10 Points of Absolution X and
Y Coordinates
Immune to RF Interferences
Auto-calibration:
Insensitive
Environmental Variations
to Capacitance
and
Supports up to 28 Transmit Lines and 16 Receive Lines
Supports up to 8.9” Touch Screen
Full Programmable Scan Sequences with Individual
Adjustable Receive Lines and Transmit Lines to Support
Various Applications
High Report Rate: More than 100Hz
Touch Resolution of 100 Dots per Inch (dpi) or above --
depending on the Panel Size
Optional Interfaces :I2C/SPI
2.8V to 3.6V Operating Voltage
Supports 1.8V/3.3V IOVCC
Capable of Driving Single Channel (transmit/receive)
Resistance: Up to15K Ω
Capable of Supporting Single Channel (transmit/receive)
Capacitance: 60 pF
Optimal Sensing Mutual Capacitor: 1pF~4pF
12-Bit ADC Accuracy
Built-in MCU with 32KB Program Memory, 6KB Data
Memory and 256B Internal Data Space
11 Internal Interrupt Sources and 2 External Interrupt
Sources
3 Operating Modes
Active
Monitor
Hibernate
Operating Temperature Range: -40°C to +85°C
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Document Number: D-FT5X06-1005 (Version: 0.1) Revised June 11, 2010
From No.: F-OI-RD01-03-03-B
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TABLE OF CONTENTS
FT5X06
DATASHEET
1.1
OVERVIEW.............................................................................................................................................................. 1
TYPICAL APPLICATIONS ....................................................................................................................................... 1
FUNCTIONAL DESCRIPTION ................................................................................................................................. 1
ARCHITECTURAL OVERVIEW................................................................................................................................. 1
2.1
2.2 MCU ................................................................................................................................................................ 2
OPERATION MODES ............................................................................................................................................ 2
2.3
HOST INTERFACE................................................................................................................................................ 3
2.4
SERIAL INTERFACE ............................................................................................................................................. 3
2.5
I2C........................................................................................................................................................... 3
2.5.1
2.5.2 SPI........................................................................................................................................................... 4
ELECTRICAL SPECIFICATIONS .................................................................................................................................... 6
ABSOLUTE MAXIMUM RATINGS.................................................................................................................................. 6
DC CHARACTERISTICS............................................................................................................................................. 8
AC CHARACTERISTICS............................................................................................................................................. 8
I/O PORTS CIRCUITS.............................................................................................................................................. 9
PIN CONFIGURATIONS ............................................................................................................................................... 9
3.1
3.2
3.3
3.4
PACKAGE INFORMATION.......................................................................................................................................... 12
PACKAGE INFORMATION OF QFN-5X5-40L PACKAGE .................................................................................................... 12
PACKAGE INFORMATION OF QFN-6X6-48L PACKAGE .................................................................................................... 13
PACKAGE INFORMATION OF QFN-8X8-68L PACKAGE .................................................................................................... 14
ORDER INFORMATION............................................................................................................................................ 15
5.1
5.2
5.3
5.4
1
2
3
4
5
FocalTech Systems Co., Ltd · www.focaltech-systems.com · support@focaltech-systems.com
Document Number: D-FT5X06-1005 (Version: 0.1) Revised June 11, 2010
From No.: F-OI-RD01-03-03-B
FT5x06
DATASHEET
1
1.1
OVERVIEW
Typical Applications
FT5x06 accommodate a wide range of applications with a set of buttons up to a 2D touch sensing device, their typical applications
are listed below.
Mobile phones, smart phones
MIDs
Netbook
Navigation systems, GPS
Game consoles
Car applications
POS (Point of Sales) devices
Portable MP3 and MP4 media players
Digital cameras
FT5x06 Series ICs support 2.8”~8.9” Touch Panel, users may find out their target IC from the specs. listed in the following table,
Model Name
FT5206GE1
FT5306DE4
FT5406EE8
Panel
TX
15
20
28
RX
10
12
16
Type
QFN5*5
QFN6*6
QFN8*8
Package
Pin
40
48
68
Size
0.75-P0.4
0.75-P0.4
0.75-P0.4
Touch Panel Size
2.8"~3.8"
4.3"~7"
7"~8.9"
FUNCTIONAL DESCRIPTION
2
2.1
Figure2-1 shows the overall architecture for the FT5x06.
Architectural Overview
Figure 2-1 FT5x06 System Architecture Diagram
The FT5x06 is comprised of five main functional parts listed below,
Touch Panel Interface Circuits
The main function for the AFE and AFE controller is to interface with the touch panel. It scans the panel by sending AC signals to the
panel and processes the received signals from the panel. So, it supports both Transmit (TX) and Receive (RX) functions. Key
parameters to configure this circuit can be sent via serial interfaces, which will be explained in detail in a later section.
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FT5x06
DATASHEET
8051-based MCU
This MCU is 8051 compatible with some enhancements. For instant, larger program and data memories are supported. In addition, a
Multiplication-Division unit (MDU) is implemented to speed up the touch detection algorithms. Furthermore, a Flash ROM is
implemented to store programs and some key parameters.
Complex signal processing algorithms are implemented with firmware running on this MCU to process further the received signals in
order to detect the touches reliably. Communication protocol software is also implemented on this MCU to exchange data and
control information with the host processor.
External Interface
I2C/SPI: an interface for data exchange with host
INT: an interrupt signal to inform the host processor that touch data is ready for read
WAKE: an interrupt signal for the host to change F5x06 from Hibernate to Active mode
/RST: an external low signal reset the chip.
A watch dog timer is implemented to ensure the robustness of the chip.
A voltage regulator to generate 1.8V for digital circuits from the input VDD3 supply
2.2 MCU
This section describes some critical features and operations supported by the 8051 compatible MCU.
Figure 2-2 shows the overall structure of the MCU block. In addition to the 8051 compatible MCU core, we have added the following
circuits,
MDU: A 16x8 Multiplier and A 32/32 Divider
Program Memory: 32KB Flash
Data Memory: 6KB SRAM
Real Time Clock (RTC): A 32KHz RC Oscillator
Timer: A number of timers are available to generate different clocks
Master Clock: 24/ 48MHz from A 48MHz RC Oscillator
Clock Manager: To control various clocks under different operation conditions of the system
Figure 2-2 MCU Block Diagram
Operation Modes
2.3
FT5x06 operates in the following three modes:
Active Mode
When in this mode, FT5x06 actively scans the panel. The default scan rate is 60 frames per second. The host processor can configure
FT5x06 to speed up or to slow down.
Monitor Mode
When in this mode, FT5x06 scans the panel at a reduced speed. The default scan rate is 25 frames per second and the host processor
can increase or decrease this rate. When in this mode, most algorithms are stopped. A simpler algorithm is being executed to
determine if there is a touch or not. When a touch is detected, FT5x06 shall enter the Active mode immediately to acquire the touch
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FT5x06
DATASHEET
information quickly. During this mode, the serial port is closed and no data shall be transferred with the host processor.
Hibernate Mode
In this mode, the chip is placed in a power down mode. It shall only respond to the “WAKE” signal from the host processor. The chip
therefore consumes very little current, which help prolong the standby time for the portable devices.
2.4
Figure 2-3 shows the interface between a host processor and FT5x06. This interface consists of the following three sets of signals:
Serial Interface
Interrupt from FT5x06 to the Host
Wake-up Signal from the Host to FT5x06
Host Interface
TP Module
TP
TX
RX
FT5x06
Serial
Interface
/INT
/WAKE
Host
Figure 2-3 Host Interface Diagram
The serial interfaces of FT5x06 is I2C or SPI. The details of this interface are described in detail in Section 2.5. The interrupt signal
(/INT) is used for FT5x06 to inform the host that data are ready for the host to receive. The /WAKE signal is used for the host to wake
up FT5x06 from the Hibernate mode. After exiting the Hibernate mode, FT5x06 shall enter the Active mode.
2.5
FT5x06 supports the I2C or SPI interfaces, which can be used by a host processor or other devices.
Serial Interface
2.5.1 I2C
The I2C is always configured in the Slave mode. The data transfer format is shown in Figure 2-4.
Figure 2-4 I2C Serial Data Transfer Format
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FT5x06
DATASHEET
Figure 2-5 I2C master write, slave read
Table 2-1 lists the meanings of the mnemonics used in the above figures.
Figure 2-6 I2C master read, slave write
Mnemonics
S
A[6:0]
W
R
C
P
Table 2-1 Mnemonics Description
Description
I2C Start or I2C Restart
Slave address
A[6:4]: 3’b011
A[3:0]: data bits are identical to those of I2CCON[7:4] register.
1’b0: Write
1’b1: Read
ACK
STOP: the indication of the end of a packet (if this bit is missing, S will indicate the end
of the current packet and the beginning of the next packet)
I2C Interface Timing Characteristics is shown in Table 2-2.
Table 2-2 I2C Timing Characteristics
Parameter
SCL frequency
Bus free time between a STOP and START condition
Hold time (repeated) START condition
Data setup time
Setup time for a repeated START condition
Setup Time for STOP condition
Unit
KHz
us
us
ns
us
us
Min
0
4.7
4.0
250
4.7
4.0
Max
400
\
\
\
\
\
2.5.2 SPI
SPI is a 4 wire serial interface. The following is a list of the 4 wires:
SCK: serial data clock
MOSI: data line from master to slave
MISO: data line from slave to master
SLVESEL: active low select signal
SPI transfers data at 8bit packets. The phase relationship between the data and the clock can be defined by the two registers: phase
and polck. Some data transfer examples can be found in Figure 2-7 to Figure 2-10.
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FT5x06
DATASHEET
Figure 2-7 SPI Data Transfer Format (Phase=0, POLCK=0)
Figure 2-8 SPI Data Transfer Format (PHASE=0, POLCK=1)
Figure 2-9 SPI Data Transfer Format (Phase=1, POLCK=0)
Figure 2-10 SPI Data Transfer Format (Phase=1, POLCK=1)
SPI can be configured into either Master or Slave mode via the MAS bit of the SPI0CON register. When in the Master mode, the SPI
needs to supply the data clock, whose frequency relationship with the Master clock can be set by CLKDVD bits of the SPI0CON
register. When it is configured in the Slave mode, the clock, SCK, is supplied by the external Master. The maximum data clock
frequency must not be higher than
mclkF
8
.
SPI Interface Timing Characteristics is shown in the following Figure2-11,Figure2-12 and Table 2-3.
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FT5x06
DATASHEET
Figure 2-11 SPI Timing PHASE = 0
Figure 2-12 SPI Timing PHASE = 1
Tms: The time between the first cycle of SCK and the beginning of the valid SLVSEL in the master mode
Tme: The time between the end of last cycle of SCK and the beginning of invalid SLVSEL in the master mode
Tml: The minimum trailing time of the invalid SLVSEL in the master mode
Tss0: The time between the beginning of the valid SLVSEL and the first bit valid output data in the slave mode and when phase =
0
Table 2-3 SPI Timing Characteristics
Symbol
Tms
Tme
Tml
Tss0
Unit
Cycle of SCK
Cycle of SCK
Cycle of SCK
Cycle of SPI internal clock
3
3.1
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Item
Power Supply Voltage 1
Power Supply Voltage 2
I/O Power Supply Voltage
Operating Temperature
Storage Temperature
VDDA - VSSA
VDD3 – VSS
Vt
Topr
Tstg
Table 3-1 Absolute Maximum Ratings
Symbol
Value
Unit
V
V
V
℃
℃
-0.3 ~ +3.6
-0.3 ~ +3.6
-0.3 ~ IOVCC + 0.3
-40 ~ +85
-55 ~ +110
Value
1
1
1
4
Note
1, 2
1, 3
1,4
1
1
Notes
1、If used beyond the absolute maximum ratings, FT5x06 may be permanently damaged. It is strongly recommended that the device
be used within the electrical characteristics in normal operations. If exposed to the condition not within the electrical characteristics,
it may affect the reliability of the device.
2、Make sure VDDA(high)≥VSSA (low)
3、Make sure VDD (high)≥VSS (low)
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