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2.9inch e-Paper (D) 数据手册(2.9inch_e-Paper_(D)_Specification).pdf
1.2 Features
1.3 Mechanical Specifications
123.pdf
3. Electrical Characteristics
3.3-2) MCU Interface
3.3-2-2) MCU Serial Interface (4-wire SPI)
3.3-2-3) MCU Serial Interface (3-wire SPI)
3.3-3) Timing Characteristics of Series Interface
未标题
2.9inch e-Paper (D)
Specifications
Customer
Standard
Description
Model Name
Date
2.9” FLEXIBLE E-PAPER DISPLAY
2.9inch e-Paper (D)
2018/10/30
Revision
1.1
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Table of Contents
1. General Description....................................................
1.1 Overview............................................................
1.2 Feature ..............................................................
1.3 Mechanical Specification........................................
1.4 Mechanical Drawing of EPD module .......................
1.5 Input/Output Terminals........................................
1.6 Reference Circuit ................................................
2. Environmental............................................................
2.1 Handling, Safety and Environmental Requirements...
2.2 Reliability test.....................................................
3. Electrical Characteristics .............................................
3.1 Absolute maximum rating.....................................
3.2 Panel DC Characteristics.......................................
3.3 Panel AC Characteristics........................................
3.4 Power Consumption..............................................
4. Typical Operating Sequence.........................................
4.1 Normal Operation Flow.........................................
4.2 Reference Program Code......................................
5. Command Table.........................................................
6. Optical characteristics.................................................
6.1 Specifications ....................................................
6.2 Definition of contrast ratio...................................
6.3 Reflection Ratio..................................................
6.4 Bi-stability ........................................................
7. Point and line standard...............................................
8. Packing.....................................................................
9. Precautions ................................................................
4
4
4
4
5
6
8
9
9
10
12
12
12
13
16
17
17
19
21
41
41
41
42
42
43
44
45
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Revision History
Rev. Issued Date
1.0 Sep.11.2018 Preliminary
Revised Contents
1.1 Oct.30.2018
1. In Part 1.6): Modify Reference Circuit
2. In part 1-7): Updating the website address of DESPI.
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1. General Description
1.1 Over View
The display which use the flexible substrate as base plate, with interface and a
reference system design. The 2.9” active area contains 296×128 pixels, and has
1-bit white/black full display capabilities. An integrated circuit contains gate buffer,
source buffer, interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM,
and border are supplied with each panel.
1.2 Features
• High contrast
• High reflectance
• Ultra wide viewing angle
• Ultra low power consumption
• Pure reflective mode
• Bi-stable
• Commercial temperature range
• Landscape, portrait mode
• Antiglare hard-coated front-surface
• Low current deep sleep mode
• On chip display RAM
• Waveform stored in On-chip OTP
• Serial peripheral interface available
• On-chip oscillator
• On-chip booster and regulator control for generating VCOM, Gate and source
driving voltage
• I2C Signal Master Interface to read external temperature sensor
• Available in COG package IC thickness 280um
1.3 Mechanical Specifications
Parameter
Screen Size
Display Resolution
Active Area
Pixel Pitch
Pixel Configuration
Outline Dimension
Weight
Specifications
2.9
296(H)×128(V)
66.9(H)×29.06(V)
0.227×0.226
Square
79.0(H)×36.7(V) ×0.34(D)
2±0.5
Unit
Inch
Pixel
mm
mm
mm
g
Remark
Dpi: 112
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：
：
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1. 5 Input/Output Terminals
1.5-1) Pin out List
Pin # Type Single
Description
Remark
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC
No connection and do not connect with other NC pins Keep Open
O
O
C
C
O
GDR
RESE
VGL
VGH
TSCL
I/O
TSDA
I
O
I
I
I
BS1
BUSY
RES #
D/C #
CS #
I/O
I/O
D0
D1
N-Channel MOSFET Gate Drive Control
Current Sense Input for the Control Loop
Negative Gate driving voltage
Positive Gate driving voltage
I2C Interface to digital temperature sensor Clock pin
I2C Interface to digital temperature sensor Date pin
Bus selection pin
Busy state output pin
Reset
Data /Command control pin
Chip Select input pin
serial clock pin (SPI)
serial data pin (SPI)
Note 1.5-5
Note 1.5-4
Note 1.5-3
Note 1.5-2
Note 1.5-1
I
I
C
C
C
C
C
C
C
VDDIO
Power for interface logic pins
VCI
VSS
VDD
VPP
VSH
Power Supply pin for the chip
Ground
Core logic power pin
Power Supply for OTP Programming
Positive Source driving voltage
PREVGH
Power Supply pin for VGH and VSH
VSL
Negative Source driving voltage
PREVGL
Power Supply pin for VCOM, VGL and VSL
VCOM
VCOM driving voltage
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Note 1.5-1: This pin (CS#) is the chip select input connecting to the MCU. The chip is
enabled for MCU communication only when CS# is pulled Low.
Note 1 . 5-2: This pin (D/C#) is Data/Command control pin connecting to the MCU.
When the pin is pulled HIGH, the data will be interpreted as data. When
the pin is pulled Low, the data will be interpreted as command.
Note 1.5-3: This pin (RES#) is reset signal input. The Reset is active Low.
Note 1.5-4: This pin (BUSY) is Busy state output pin. When Busy is low, the operation of
chip should not be interrupted and any commands should not be issued to
the module. The driver IC will put Busy pin low when the driver IC is working
such as:
- Outputting display waveform; or
- Programming with OTP
- Communicating with digital temperature sensor
Note 1. 5-5: This pin (BS1) is for 3-line SPI or 4-line SPI selection. When it is “Low”, 4-
line SPI is selected. When it is “High”, 3-line SPI (9 bits SPI) is selected.
Please refer to below Table.
Table: Bus interface selection
BS1
L
H
MPU Interface
4-lines serial peripheral interface (SPI)
3-lines serial peripheral interface (SPI) – 9 bits SPI
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1.6 Reference Circuit
Note：
1. Inductor L1 is wire-wound inductor. There are no special requirements
for other parameters.
2. Suggests using Si1304BDL or Si1308EDL TUBE MOS (Q1) , otherwise it
may affect the normal boost of the circuit.
3. The default circuit is 4-wire SPI. If the user wants to use 3-wire SPI, the
resistor R4 can be removed when users design.
4. Default voltage value of all capacitors is 50V.
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