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Features
Applications
Description
Pin Assignments
Functional Block Diagram
Product
Freq. Range
Max Output Power
TX Current
RX Current
Narrow Channel + Part90
Image Cal + IF Shift
Si4464
Continuous 119–960 MHz
+20 dBm
169 MHz: 70 mA
915 MHz: 85 mA
10.6/13.6 mA
ü
ü
Si4463
Major bands
142-1050 MHz
+20 dBm
169 MHz: 70 mA
915 MHz: 85 mA
10/13 mA
ü
ü
Si4461
Major bands
142-1050 MHz
+16 dBm
+13 dBm: 29 mA
+14 dBm: 33 mA
10/13 mA
ü
ü
Si4460
Major bands
142-1050 MHz
+13 dBm
+10 dBm: 18 mA
+11 dBm: 20 mA
10/13 mA
ü
ü
1. Electrical Specifications
Table 1. DC Characteristics1
Symbol
Conditions
Min
Typ
Max
Units
VDD
1.8
3.3
3.6
V
IShutdown
RC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF
30
nA
IStandby
Register values maintained and RC oscillator/WUT OFF
50
nA
ISleepRC
RC Oscillator/WUT ON and all register values maintained, and all other blocks OFF
900
nA
ISleepXO
Sleep current using an external 32 kHz crystal.2
1.7
µA
ISensor -LBD
Low battery detector ON, register values maintained, and all other blocks OFF
1
µA
IReady
Crystal Oscillator and Main Digital Regulator ON, all other blocks OFF
1.8
mA
ITune_RX
RX Tune, High Performance Mode
7.2
mA
ITune_TX
TX Tune, High Performance Mode
8
mA
IRXH
High Performance Mode
13
mA
IRXL
Low Power Mode2
10
mA
ITX_+20
+20 dBm output power, class-E match, 915 MHz, 3.3 V
85
mA
+20 dBm output power, class-E match, 460 MHz, 3.3 V
75
mA
+20 dBm output power, square-wave match, 169 MHz, 3.3 V
70
mA
ITX_+16
+16 dBm output power, class-E match, 868 MHz, 3.3 V2
43
mA
ITX_+14
+14 dBm output power, Switched-current match, 868 MHz, 3.3 V2
37
mA
ITX_+13
+13 dBm output power, switched-current match, 868 MHz, 3.3 V2
29
mA
ITX_+10
+10 dBm output power, Class-E match, 868 MHz, 3.3 V2
18
mA
Table 2. Synthesizer AC Electrical Characteristics1
Symbol
Conditions
Min
Typ
Max
Units
FSYN
142
175
MHz
284
350
MHz
425
525
MHz
850
1050
MHz
FSYN
See Notes 1, 2, and 3
119
960
MHz
FRES-960
850–1050 MHz
28.6
Hz
FRES-525
425–525 MHz
14.3
Hz
FRES-350
283–350 MHz
9.5
Hz
FRES-175
142–175 MHz
4.7
Hz
tLOCK
Measured from exiting Ready mode with XOSC running to any frequency. Including VCO Calibration.
50
µs
Lf(fM)
DF = 10 kHz, 460 MHz, High Perf Mode
–106
dBc/Hz
DF = 100 kHz, 460 MHz, High Perf Mode
–110
dBc/Hz
DF = 1 MHz, 460 MHz, High Perf Mode
–123
dBc/Hz
DF = 10 MHz, 460 MHz, High Perf Mode
–130
dBc/Hz
Table 3. Receiver AC Electrical Characteristics1
Symbol
Conditions
Min
Typ
Max
Units
FRX
142
175
MHz
284
350
MHz
425
525
MHz
850
1050
MHz
FRX
See Notes 1, 2, 3, 4, and 5
119
960
MHz
PRX_0.5
(BER < 0.1%) (500 bps, GFSK, BT = 0.5, Df = ±250Hz)3
–126
dBm
PRX_40
(BER < 0.1%) (40 kbps, GFSK, BT = 0.5, Df = ±20 kHz)3
–110
dBm
PRX_100
(BER < 0.1%) (100 kbps, GFSK, BT = 0.5, Df = ±50 kHz)1
–106
dBm
PRX_125
(BER < 0.1%) (125 kbps, GFSK, BT = 0.5, Df = ±62.5 kHz)3
–105
dBm
PRX_500
(BER < 0.1%) (500 kbps, GFSK, BT = 0.5, Df = ±250 kHz)3
–97
dBm
PRX_9.6
(PER 1%) (9.6 kbps, 4GFSK, BT = 0.5, Df = ±2.4 kHz)3,4
–110
dBm
PRX_1M
(PER 1%) (1 Mbps, 4GFSK, BT = 0.5, Df = 1.25 kHz)3,4
–88
dBm
PRX_OOK
(BER < 0.1%, 4.8 kbps, 350 kHz BW, OOK, PN15 data)3
–109
dBm
(BER < 0.1%, 40 kbps, 350 kHz BW,
OOK, PN15 data)3
–104
dBm
(BER < 0.1%, 120 kbps, 350 kHz BW, OOK, PN15 data)3
–99
dBm
BW
1.1
850
kHz
PRX_RES
Up to +5 dBm Input Level
0
0.1
ppm
RESRSSI
±0.5
dB
C/I1-CH
Desired Ref Signal 3 dB above sensitivity, BER < 0.1%. Interferer is CW, and desired is modulated with 2.4 kbps DF = 1.2 kHz GFSK with BT = 0.5, RX channel BW=4.8 kHz, channel spacing = 12.5 kHz
–60
dB
C/I1-CH
–58
dB
C/I1-CH
–53
dB
1MBLOCK
Desired Ref Signal 3 dB above sensitivity. Interferer is CW, and desired is modulated with 2.4 kbps, DF = 1.2 kHz GFSK
–75
dB
8MBLOCK
–84
dB
ImREJ
No image rejection calibration. Rejection at the image frequency. IF = 468 kHz
35
dB
With image rejection calibration in Si446x. Rejection at the image frequency. IF = 468 kHz
55
dB
POB_RX1
Measured at RX pins
–54
dBm
Table 4. Transmitter AC Electrical Characteristics1
Symbol
Conditions
Min
Typ
Max
Units
FTX
142
175
MHz
284
350
MHz
425
525
MHz
850
1050
MHz
FTX
See Notes 1, 2,3, 4, 5, and 6
119
960
MHz
DRFSK
0.123
500
kbps
DR4FSK
0.123
1
Mbps
DROOK
0.123
120
kbps
Df960
850–1050 MHz
1.5
MHz
Df525
425–525 MHz
750
kHz
Df350
283–350 MHz
500
kHz
Df175
142–175 MHz
250
kHz
FRES-960
850–1050 MHz
28.6
Hz
FRES-525
425–525 MHz
14.3
Hz
FRES-350
283–350 MHz
9.5
Hz
FRES-175
142–175 MHz
4.7
Hz
PTX
–20
+20
dBm
PTX61
–40
+16
dBm
PTX60
–40
+13
dBm
DPRF_OUT
Using switched current match within 6 dB of max power
0.1
dB
DPRF_TEMP
–40 to +85 °C
1
dB
DPRF_FREQ
Measured across 902–928 MHz
0.5
dB
B*T
Gaussian Filtering Bandwith Time Product
0.5
POB-TX1
POUT = +13 dBm, Frequencies <1 GHz
–54
dBm
POB-TX2
1–12.75 GHz, excluding harmonics
–42
dBm
P2HARM
Using reference design TX matching network and filter with max output power. Harmonics reduce linearly with output power.
–42
dBm
P3HARM
–42
dBm
Table 5. Auxiliary Block Specifications1
Symbol
Conditions
Min
Typ
Max
Units
TSS
1.78
mV/°C
LBDRES
50
mV
FMC
Configurable to Fxtal or Fxtal divided by 2, 3, 7.5, 10, 15, or 30 where Fxtal is the reference XTAL frequency. In addition, 32.768 kHz is also supported.
32.768K
Fxtal
Hz
TEMPCT
Programmable setting
3
ms
XTALRange
25
32
MHz
t30M
Using XTAL and board layout in reference design. Start-up time will vary with XTAL type and board layout.
250
µs
30MRES
70
fF
t32k
2
sec
32KRCRES
2500
ppm
tPOR
5
ms
Table 6. Digital IO Specifications (GPIO_x, SCLK, SDO, SDI, nSEL, nIRQ)1
Symbol
Conditions
Min
Typ
Max
Units
TRISE
0.1 x VDD to 0.9 x VDD, CL = 10 pF, DRV<1:0> = HH
2.3
ns
TFALL
0.9 x VDD to 0.1 x VDD, CL = 10 pF, DRV<1:0> = HH
2
ns
CIN
2
pF
VIH
VDD x 0.7
V
VIL
VDD x 0.3
V
IIN
0
–10
10
µA
IINP
VIL = 0 V
1
10
µA
IOmaxLL
DRV[1:0] = LL3
18.7
mA
IOmaxLH
DRV[1:0] = LH3
13.7
mA
IOmaxHL
DRV[1:0] = HL3
8.5
mA
IOmaxHH
DRV[1:0] = HH3
3
mA
IOmaxLL
DRV[1:0] = LL3
15.3
mA
IOmaxLH
DRV[1:0] = LH3
11.6
mA
IOmaxHL
DRV[1:0] = HL3
7.4
mA
IOmaxHH
DRV[1:0] = HH3
2.7
mA
IOmaxLL
DRV[1:0] = LL3
6.3
mA
IOmaxLH
DRV[1:0] = LH3
5.6
mA
IOmaxHL
DRV[1:0] = HL3
4.4
mA
IOmaxHH
DRV[1:0] = HH3
2.1
mA
VOH
DRV[1:0] = HL
VDD x 0.8
V
VOL
DRV[1:0] = HL
VDD x 0.2
V
Table 7. Absolute Maximum Ratings
Value
Unit
–0.3, +3.6
V
–0.3, +8.0
V
–0.3, +6.5
V
–0.3, VDD + 0.3
V
–0.3, VDD + 0.3
V
+10
dBm
–40 to +85
°C
30
°C/W
+125
°C
–55 to +125
°C
1.1. Definition of Test Conditions
2. Functional Description
Figure 1. Si4461 Direct-Tie Application Example
Figure 2. Si4463 Single Antenna with RF Switch Example
3. Controller Interface
3.1. Serial Peripheral Interface (SPI)
Table 8. Serial Interface Timing Parameters
Symbol
Parameter
Min (ns)
Diagram
tCH
Clock high time
40
tCL
Clock low time
40
tDS
Data setup time
20
tDH
Data hold time
20
tDD
Output data delay time
20
tEN
Output enable time
20
tDE
Output disable time
50
tSS
Select setup time
20
tSH
Select hold time
50
tSW
Select high period
80
Figure 3. SPI Write Command
Figure 4. SPI Read Command—Check CTS Value
Figure 5. SPI Read Command—Clock Out Read Data
3.2. Fast Response Registers
3.3. Operating Modes and Timing
Figure 6. State Machine Diagram
Table 9. Operating State Response Time and Current Consumption
State/Mode
Response Time to
Current in State /Mode
TX
RX
Shutdown State
15 ms
15 ms
30 nA
Standby State
Sleep State
SPI Active State
Ready State
TX Tune State
RX Tune State
460 µs
460 µs
300 µs
130 µs
65 µs
460 µs
460 µs
310 µs
140 µs
90 µs
50 nA
900 nA
1.35 mA
1.8 mA
8 mA
7.2 mA
TX State
120 µs
18 mA @ +10 dBm
RX State
120 µs
75 µs
10 or 13 mA
Figure 7. Start-Up Timing and Current Consumption using Shutdown State
Figure 8. Start-Up Timing and Current Consumption using Standby State
3.3.1. Shutdown State
3.3.2. Standby State
3.3.3. Sleep State
3.3.4. SPI Active State
3.3.5. Ready State
3.3.6. TX State
Figure 9. Start_TX Commands and Timing
3.3.7. RX State
3.4. Application Programming Interface (API)
Table 10. API Commands
Number
Name
Description
0x00
NOP
0x01
PART_INFO
0x02
POWER_UP
0x10
FUNC_INFO
0x11
SET_PROPERTY
0x12
GET_PROPERTY
0x13
GPIO_PIN_CFG
0x14
GET_SENSOR_READING
0x15
FIFO_RESET
0x20
GET_INT_STATUS
0x21
GET_PH_STATUS
0x22
GET_MODEM_STATUS
0x23
GET_CHIP_STATUS
0x31
START_TX
0x32
START_RX
0x33
REQUEST_DEVICE_
STATE
0x34
CHANGE_STATE
0x50
FAST RESPONSE A
0x51
FAST RESPONSE B
0x53
FAST RESPONSE C
0x57
FAST RESPONSE D
0x66
TX_FIFO_WRITE
0x77
RX_FIFO_READ
3.5. START_TX
START_TX Command
7
6
5
4
3
2
1
0
CMD
0x31
CHANNEL
CHANNEL[7:0]
CONDITION
TXCOMPLETE_STATE[3:0]
0
RETRANSMIT
START[1:0]
TX_LEN
TX_LEN[15:8]
TX_LEN
TX_LEN[7:0]
START_TX Reply
7
6
5
4
3
2
1
0
CMD_COMPLETE
CTS[7:0]
3.6. Interrupts
Number
Command
Summary
0x20
GET_INT_STATUS
0x21
GET_PH_STATUS
0x22
GET_MODEM_STATUS
0x23
GET_CHIP_STATUS
Number
Property
Default
Summary
0x0100
INT_CTL_ENABLE
0x04
0x0101
INT_CTL_PH_ENABLE
0x00
0x0102
INT_CTL_MODEM_ENABLE
0x00
0x0103
INT_CTL_CHIP_ENABLE
0x04
3.7. GPIO
Table 11. GPIOs
Pin
SDN State
POR Default
GPIO0
0
POR
GPIO1
0
CTS
GPIO2
0
POR
GPIO3
0
POR
nIRQ
resistive VDD pull-up
nIRQ
SDO
resistive VDD pull-up
SDO
SDI
High Z
SDI
4. Modulation and Hardware Configuration Options
4.1. MODEM_MOD_TYPE
MODEM_MOD_TYPE
7
6
5
4
3
2
1
0
TX_DIRECT_MODE_TYPE
TX_DIRECT_MODE_GPIO[1:0]
MOD_SOURCE[1:0]
MOD_TYPE[2:0]
0
0x0
0x0
0x2
4.2. Modulation Types
4.3. Hardware Configuration Options
4.3.1. Receive Demodulator Options
4.3.2. RX/TX Data Interface With MCU
4.4. Preamble Length
Table 12. Recommended Preamble Length
Mode
AFC
Antenna Diversity
Preamble Type
Recommended Preamble Length
Recommended Preamble Detection Threshold
(G)FSK
Disabled
Disabled
Standard
4 Bytes
20 bits
(G)FSK
Enabled
Disabled
Standard
5 Bytes
20 bits
(G)FSK
Disabled
Disabled
Non-standard
2 Bytes
0 bits
(G)FSK
Enabled
Non-standard
Not Supported
(G)FSK
Disabled
Enabled
Standard
7 Bytes
24 bits
(G)FSK
Enabled
Enabled
Standard
8 Bytes
24 bits
4(G)FSK
Disabled
Disabled
Standard
40 symbols
16 symbols
4(G)FSK
Enabled
Disabled
Standard
48 symbols
16 symbols
4(G)FSK
Non-standard
Not Supported
OOK
Disabled
Disabled
Standard
4 Bytes
20 bits
OOK
Disabled
Disabled
Non-standard
2 Bytes
0 bits
OOK
Enabled
Not Supported
5. Internal Functional Blocks
5.1. RX Chain
5.1.1. RX Chain Architecture
Figure 10. RX Architecture vs. Data Rate
5.2. RX Modem
5.2.1. Automatic Gain Control (AGC)
5.2.2. Auto Frequency Correction (AFC)
5.2.3. Image Rejection and Calibration
5.2.4. Received Signal Strength Indicator
5.3. Synthesizer
5.3.1. Synthesizer Frequency Control
Table 13. Output Divider (Outdiv) Values for the Si4460/61/63
Outdiv
Lower (MHz)
Upper (MHz)
24
142
175
12
284
350
8
425
525
4
850
1050
Table 14. Output Divider (Outdiv) for the Si4464
Outdiv
Lower (MHz)
Upper (MHz)
24
119
168.99
16
169
224.99
12
225
337.99
8
338
449.99
6
450
675.99
4
675
960
5.4. Transmitter (TX)
Number
Command
Summary
0x2200
PA_MODE
0x2201
PA_PWR_LVL
0x2202
PA_BIAS_CLKDUTY
0x2203
PA_TC
5.4.1. Si4464/63: +20 dBm PA
Figure 11. +20 dBm TX Power vs. PA_PWR_LVL
Figure 12. +20 dBm TX Power vs. VDD
Figure 13. +20 dBm TX Power vs. Temp
5.4.2. Si4461 +16 dBm PA
Figure 14. +13 dBm TX Power vs. PA_PWR_LVL
Figure 15. +13 dBm TX Power vs. Supply Voltage (VDD)
5.5. Crystal Oscillator
Figure 16. Capacitor Bank Frequency Offset Characteristics
6. Data Handling and Packet Handler
6.1. RX and TX FIFOs
Figure 17. TX and RX FIFOs
6.2. Packet Handler
Figure 18. Packet Handler Structure
7. RX Modem Configuration
8. Auxiliary Blocks
8.1. Wake-up Timer and 32 kHz Clock Source
Table 15. WUT Specific Commands and Properties
API Properties
Description
Requirements/Notes
GLOBAL_WUT_CONFIG
GLOBAL WUT configuration
GLOBAL_WUT_M_15_8
Sets HW WUT_M[15:8]
GLOBAL_ WUT_M_7_0
Sets HW WUT_M[7:0]
GLOBAL_WUT_R
Sets WUT_R[4:0]
Sets WUT_SLEEP to choose WUT state
GLOBAL_WUT_LDC
Sets FW internal WUT_LDC
Table 16. WUT Related API Commands and Properties
Command/Property
Description
Requirements/Notes
WUT Interrupt Enable
INT_CTL_ENABLE
Interrupt enable property
INT_CTL_CHIP_ENABLE
Chip interrupt enable property
32 kHz Clock Source Selection
GLOBAL_CLK_CFG
Clock configuration options
WUT Interrupt Output
GPIO_PIN_CFG
Host can enable interrupt on WUT expire
RX/TX Operation
START_RX/TX
START RX/TX when wake up timer expire
8.2. Low Duty Cycle Mode (Auto RX Wake-Up)
Figure 19. RX and TX LDC Sequences
Figure 20. Low Duty Cycle Mode for RX
8.3. Temperature, Battery Voltage, and Auxiliary ADC
GET_ADC_READING Command
7
6
5
4
3
2
1
0
CMD
0x14
ADC_EN
0
TEMPERATURE_EN
BATTERY_VOLTAGE_EN
ADC_GPIO_EN
ADC_GPIO_PIN[1:0]
GET_ADC_READING Reply
7
6
5
4
3
2
1
0
CMD_COMPLETE
CTS[7:0]
GPIO_ADC
GPIO_ADC[15:8]
GPIO_ADC
GPIO_ADC[7:0]
BATTERY_ADC
BATTERY_ADC[15:8]
BATTERY_ADC
BATTERY_ADC[7:0]
TEMP_ADC
TEMP_ADC[15:8]
TEMP_ADC
TEMP_ADC[7:0]
TEMP_SLOPE
TEMP_SLOPE[7:0]
TEMP_INTERCEPT
TEMP_INTERCEPT[7:0]
8.4. Low Battery Detector
8.5. Antenna Diversity
9. Pin Descriptions: Si4464/63/62/61/60
Pin
Pin Name
I/0
Description
1
SDN
I
2
RXp
I
3
RXn
I
4
TX
O
5
NC
6
VDD
VDD
7
TXRAMP
O
8
VDD
VDD
9
GPIO0
I/O
10
GPIO1
I/O
11
nIRQ
O
12
SCLK
I
13
SDO
O
14
SDI
I
15
nSEL
I
16
XOUT
O
17
XIN
I
18
GND
GND
19
GPIO2
I/O
20
GPIO3
I/O
PKG
PADDLE_GND
GND
10. Ordering Information
Part Number1,2
Description
Package Type
Operating Temperature
Si4464-Bxx-FM
QFN-20
Pb-free
–40 to 85 °C
Si4463-Bxx-FM
QFN-20
Pb-free
–40 to 85 °C
Si4461-Bxx-FM
QFN-20
Pb-free
–40 to 85 °C
Si4460-Bxx-FM
QFN-20
Pb-free
–40 to 85 °C
11. Package Outline: Si4464/63/61/60
Figure 21. 20-Pin Quad Flat No-Lead (QFN)
Table 17. Package Dimensions
Symbol
Millimeters
Min
Nom
Max
A
0.80
0.85
0.90
A1
0.00
0.02
0.05
b
0.18
0.25
0.30
D
4.00 BSC
D2
2.45
2.60
2.75
e
0.50 BSC
E
4.00 BSC
E2
2.45
2.60
2.75
L
0.30
0.40
0.50
aaa
0.15
bbb
0.08
ccc
0.10
ddd
0.10
eee
0.10
ggg
0.05
12. PCB Land Pattern: Si4464/63/61/60
Figure 22. PCB Land Pattern
Table 18. PCB Land Pattern Dimensions
Symbol
Millimeters
Min
Max
C1
3.90
4.00
C2
3.90
4.00
E
0.50 REF
X1
0.20
0.30
X2
2.55
2.65
Y1
0.65
0.75
Y2
2.55
2.65
13. Top Marking
13.1. Si4464/63/61/60 Top Marking
13.2. Top Marking Explanation
Document Change List
Contact Information
Si4464/63/61/60 HIGH-PERFORMANCE, LOW-CURRENT TRANSCEIVER Features  Frequency range = 119–1050 MHz  Receive sensitivity = –126 dBm  Modulation  Fast wake and hop times  Power supply = 1.8 to 3.6 V  Excellent selectivity performance (G)FSK, 4(G)FSK, (G)MSK OOK and ASK  Max output power +20 dBm (Si4464/63) +16 dBm (Si4461) +13 dBm (Si4460)  PA support for +27 or +30 dBm  Low active power consumption 10/13 mA RX 18mA TX at +10 dBm (Si4460)  Ultra low current powerdown modes 30 nA shutdown, 50 nA standby  Data rate = 0.123 kbps to 1 Mbps 60 dB adjacent channel 75 dB blocking at 1 MHz  Antenna diversity and T/R switch control  Highly configurable packet handler  TX and RX 64 byte FIFOs  Auto frequency control (AFC)  Automatic gain control (AGC)  Low BOM  Low battery detector  Temperature sensor  20-Pin QFN package  IEEE 802.15.4g compliant  FCC Part 90 Mask D  ETSI Class-I Operation with SAW Applications  Smart metering (802.15.4g & MBus)  Remote control  Home security and alarm  Telemetry  Garage and gate openers Description  Remote keyless entry  Home automation  Industrial control  Sensor networks  Health monitors  Electronic shelf labels Silicon Laboratories' Si446x devices are high-performance, low-current transceivers covering the sub-GHz frequency bands from 119 to 1050 MHz. The radios are part of the EZRadioPRO® family, which includes a complete line of transmitters, receivers, and transceivers covering a wide range of applications. All parts offer outstanding sensitivity of –126 dBm while achieving extremely low active and standby current consumption. The Si4464 offers continuous frequency coverage across the entire sub-GHz band from 119–960 MHz with extremely fine frequency resolution. The Si4463 includes optimal phase noise, blocking, and selectivity performance for narrow band and licensed band applications, such as FCC Part90 and 169 MHz wireless Mbus. The 60 dB adjacent channel selectivity with 12.5 kHz channel spacing ensures robust receive operation in harsh RF conditions, which is particularly important for narrowband operation. The Si4464/63 offers exceptional output power of up to +20 dBm with outstanding TX efficiency. The high output power and sensitivity results in an industry-leading link budget of 146 dB allowing extended ranges and highly robust communication links. The Si4460 active mode TX current consumption of 18 mA at +11 dBm and RX current of 10 mA coupled with extremely low standby current and fast wake times ensure extended battery life in the most demanding applications. The Si4464/63 can achieve up to +27 dBm output power with built-in ramping control of a low-cost external FET. The devices are compliant with all worldwide regulatory standards: FCC, ETSI, and ARIB. All devices are designed to be compliant with 802.15.4g and WMbus smart metering standards. Pin Assignments I 3 O P G 20 I 2 O P G 19 D N G 18 N X I 17 GND PAD 7 8 9 10 T U O X 16 15 14 13 12 11 nSEL SDI SDO SCLK nIRQ SDN RXp RXn TX NC 1 2 3 4 5 6 D D V p m a R X T D D V I 0 O P G I 1 O P G Patents pending Rev 1.0 2/12 Copyright © 2012 by Silicon Laboratories Si4464/63/62/61/60
Si4464/63/61/60 Functional Block Diagram GPIO3 GPIO2 XIN XOUT Loop Filter PFD / CP Frac-N Div VCO FBDIV TX DIV LO Gen 30 MHz XO Bootup OSC SDN RXP RXN TX RF PKDET LNA IF PKDET PGA ADC PA PowerRamp Cntl PA LDO LDOs POR LBD 32K LP OSC MODEM FIFO Packet Handler Digital Logic VDD TXRAMP VDD GPIO0 GPIO1 C o n t r o e r l l S P I I t n e r f a c e nSEL SDI SDO SCLK nIRQ Product Freq. Range Max Output Power TX Current RX Current Narrow Channel + Part90 Image Cal + IF Shift Si4464 Si4463 Si4461 Si4460 Continuous 119–960 MHz Major bands 142-1050 MHz Major bands 142-1050 MHz Major bands 142-1050 MHz +20 dBm +20 dBm +16 dBm +13 dBm 169 MHz: 70 mA 915 MHz: 85 mA 169 MHz: 70 mA 915 MHz: 85 mA +13 dBm: 29 mA +14 dBm: 33 mA +10 dBm: 18 mA +11 dBm: 20 mA 10.6/13.6 mA 10/13 mA 10/13 mA 10/13 mA         2 Rev 1.0
Si4464/63/61/60 TABLE OF CONTENTS Section Page 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 1.1. Definition of Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 2. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 3. Controller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.1. Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 3.2. Fast Response Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 3.3. Operating Modes and Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 3.4. Application Programming Interface (API) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 3.5. START_TX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 3.6. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 3.7. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 4. Modulation and Hardware Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 4.1. MODEM_MOD_TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 4.2. Modulation Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 4.3. Hardware Configuration Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 4.4. Preamble Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 5. Internal Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 5.1. RX Chain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 5.2. RX Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 5.3. Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 5.4. Transmitter (TX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 5.5. Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 6. Data Handling and Packet Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 6.1. RX and TX FIFOs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 6.2. Packet Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 7. RX Modem Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 8. Auxiliary Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 8.1. Wake-up Timer and 32 kHz Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 8.2. Low Duty Cycle Mode (Auto RX Wake-Up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 8.3. Temperature, Battery Voltage, and Auxiliary ADC . . . . . . . . . . . . . . . . . . . . . . . . . .44 8.4. Low Battery Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44 8.5. Antenna Diversity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 9. Pin Descriptions: Si4464/63/62/61/60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 10. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 11. Package Outline: Si4464/63/61/60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 12. PCB Land Pattern: Si4464/63/61/60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 13. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 13.1. Si4464/63/61/60 Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 13.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 Rev 1.0 3
Si4464/63/61/60 1. Electrical Specifications Table 1. DC Characteristics1 Symbol Parameter Supply Voltage Range Power Saving Modes IShutdown VDD IStandby TUNE Mode Current RX Mode Current TX Mode Current (Si4464/63) TX Mode Current (Si4461) TX Mode Current (Si4460) Notes: Conditions Min 1.8 Typ Max Units 3.3 3.6 V RC Oscillator, Main Digital Regulator, and Low Power Digital Regulator OFF Register values maintained and RC oscillator/WUT OFF ISleepRC RC Oscillator/WUT ON and all register values main- tained, and all other blocks OFF ISleepXO ISensor -LBD IReady ITune_RX ITune_TX IRXH IRXL ITX_+20 ITX_+16 ITX_+14 ITX_+13 ITX_+10 Sleep current using an external 32 kHz crystal.2 Low battery detector ON, register values maintained, and all other blocks OFF Crystal Oscillator and Main Digital Regulator ON, all other blocks OFF RX Tune, High Performance Mode TX Tune, High Performance Mode High Performance Mode Low Power Mode2 +20 dBm output power, class-E match, 915 MHz, 3.3 V +20 dBm output power, class-E match, 460 MHz, 3.3 V +20 dBm output power, square-wave match, 169 MHz, 3.3 V +16 dBm output power, class-E match, 868 MHz, 3.3 V2 +14 dBm output power, Switched-current match, 868 MHz, 3.3 V2 +13 dBm output power, switched-current match, 868 MHz, 3.3 V2 +10 dBm output power, Class-E match, 868 MHz, 3.3 V2 — 30 — nA — 50 — nA — 900 — nA — 1.7 — µA — — µA 1 — 1.8 — mA 8 — 7.2 — mA — — mA — 13 — mA — 10 — mA — 85 — mA — 75 — mA — 70 — mA — 43 — mA — 37 — mA — 29 — mA — 18 — mA 1. All specifications guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section of "1.1. Definition of Test Conditions" on page 13. 2. Guaranteed by qualification. Qualification test conditions are listed in the “Qualification Test Conditions” section in "1.1. Definition of Test Conditions" on page 13. 4 Rev 1.0
Table 2. Synthesizer AC Electrical Characteristics1 Parameter Synthesizer Frequency Range (Si4463/61/60) Symbol FSYN Conditions Synthesizer Frequency Range (Si4464) Synthesizer Frequency Resolution4 Synthesizer Settling Time2 Phase Noise2 FSYN FRES-960 FRES-525 FRES-350 FRES-175 tLOCK L(fM) See Notes 1, 2, and 3 850–1050 MHz 425–525 MHz 283–350 MHz 142–175 MHz Measured from exiting Ready mode with XOSC running to any frequency. Including VCO Calibration. Si4464/63/61/60 Min 142 284 425 850 119 Typ Max Units — MHz 175 — — 350 525 MHz MHz — 1050 MHz — 960 MHz — 28.6 — — 14.3 — — — — 9.5 4.7 50 — — — Hz Hz Hz Hz µs F = 10 kHz, 460 MHz, High Perf Mode — –106 — dBc/Hz F = 100 kHz, 460 MHz, High Perf Mode — –110 — dBc/Hz F = 1 MHz, 460 MHz, High Perf Mode — –123 — dBc/Hz F = 10 MHz, 460 MHz, High Perf Mode — –130 — dBc/Hz Notes: 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the “Production Test Conditions” section in "1.1. Definition of Test Conditions" on page 13. 2. Guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 3. For applications that use the major bands covered by Si4463/61/60, customers should use those parts instead of Si4464. 4. Default API setting for modulation deviation resolution is double the typical value specified. Rev 1.0 5
Si4464/63/61/60 Table 3. Receiver AC Electrical Characteristics1 Parameter RX Frequency Range (Si4463/61/60) RX Frequency Range (Si4464) RX Sensitivity Symbol FRX FRX PRX_0.5 PRX_40 PRX_100 PRX_125 PRX_500 PRX_9.6 PRX_1M Conditions See Notes 1, 2, 3, 4, and 5 (500 bps, GFSK, BT = 0.5, (40 kbps, GFSK, BT = 0.5, (BER < 0.1%) f = 250Hz)3 (BER < 0.1%) f = 20 kHz)3 (BER < 0.1%) f = 50 kHz)1 (BER < 0.1%) (100 kbps, GFSK, BT = 0.5, (125 kbps, GFSK, BT = 0.5, f = 62.5 kHz)3 (BER < 0.1%) (500 kbps, GFSK, BT = 0.5, f = 250 kHz)3 (PER 1%) (9.6 kbps, 4GFSK, BT = 0.5, f =  kHz)3,4 (PER 1%) (1 Mbps, 4GFSK, BT = 0.5, f = 1.25 kHz)3,4 PRX_OOK (BER < 0.1%, 4.8 kbps, 350 kHz BW, OOK, PN15 data)3 (BER < 0.1%, 40 kbps, 350 kHz BW, OOK, PN15 data)3 (BER < 0.1%, 120 kbps, 350 kHz BW, OOK, PN15 data)3 BW Min 142 284 425 850 119 — — — — — — — — — — 1.1 Typ Max Units — — — — — 175 MHz 350 MHz 525 MHz 1050 MHz 960 MHz –126 — dBm –110 — dBm –106 — dBm –105 — dBm –97 — dBm –110 — dBm –88 — dBm –109 — dBm –104 — dBm –99 — — dBm 850 kHz RX Channel Bandwidth5 Notes: Si4464. Definition of Test Conditions" on page 13. in the 450–470 MHz band. 5. Guaranteed by bench characterization. 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 2. For applications that use the major bands covered by Si4463/61/60, customers should use those parts instead of 3. Guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" section in "1.1. 4. For PER tests, 48 preamble symbols, 4 byte sync word, 10 byte payload and CRC-32 was used. PER and BER tested 6 Rev 1.0
Table 3. Receiver AC Electrical Characteristics1 (Continued) Si4464/63/61/60 Parameter BER Variation vs Power Level3 RSSI Resolution 1-Ch Offset Selectivity, 169 MHz3 1-Ch Offset Selectivity, 450 MHz3 1-Ch Offset Selectivity, 868 / 915 MHz3 Blocking 1 MHz Offset3 Symbol PRX_RES RESRSSI C/I1-CH C/I1-CH C/I1-CH Conditions Min Up to +5 dBm Input Level Desired Ref Signal 3 dB above sensitiv- ity, BER < 0.1%. Interferer is CW, and desired is modulated with 2.4 kbps F = 1.2 kHz GFSK with BT = 0.5, RX channel BW=4.8 kHz, channel spacing = 12.5 kHz 1MBLOCK Desired Ref Signal 3 dB above sensitiv- ity. Interferer is CW, and desired is modulated with 2.4 kbps, F = 1.2 kHz GFSK Blocking 8 MHz Offset3 Image Rejection3 8MBLOCK ImREJ No image rejection calibration. Rejec- tion at the image frequency. IF = 468 kHz With image rejection calibration in Si446x. Rejection at the image fre- quency. IF = 468 kHz Measured at RX pins POB_RX1 Typ 0 ±0.5 –60 –58 –53 –75 –84 35 55 — Max Units 0.1 ppm — — — — — — — — dB dB dB dB dB dB dB dB –54 dBm — — — — — — — — — — Spurious Emissions3 Notes: Si4464. 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 2. For applications that use the major bands covered by Si4463/61/60, customers should use those parts instead of 3. Guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 4. For PER tests, 48 preamble symbols, 4 byte sync word, 10 byte payload and CRC-32 was used. PER and BER tested in the 450–470 MHz band. 5. Guaranteed by bench characterization. Rev 1.0 7
Si4464/63/61/60 Table 4. Transmitter AC Electrical Characteristics1 Parameter TX Frequency Range (Si4463/61/60) Symbol Conditions TX Frequency Range (Si4464) (G)FSK Data Rate2,3 4(G)FSK Data Rate2,3 OOK Data Rate2,3 Modulation Deviation Range2 Modulation Deviation Resolution2,4 Output Power Range (Si4464/63)5 Output Power Range (Si4461)5 Output Power Range (Si4460)5 TX RF Output Steps2 Notes: FTX FTX DRFSK DR4FSK DROOK f960 f525 f350 f175 FRES-960 FRES-525 FRES-350 FRES-175 PTX PTX61 PTX60 See Notes 1, 2,3, 4, 5, and 6 850–1050 MHz 425–525 MHz 283–350 MHz 142–175 MHz 850–1050 MHz 425–525 MHz 283–350 MHz 142–175 MHz — 0.123 — 0.123 — 0.123 — Min 142 284 425 850 119 — — — — — — — — –20 –40 –40 Typ Max Units — — — 175 350 525 MHz MHz MHz — 1050 MHz 960 500 1 120 — — — 1.5 750 500 250 — 28.6 — 14.3 — 9.5 — 4.7 — MHz kbps Mbps kbps MHz kHz kHz kHz Hz Hz Hz Hz — — — +20 dBm +16 dBm +13 dBm PRF_OUT Using switched current match within 6 dB of max power — 0.1 — dB 1. All specification guaranteed by production test unless otherwise noted. Production test conditions and max limits are listed in the "Production Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 2. Guaranteed by qualification. Qualification test conditions are listed in the "Qualification Test Conditions" section in "1.1. Definition of Test Conditions" on page 13. 3. The maximum data rate is dependant on the XTAL frequency and is calculated as per the formula: Maximum Symbol Rate = Fxtal/60, where Fxtal is the XTAL frequency (typically 30 MHz). 4. Default API setting for modulation deviation resolution is double the typical value specified. 5. Output power is dependent on matching components and board layout. 6. For applications that use the major bands covered by Si4463/61/60, customers should use those parts instead of Si4464. 8 Rev 1.0
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