NDC7002N
Dual N-Channel Enhancement Mode Field Effect Transistor
    General Description
       
           Features
March 1996  
These  dual  N-Channel  enhancement  mode  power  field
effect 
transistors  are  produced  using  Fairchild's
proprietary,  high  cell  density,  DMOS  technology.  This
very high density process has been designed to minimize
on-state 
reliable
performance  and  fast  switching.  These  devices  is
particularly suited for low voltage applications requiring a
low current high side switch.
resistance,  provide 
rugged  and 
DS(ON)
.
DS(ON)
 = 2W
 @ V
=10V
0.51A, 50V, R
GS
High density cell design for low R
Proprietary SuperSOTTM-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current.
____________________________________________________________________________________________ 
4
5
6
3
2
1
SOT-6 (SuperSOTTM-6)
 
Absolute Maximum RatingsTA = 25°C unless otherwise noted
Symbol
Parameter
Drain-Source Voltage
V
DSS
GSS
V
I
D
P
D
Gate-Source Voltage - Continuous
Drain Current  - Continuous
                        - Pulsed
Maximum Power Dissipation                                    (Note 1a)
                                                (Note 1a)
                                                                                                                                       (Note 1b)
                                                                                                                                       (Note 1c)
Operating and Storage Temperature Range
STG
T
,T
J
THERMAL CHARACTERISTICS
R
q JA
R
q JC
Thermal Resistance, Junction-to-Ambient                (Note 1a)
Thermal Resistance, Junction-to-Case                       (Note 1)
NDC7002N
Units
50
20
0.51
1.5
0.96
0.9
0.7
-55 to 150
130
60
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDC7002N.SAM
Parameter
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
OFF CHARACTERISTICS
BV
I
DSS
Drain-Source Breakdown Voltage
Zero Gate Voltage  Drain Current
= 250 µA
 = 0 V, I
D 
 = 40 V, V
= 0 V
Conditions
V
V
DSS
GS 
GS
DS
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
I
GSSF
I
GSSR
ON CHARACTERISTICS (Note 2)
V
Gate Threshold Voltage
GS(th)
R
DS(ON)
Static Drain-Source On-Resistance
Input Capacitance
On-State Drain Current
Forward Transconductance
Output Capacitance
Reverse Transfer Capacitance
I
D(on)
g
FS
DYNAMIC CHARACTERISTICS
Ciss
Coss
Crss
SWITCHING CHARACTERISTICS (Note 2)
t
D(on)
tr
t
D(off)
tf
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn - Off Delay Time
Turn - Off Fall Time
Turn - On Delay Time
Turn - On Rise Time
V
V
GS
GS
 = 20 V, V
DS
 = -20 V, V
 = 0 V
= 0 V
DS
V
 = V
, I
 = 250 µA
D
GS
DS
V
 = 10 V,  I
 = 0.51 A
D
GS
V
V
V
 = 0.35 A
 = 4.5 V,  I
D
 =  10 V, V
 = 10 V
DS
 =  10 V, I
 = 0.51 A
D
GS
GS
DS
V
 = 25 V,  V
 f  = 1.0 MHz
DS
GS
 = 0 V,
V
V
 = 0.25 A,
 = 25 V,  I
D
 = 25 W
 =  10 V, R
GEN 
DD
GS
 =  25 V,
V
DS
I
 =   0.51 A,  V
D
GS
 =  10 V
Min
Typ Max Units
T
= 125°C
J 
T
= 125°C
J 
T
= 125°C
J 
50
 
1
0.8
1.5
1
500
100
-100
2.5
2.2
2
3.5
4
20
20
20
20
V
µA
nA
nA
V
A
mS
  pF
  pF
  pF
nS
nC
nC
nC
1.9
1.5
1
1.7
1.6
400
20
13
5
6
6
11
5
1
0.19
0.33
NDC7002N.SAM
W
Parameter
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
DRAIN-SOURCE DIODE CHARACTERISTICS
Maximum Continuous Source Current
I
S
Maximum Pulse Source Current (Note 2)
I
SM
Drain-Source Diode Forward Voltage
V
Conditions
V
SD
 = 0 V,  I
= 0.51 A (Note 2)
S 
GS
Min
Typ Max Units
0.51
1.5
1.2
A
A
V
0.8
   Notes:
1.  R
 is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
q JA
is guaranteed by
q JC 
design while R
    P D(t) = TJ- TA
q CA
 is determined by the user's board design.
2 (t) · RDS(ON ) TJ
Rq J C+Rq CA(t) = I D
TJ- TA
Rq J A(t) =
Typical R
 for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
q JA
a. 130oC/W when mounted on a 0.125 in2 pad of 2oz cpper.
b. 140oC/W when mounted on a 0.005 in2 pad of 2oz cpper.
c. 180oC/W when mounted on a 0.0015 in2 pad of 2oz cpper. 
      
1a
1b
1c
     
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDC7002N.SAM
Typical Electrical Characteristics
)
A
 
(
 
T
N
E
R
R
U
C
E
C
R
U
O
S
N
A
R
D
-
I
 
,
 
 
 
I
D
I
D
E
Z
L
A
M
R
O
N
)
(
 
,
 
 
 
 
 
 
 
 
 
 
 
 
N
O
S
D
R
I
-
E
C
N
A
T
S
S
E
R
N
O
E
C
R
U
O
S
N
A
R
D
-
I
 
1.5
1.2
0.9
0.6
0.3
0
0
V     =10V
GS
8.0 7.0
 6.0 
 5.5
 5.0 
I
D
E
Z
L
A
M
R
O
N
 
,
 
 
 
 
 
 
 
 
 
 
 
)
n
o
(
S
D
R
 4.5 
4.0 
 3.5 
 3.0 
1
2
3
4
5
E
C
N
A
T
S
S
E
R
N
O
-
I
 
 
E
C
R
U
O
S
N
A
R
D
-
I
3
2.5
2
1.5
1
0.5
0
 V     = 3.5V 
GS
4.0 
 4.5 
 5.0 
 5.5
 6.0 
 7.0 
 8.0 
 10 
0.3
0.6
0.9
1.2
1.5
I   , DRAIN CURRENT (A)
D
V     , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
I   = 0.51A
D
V     = 10V
GS
2
1.8
1.6
1.4
1.2
1
0.8
0.6
D
E
Z
I
L
A
M
R
O
N
 
,
 
 
 
 
 
 
 
 
 
 
 
)
n
o
(
S
D
R
E
C
N
A
T
S
S
E
R
N
O
-
I
 
 
E
C
R
U
O
S
N
A
R
D
-
I
 V     = 10V 
GS
T  = 125°C
J
2.5
2
1.5
1
 25°C
 -55°C
0.4
-50
-25
25
0
T  , JUNCTION TEMPERATURE (°C)
J
50
75
100
125
150
0.5
0
0.3
0.6
0.9
1.2
1.5
I   , DRAIN CURRENT (A)
D
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
V     = 10V
DS
T   = -55°C
J
25°C
125°C
1.5
1.2
0.9
0.6
)
A
(
 
T
N
E
R
R
U
C
N
A
R
D
I
 
 
,
 
 
 
I
D
0.3
0
1
2
3
4
5
6
7
8
V     , GATE TO SOURCE VOLTAGE (V)
GS
Figure 5. Transfer Characteristics.
I
D
E
Z
L
A
M
R
O
N
 
,
h
 
 
 
t
V
 
E
G
A
T
L
O
V
D
L
O
H
S
E
R
H
T
E
C
R
U
O
S
E
T
A
G
-
 
1.2
1.1
1
0.9
0.8
0.7
-50
-25
25
0
T  , JUNCTION TEMPERATURE (°C)
J
50
75
100
Figure 6. Gate Threshold Variation with
Temperature.
DS
V    = V
I    = 250µA
D
GS
125
150
NDC7002N.SAM
Typical Electrical Characteristics (continued)
 
E
G
A
T
L
O
V
N
W
O
D
K
A
E
R
B
E
C
R
U
O
S
N
A
R
D
-
I
 
I
D
E
Z
L
A
M
R
O
N
 
,
 
 
 
 
 
 
 
 
S
S
D
V
B
I    = 250µA
D
1.16
1.12
1.08
1.04
1
0.96
0.92
0.88
-50
-25
V     = 0V
GS
T  = 125°C
J
1.5
1
0.5
0.1
0.01
 25°C 
 -55°C
)
A
 
I
(
 
T
N
E
R
R
U
C
N
A
R
D
E
S
R
E
V
E
R
 
100
T    , JUNCTION TEMPERATURE (°C)
25
50
75
0
J
 
,
 
 
 
I
S
125
150
0.001
0.2
0.4
V     , BODY DIODE FORWARD VOLTAGE (V)
0.6
0.8
1
SD
1.2
Figure 7. Breakdown Voltage Variation with
Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
1 0 0
5 0
2 0
1 0
5
2
)
F
p
(
 
I
E
C
N
A
T
C
A
P
A
C
f = 1 MHz
V     = 0V
GS
C  iss
C  oss
C  rss
1
0.1
0.2
0.5
1
2
5
10
2 0
50
V     , DRAIN TO SOURCE VOLTAGE (V)
DS
)
V
(
 
 
E
G
A
T
L
O
V
E
C
R
U
O
S
E
T
A
G
-
 
,
 
 
 
 
 
 
S
G
V
10
8
6
4
2
0
V     = 25V
DS
I   = 0.51A
D
0
0.2
0.4
0.8
Q    , GATE CHARGE (nC)
0.6
g
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
V     = 10V
DS
0.7
0.6
0.5
)
A
(
 
T
N
E
R
R
U
C
N
A
R
D
I
 
 
,
 
 
 
I
D
0.4
0.3
0.2
0.1
0
0
T   = -55°C
J
25°C
125°C
0.3
0.6
0.9
1.2
1.5
V     , GATE TO SOURCE VOLTAGE (V)
GS
Figure 11. Transconductance Variation with Drain
Current and Temperature.
1
1.2
NDC7002N.SAM
Typical Thermal Characteristics
1.2
)
W
(
 
1.1
I
I
I
 
N
O
T
A
P
S
S
D
R
E
W
O
P
E
T
A
T
S
Y
D
A
E
T
S
-
 
1a
1 b
1c
1
0.9
0.8
0.7
0.6
0
4.5"x5" FR-4 Board
T   = 25  C
Still  Air
A
o
0.2
0.8
2
2oz COPPER MOUNTING PAD AREA (in   )
0.4
0.6
0.55
0.5
1 b
0.45
1c
0.4
)
A
 
I
(
 
T
N
E
R
R
U
C
N
A
R
D
E
T
A
T
S
Y
D
A
E
T
S
-
 
 
,
 
 
 
I
D
0.35
0
1
1a
0.125
4.5"x5" FR-4 Board
T   = 25  C
Still  Air
V    = 10V
0.1
2
2oz COPPER MOUNTING PAD AREA (in   )
0.075
0.05
GS
A
o
0.025
Figure 12. SOT-6 Dual Package Maximum
Steady-State Power Dissipation versus Copper
Mounting Pad Area.
Figure 13. Maximum Steady-State Drain
Current versus Copper Mounting Pad
Area.
3
2
1
N )  L I M I T
S ( O
D
R
)
A
0.5
(
 
T
N
E
R
R
U
C
N
A
R
D
I
 
 
,
 
 
 
I
D
0.2
0.1
0.05
0.02
0.01
100us
1ms
10ms
  100ms
  1s
 DC 
V     = 10V
GS
SINGLE PULSE
R     = See Note 1c
q J A
T    = 25°C
A
1
2
5
10
20
50
70
V     , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 14.  Maximum Safe Operating Area.
 
I
E
V
T
C
E
F
F
E
D
E
Z
L
A
M
R
O
N
I
 
,
)
t
(
r
I
 
E
C
N
A
T
S
S
E
R
L
A
M
R
E
H
T
T
N
E
S
N
A
R
T
I
 
1
0.5
0.2
0.1
0.05
0.02
 D = 0.5 
  0.2  
 0.1 
 0.05 
 0.02 
 0.01 
 Single Pulse 
   R       (t) = r(t)  *  R         
q JA
   R        = See Note 1c
q JA
q JA
P(pk)
 t  1
 t   2
A
T  - T    = P  * R       (t)
q JA
J
Duty Cycle, D = t   / t
1
2
0.01
0.0001
0.001
0.0 1
0.1
t  , TIME (sec)
1
1
1 0
1 0 0
3 0 0
Figure 15. Transient Thermal Response Curve.
Note:  Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.
NDC7002N.SAM
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging
Configuration: Figure 1.0
Customize Label
Antistatic Cover Tape
F63TNR
Label
Embossed
Carrier Tape
Packaging Description:
SSOT-6   parts  are  shipped  in  tape.  The  carrier  tape  is
made  from  a  dissipative  (carbon  filled)  polycarbonate
resin. The  cover tape is a multilayer film  (Heat  Activated
Adhesive in nature)  primarily composed  of polyester film,
adhesive  layer,  sealant,  and  anti-static  sprayed  agent.
These  reeled  parts  in  standard  option  are  shipped  with
3,000 units per 7" or  177cm diameter reel. The  reels  are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 10,000 units per 13"
or 330cm diameter reel. This and some other options are
described in the Packaging Information table.
These  full  reels  are  individually  barcode  labeled  and
placed inside a pizza box (illustrated in figure 1.0) made of
recyclable  corrugated  brown  paper  with  a  Fairchild  logo
printing.  One  pizza  box  contains  three  reels  maximum.
And  these  pizza  boxes  are  placed  inside  a  barcode
labeled  shipping  box  which  comes  in  different  sizes
depending on the number of parts shipped.
631
631
631
631
SSOT-6 Unit Orientation
631
Pin 1
343mm x 342mm x 64mm
Intermediate box fo r D87Z Option
F63TNR Label
SSOT-6 Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
Standard
(no  flow c ode)
TNR
3,000
7"  Dia
D87Z
TNR
10,000
13"
184x187x47 343x343x64
9,000
0.0158
0.1440
30,000
0.0158
0.4700
F63TNR
Label
184mm x 187mm x 47mm
Pizza Box fo r Standar d Option
F63TNR
Label
SSOT-6 Tape Leader and Trailer
Configuration: Figure 2.0
F63TNR Label sampl e
LOT: CBVK741B019
QTY: 3000
FSID:  FDC633N
SPEC:
D/C1: D9842       QTY1:
D/C2:
      QTY2:
        SPEC REV:
        CPN:
N/F: F            (F63TNR)3
Carrier Tape
Cover Tape
Trailer Tape
300mm mi nimum  or
75 empty poc kets
Comp onent s
Lead er Tape
500mm mi nimum  or
125 emp ty poc kets
  1998  Fairchild  Semiconductor  Corporation
August 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape
Configuration: Figure 3.0
Wc
B0
P0
D0
E1
F
W
E2
T
K0
Tc
Pkg type
SSOT-6
(8mm)
A0
P1
D1
User Direction of Feed
Dimensions are in millimeter
A0
B0
W
D0
D1
E1
E2
F
P1
P0
K0
T
Wc
Tc
3.23
+/-0.10
3.18
+/-0.10
8.0
+/-0.3
1.55
+/-0.05
1.125
+/-0.125
1.75
+/-0.10
6.25
min
3.50
+/-0.05
4.0
+/-0.1
4.0
+/-0.1
1.37
+/-0.10
0.255
+/-0.150
5.2
+/-0.3
0.06
+/-0.02
Notes:  A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
B0
Sketch A (Side or Front Sectional View)
Component Rotation
A0
20 deg maximum
Typical
component
cavity
center line
Typical
component
center line
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
SSOT-6 Reel Configuration: Figure 4.0
Sketch B (Top View)
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
Dim N
See detail AA
7" Diameter Option
B Min
Dim C
See detail AA
W3
Dim D
min
13" Diameter Option
W2 max Measured at Hub
Dimensions are in inches and millimeters
DETAIL AA
Tape Size
8mm
8mm
Reel
Option
7" Dia
13" Dia
Dim A
Dim B
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
7.00
177.8
13.00
330
0.059
1.5
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
0.795
20.2
2.165
55
4.00
100
0.331 +0.059/-0.000
8.4 +1.5/0
0.331 +0.059/-0.000
8.4 +1.5/0
0.567
14.4
0.567
14.4
0.311 – 0.429
7.9 – 10.9
0.311 – 0.429
7.9 – 10.9
July 1999, Rev. C