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Cover
Overview
Table of Contents
List of Tables
List of Figures
1 Signal Description
1.1 Pin Description
1.1.1 88E1510/88E1518 48-Pin QFN Package Pinout
1.1.2 88E1512 56-Pin QFN Package Pinout
1.1.3 88E1514 56-Pin QFN Package Pinout
1.2 Pin Assignment List
1.2.1 88E1510 48-Pin QFN Pin Assignment List - Alphabetical by Signal Name
1.2.2 88E1518 48-Pin QFN Pin Assignment List - Alphabetical by Signal Name
1.2.3 88E1512 56-Pin QFN Pin Assignment List - Alphabetical by Signal Name
1.2.4 88E1514 56-Pin QFN Pin Assignment List - Alphabetical by Signal Name
2 PHY Functional Specifications
2.1 Modes of Operation and Major Interfaces
2.2 Copper Media Interface
2.2.1 Transmit Side Network Interface
2.2.2 Encoder
2.2.3 Receive Side Network Interface
2.2.4 Decoder
2.3 1.25 GHz SERDES Interface
2.3.1 Electrical Interface
2.4 MAC Interfaces
2.4.1 SGMII Interface
2.4.2 RGMII Interface
2.4.3 10/100 Mbps Functionality
2.4.4 TX_ER and RX_ER Coding
2.5 Loopback
2.5.1 System Interface Loopback
2.5.2 Synchronous SERDES Loopback
2.5.3 Line Loopback
2.5.4 External Loopback
2.6 Fiber/Copper Auto-Selection
2.6.1 Preferred Media
2.6.2 Definition of link in SGMII Media Interface in the context of auto media selection
2.6.3 Notes on Determining which Media Linked Up
2.7 Synchronizing FIFO
2.8 Resets
2.9 Power Management
2.9.1 Low Power Modes
2.9.2 RGMII/SGMII MAC Interface Power Down
2.10 Auto-Negotiation
2.10.1 10/100/1000BASE-T Auto-Negotiation
2.10.2 1000BASE-X Auto-Negotiation
2.10.3 SGMII Auto-Negotiation
2.11 Downshift Feature
2.12 Fast 1000BASE-T Link Down Indication
2.13 Advanced Virtual Cable Tester®
2.13.1 Maximum Peak
2.13.2 First Peak
2.13.3 Offset
2.13.4 Sample Point
2.13.5 Pulse Amplitude and Pulse Width
2.13.6 Drop Link
2.13.7 VCT™ with Link Up
2.13.8 Alternate VCT Control
2.14 Data Terminal Equipment (DTE) Detect
2.15 Energy Efficient Ethernet (EEE)
2.15.1 Energy Efficient Ethernet Low Power Modes
2.15.2 Energy Efficient Ethernet (EEE) Buffering for Master mode
2.15.3 Energy Efficient Ethernet Auto-Negotiation
2.16 CRC Error Counter and Frame Counter
2.16.1 Enabling The CRC Error Counter and Packet Counter
2.17 Packet Generator
2.18 RX_ER Byte Capture
2.19 1.25G PRBS Generator and Checker
2.20 MDI/MDIX Crossover
2.21 Unidirectional Transmit
2.22 Polarity Correction
2.23 FLP Exchange Complete with No Link
2.24 Duplex Mismatch Indicator
2.25 Link Disconnect Counter
2.26 LED
2.26.1 LED Polarity
2.26.2 Pulse Stretching and Blinking
2.26.3 Bi-Color LED Mixing
2.26.4 Modes of Operation
2.27 CLK125
2.27.1 Synchronous Ethernet Recovered Clock
2.28 Precise Timing Protocol (PTP) Time Stamping Support
2.28.1 PTP Control
2.28.2 Packet Time Stamping
2.28.3 Time Application Interface (TAI)
2.28.4 ReadPlus Command
2.29 Interrupt
2.30 Automatic and Manual Impedance Calibration
2.30.1 MAC Interface Calibration Circuit
2.30.2 MAC Interface Calibration Register Definitions
2.30.3 Changing Auto Calibration Targets
2.30.4 Manual Settings to The Calibration Registers
2.31 Configuring the 88E1510/88E1518/88E1512/88E1514 Device
2.31.1 Hardware Configuration
2.31.2 Software Configuration - Management Interface
2.32 Jumbo Packet Support
2.33 Temperature Sensor
2.34 Regulators and Power Supplies
2.34.1 AVDD18
2.34.2 AVDDC18
2.34.3 AVDD33
2.34.4 DVDD
2.34.5 REG_IN
2.34.6 AVDD18_OUT
2.34.7 DVDD_OUT
2.34.8 VDDO
2.34.9 Power Supply Sequencing
2.35 Wake on Lan (WOL) Event Detection
2.35.1 Wake Up Frame Event
2.35.2 Magic Packet Event
2.35.3 Link Change Event
3 88E1510/88E1518/88E1512/88E1514 Register Description
3.1 PHY MDIO Register Description
3.2 PHY XMDIO Register Description
4 Electrical Specifications
4.1 Absolute Maximum Ratings
4.2 Recommended Operating Conditions
4.3 Package Thermal Information
4.3.1 Thermal Conditions for 88E1510/88E1518 48-pin, QFN Package
4.3.2 Thermal Conditions for 88E1512/88E1514 56-pin, QFN Package
4.4 88E1510/88E1518 Current Consumption
4.4.1 Current Consumption AVDD18 + AVDDC18
4.4.2 Current Consumption AVDD33
4.4.3 Current Consumption DVDD
4.4.4 Current Consumption VDDO
4.5 88E1512 Current Consumption
4.5.1 Current Consumption AVDD18 + AVDDC18
4.5.2 Current Consumption AVDD33
4.5.3 Current Consumption DVDD
4.5.4 Current Consumption VDDO
4.6 DC Operating Conditions
4.6.1 Digital Pins
4.6.2 IEEE DC Transceiver Parameters
4.7 AC Electrical Specifications
4.7.1 Reset Timing
4.7.2 XTAL_IN/XTAL_OUT Timing
4.7.3 SyncE Recovered Clock Output Timing
4.7.4 LED to CONFIG Timing
4.8 SGMII Interface Timing
4.8.1 SGMII Output AC Characteristics
4.8.2 SGMII Input AC Characteristics
4.9 PTP Interface Timing
4.9.1 PTP Clock Input Timing
4.9.2 PTP Event Request Input AC Timing (LED[1])
4.9.3 PTP Trigger Generate Output AC Timing (LED[1])
4.10 RGMII Interface Timing
4.10.1 RGMII AC Characteristics
4.10.2 RGMII Delay Timing for different RGMII Modes
4.11 MDC/MDIO Timing
4.12 IEEE AC Transceiver Parameters
4.13 CLK125
4.14 Latency Timing
4.14.1 RGMII to 1000BASE-T Transmit Latency Timing
4.14.2 RGMII to 100BASE-TX Transmit Latency Timing
4.14.3 RGMII to 10BASE-T Transmit Latency Timing
4.14.4 1000BASE-T to RGMII Receive Latency Timing
4.14.5 100BASE-TX to RGMII Receive Latency Timing
4.14.6 10BASE-T to RGMII Receive Latency Timing
4.14.7 10/100/1000BASE-T to SGMII Latency Timing
4.14.8 SGMII to 10/100/1000BASE-T Latency Timing
5 Package Mechanical Dimensions
5.1 48-Pin QFN Package
5.2 56-Pin QFN Package
6 Order Information
6.1 Ordering Part Numbers and Package Markings
6.1.1 Package Marking Examples
6.1.2 Package Marking Samples
Back Cover
Cover ctro ele h Micro c w d m 7 ot-h 4 b b d hid m 0 4 y ctg 2 e 0jz 1 h q qig x g gt0 3 7 * Winte Alaska® 88E1510/88E1518/88E1512/ 88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 Document Classification: Proprietary Information Doc. No. MV-S107146-00, Rev. -- Marvell. Moving Forward Faster February 24, 2012 CONFIDENTIAL
ctro ele h Micro c d hid CONFIDENTIAL m 0 4 y 0jz 1 h 4 b b w d m 7 ot-h q qig x ctg 2 e Warning: Indicates a risk of personal injury. Document Conventions 7 * Winte Document Status Doc Status: Advance Note: Provides related information or information of special importance. g gt0 Technical Publication: 0.0x 3 Caution: Indicates potential damage to hardware or software, or loss of data. Alaska® 88E1510/88E1518/88E1512/88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 Disclaimer No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose. Further, Marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. Marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situation if any such products failed. Do not use Marvell products in these types of equipment or applications. With respect to the products described herein, the user or recipient, in the absence of appropriate U.S. government authorization, agrees: 1) Not to re-export or release any such information consisting of technology, software or source code controlled for national security reasons by the U.S. Export Control Regulations ("EAR"), to a national of EAR Country Groups D:1 or E:2; 2) Not to export the direct product of such technology or such software, to EAR Country Groups D:1 or E:2, if such technology or software and direct products thereof are controlled for national security reasons by the EAR; and, 3) In the case of technology controlled for national security reasons under the EAR where the direct product of the technology is a complete plant or component of a plant, not to export to EAR Country Groups D:1 or E:2 the direct product of the plant or major component thereof, if such direct product is controlled for national security reasons by the EAR, or is subject to controls under the U.S. Munitions List ("USML"). At all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this document in connection with their receipt of any such information. Copyright © 1999–2012. Marvell International Ltd. All rights reserved. M Logo, Marvell, Moving Forward Faster, Alaska, Link Street, Prestera, Virtual Cable Tester, Yukon, Datacom Systems On Silicon, AnyVoltage, DSP Switcher, Feroceon, ZX, ZXSTREAM, Armada, Qdeo & Design, QuietVideo, TopDog, TwinD, and Kinoma are registered trademarks of Marvell or its affiliates. Avanta, Avastar, Carrierspan, DragonFly, HyperDuo, HyperScale, Kirkwood, LinkCrypt, Marvell Smart, The World As You See It, Turbosan, and Vmeta are trademarks of Marvell or its affiliates. For more information, visit our website at: www.marvell.com Doc. No. MV-S107146-00 Rev. -- Page 2 Copyright © 2012 Marvell February 24, 2012, Advance Document Classification: Proprietary Information
ctro ele h Micro c 7 * Winte m 0 4 y OVERVIEW interface ctg 2 m 7 ot-h 0jz 1 h q qig x 4 b b w The device uses advanced mixed-signal processing to perform equalization, echo and crosstalk cancellation, data recovery, and error correction at a gigabit per second data rate. The device achieves robust performance in noisy environments with very low power dissipation. d The Alaska® 88E1510/88E1518/88E1512/88E1514 g gt0 device is a physical layer device containing a single 10/100/1000 Gigabit Ethernet transceiver. The 3 transceiver implements the Ethernet physical layer portion of the 1000BASE-T, 100BASE-TX, and 10BASE-T standards. It is manufactured using standard digital CMOS process and contains all the active circuitry required to implement the physical layer functions to transmit and receive data on standard CAT 5 unshielded twisted pair. d hid identification of potential cable malfunctions, thus reducing equipment returns and service calls. Using VCT, the Alaska device detects and reports potential cabling issues such as pair swaps, pair polarity and excessive pair skew. The device will also detect cable opens, shorts or any impedance mismatch in the cable e and reporting accurately within one meter the distance to the fault. The device supports the RGMII (Reduced pin count GMII) and SGMII for direct connection to a MAC/Switch port. The SGMII can also be used on media/line side to connect to SFP modules that support 1000BASE-X, 100BASE-FX and SGMII. It also supports Copper/Fiber Auto-media applications with RGMII as the MAC interface. SGMII operates at 1.25 Gbps over a single differential pair thus reducing power and number of I/Os used on the MAC interface. Alaska® 88E1510/88E1518/88E1512/88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 The device integrates MDI interface termination resistors into the PHY. This resistor integration simplifies board layout and reduces board cost by reducing the number of external components. The new Marvell® calibrated resistor scheme will achieve and exceed the accuracy requirements of the IEEE 802.3 return loss specifications. RGMII to Copper SGMII to Copper (88E1512/88E1514 device only) RGMII to Fiber/SGMII (88E1512 device only) RGMII to Copper/Fiber/SGMII with Auto-Media The 88E1510/88E1518/88E1512/88E1514 device supports Synchronous Ethernet (SyncE) and Precise Timing Protocol (PTP) Time Stamping, which is based on IEEE1588 version 2 and IEEE802.1AS. The device has an integrated switching voltage regulator to generate all required voltages. The device can run off a single 3.3V supply. The device supports 1.8V, 2.5V, and 3.3V LVCMOS I/O Standards. Features  10/100/1000BASE-T IEEE 802.3 compliant  Multiple Operating Modes The device incorporates the Marvell Advanced Virtual Cable Tester® (VCT™) feature, which uses Time Domain Reflectometry (TDR) technology for the remote The 88E1510/88E1518/88E1512/88E1514 device supports IEEE 802.3az-2010 Energy Efficient Ethernet (EEE) and is IEEE 802.3az-2010 compliant.  Ultra Low Power  Integrated MDI interface termination resistors that delays - This eliminates the need for adding trace delays on the PCB Incorporates EEE buffering for seamless support of legacy MACs Detect (88E1512 device only) Copper to Fiber (1000BASE-X) eliminate passive components  Integrated Switching Voltage Regulators  Supports Energy Efficient Ethernet (EEE) - IEEE  Supports 1000BASE-X and 100BASE-FX on the Fiber interface along with SGMII  Supports LVCMOS I/O Standards on the RGMII  Four RGMII timing modes including integrated CONFIDENTIAL Document Classification: Proprietary Information Doc. No. MV-S107146-00 Rev. -- Page 3 802.3az-2010 compliant EEE Buffering Copyright © 2012 Marvell February 24, 2012, Advance (88E1512/88E1514)
ctro ele h Micro c y m Yes 88E1514 operation d Table 1: Features Yes Yes Yes LED testing 88E1510 88E1518 88E1512 ctg 2 e 0jz 1 h 7 ot-h SGMII to Copper RGMII to Copper 88E1512 only) m 0 modes 4 RGMII to Fiber/SGMII q qig x switching regulator g gt0 3 RGMII to Copper/Fiber/SGMII with Auto-Media Detect 7 * Winte  48-Pin QFN 7 mm x 7 mm Green package with 88E1510/88E1518/88E1512/88E1514 Device Features  I/O pads can be supplied with 1.8V, 2.5V, or 3.3V  Commercial grade, Industrial grade (88E1510 and EPAD (88E1510 and 88E1518) and 56-Pin QFN 8 mm x 8 mm Green package with EPAD (88E1512/88E1514 device) cancellers, and crosstalk cancellers b  Advanced digital baseline wander correction  Automatic MDI/MDIX crossover at all speeds of b 4 w  Supports Green Ethernet Active Power Save Mode Energy Detect and Energy Detect+ low power  Automatic polarity correction  IEEE 802.3 compliant Auto-Negotiation d hid  Software programmable LED modes including Alaska® 88E1510/88E1518/88E1512/88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver  IEEE1588 version 2 Time Stamping  Synchronous Ethernet (SyncE) Clock Recovery  Three loopback modes for diagnostics  “Downshift” mode for two-pair cable installations  Fully integrated digital adaptive equalizers, echo  MDC/XMDIO Management Interface  CRC checker, packet counter  Packet generation  Wake on Lan (WOL) event detection  Advanced Virtual Cable Tester® (VCT™)  Auto-Calibration for MAC Interface outputs  Temperature Sensor  Supports single 3.3V supply when using internal e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 Doc. No. MV-S107146-00 Rev. -- Page 4 IEEE 802.3az-2010 Energy Efficient Ethernet (EEE) Copyright © 2012 Marvell February 24, 2012, Advance Industrial/Commercial Temperature Document Classification: Proprietary Information Synchronous Ethernet (SyncE) Precise Timing Protocol (PTP) Wake on LAN (WOL) Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes I/O Voltage (VDDO) Auto-Media Detect Commercial Commercial 3.3V/2.5V/1.8V 3.3V/2.5V/1.8V No No No No Yes Yes Yes Yes No Yes No No No No No Yes No No Yes Commercial Industrial Copper to Fiber 3.3V/2.5V 1.8V only EEE Buffering Commercial 48-pin QFN 56-pin QFN CONFIDENTIAL No Yes No Yes Package Industrial
ctro ele h Micro c M a g n e t i c s RJ-45 RJ-45 m 7 h m 0 4 y b b w e v i s s a P d e t a r g e t n I n o i t a n m r e T i e v i s s a P d e t a r g e t n I n o i t a n m r e T i 10/100/1000 Mbps Ethernet MAC 10/100/1000 Mbps Ethernet MAC ot-h 0jz 1 d hid ctg 2 88E1512/ 88E1514 Device Overview Features 88E1510/ 88E1518/ 88E1512 Device MAC Interface - SGMII/SERDES Media Types: - 10BASE-T - 100BASE-TX - 1000BASE-T M a e g n e t i c s Media Types: - 10BASE-T - 100BASE-TX - 1000BASE-T q MAC Interface qig - RGMII x 4 7 * Winte RGMII to Copper Device Application d g gt0 3 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 RGMII to Copper/Fiber/SGMII Auto-Media Application Copyright © 2012 Marvell February 24, 2012, Advance Doc. No. MV-S107146-00 Rev. -- Page 5 RGMII to Fiber/SGMII Application SGMII to Copper Application Media Type: - 1000BASE-T - 100BASE-TX - 10 BASE-T Document Classification: Proprietary Information Media Types: -X - 1000BASE - 100BASE -FX - SFP Media Types: - 1000BASE -X -FX - 100BASE - SFP MAC Interface - RGMII MAC Interface - RGMII 10/100/1000 Mbps 88E1512 Device 10/100/1000 Mbps Ethernet MAC i e v s s a P d e t a r g e t n I n o i t a n m r e T i e v i s s a P d e t a r g e t n I n o i i t a n m r e T 88E1512 Device CONFIDENTIAL Fiber Optics RJ-45 SERDES/ SGMII Fiber Optics SERDES/ SGMII M A G Ethernet MAC OR
ctro ele h Micro c m 1.2 e m 7 1 1.1 0 4 y h 0jz 1 q qig x Signal Description .......................................................................................................................18 Pin Description ................................................................................................................................................18 1.1.1 88E1510/88E1518 48-Pin QFN Package Pinout..............................................................................19 88E1512 56-Pin QFN Package Pinout .............................................................................................25 1.1.2 1.1.3 88E1514 56-Pin QFN Package Pinout .............................................................................................32 Pin Assignment List.........................................................................................................................................38 1.2.1 88E1510 48-Pin QFN Pin Assignment List - Alphabetical by Signal Name......................................38 88E1518 48-Pin QFN Pin Assignment List - Alphabetical by Signal Name......................................39 1.2.2 88E1512 56-Pin QFN Pin Assignment List - Alphabetical by Signal Name......................................40 1.2.3 1.2.4 88E1514 56-Pin QFN Pin Assignment List - Alphabetical by Signal Name......................................41 g gt0 3 d hid d b b 4 w 2 2.1 2.2 ot-h ctg 2 7 * Winte Table of Contents Alaska® 88E1510/88E1518/88E1512/88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 PHY Functional Specifications...................................................................................................42 Modes of Operation and Major Interfaces.......................................................................................................43 Copper Media Interface...................................................................................................................................45 2.2.1 Transmit Side Network Interface ......................................................................................................45 Encoder ............................................................................................................................................45 2.2.2 Receive Side Network Interface .......................................................................................................46 2.2.3 2.2.4 Decoder ............................................................................................................................................47 1.25 GHz SERDES Interface ..........................................................................................................................48 2.3.1 Electrical Interface ............................................................................................................................48 MAC Interfaces ...............................................................................................................................................49 SGMII Interface.................................................................................................................................49 2.4.1 RGMII Interface ................................................................................................................................50 2.4.2 2.4.3 10/100 Mbps Functionality................................................................................................................51 2.4.4 TX_ER and RX_ER Coding..............................................................................................................51 Loopback.........................................................................................................................................................52 System Interface Loopback ..............................................................................................................52 2.5.1 2.5.2 Synchronous SERDES Loopback ....................................................................................................53 Line Loopback ..................................................................................................................................54 2.5.3 2.5.4 External Loopback ............................................................................................................................56 Fiber/Copper Auto-Selection...........................................................................................................................57 2.6.1 Preferred Media ................................................................................................................................57 Definition of link in SGMII Media Interface in the context of auto media selection ...........................57 2.6.2 2.6.3 Notes on Determining which Media Linked Up .................................................................................58 Synchronizing FIFO ........................................................................................................................................59 Resets .............................................................................................................................................................60 Power Management ........................................................................................................................................61 Low Power Modes ............................................................................................................................61 2.9.1 2.9.2 RGMII/SGMII MAC Interface Power Down .......................................................................................63 Auto-Negotiation .............................................................................................................................................63 10/100/1000BASE-T Auto-Negotiation .............................................................................................63 2.10.1 2.10.2 1000BASE-X Auto-Negotiation.........................................................................................................64 2.10.3 SGMII Auto-Negotiation....................................................................................................................65 Downshift Feature ...........................................................................................................................................67 Doc. No. MV-S107146-00 Rev. -- Page 6 Copyright © 2012 Marvell February 24, 2012, Advance Document Classification: Proprietary Information 2.7 2.8 2.9 CONFIDENTIAL 2.3 2.4 2.10 2.5 2.6 2.11
ctro ele h Micro c d hid CONFIDENTIAL m m 7 2.14 2.15 2.16 4 b b w d 0jz 1 h q qig x ctg 2 e g gt0 3 Table of Contents 7 * Winte 2.12 2.13 2.17 2.18 2.19 2.20 2.21 2.22 2.23 2.24 2.25 2.26 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 Fast 1000BASE-T Link Down Indication .........................................................................................................68 Advanced Virtual Cable Tester®.....................................................................................................................68 2.13.1 Maximum Peak .................................................................................................................................69 0 4 2.13.2 First Peak..........................................................................................................................................70 y 2.13.3 Offset ................................................................................................................................................70 ot-h 2.13.4 Sample Point ....................................................................................................................................71 2.13.5 Pulse Amplitude and Pulse Width.....................................................................................................71 2.13.6 Drop Link ..........................................................................................................................................71 2.13.7 VCT™ with Link Up ..........................................................................................................................71 2.13.8 Alternate VCT Control.......................................................................................................................72 Data Terminal Equipment (DTE) Detect..........................................................................................................74 Energy Efficient Ethernet (EEE)......................................................................................................................75 2.15.1 Energy Efficient Ethernet Low Power Modes ...................................................................................75 2.15.2 Energy Efficient Ethernet (EEE) Buffering for Master mode.............................................................76 2.15.3 Energy Efficient Ethernet Auto-Negotiation ......................................................................................76 CRC Error Counter and Frame Counter..........................................................................................................77 2.16.1 Enabling The CRC Error Counter and Packet Counter ....................................................................77 Packet Generator ............................................................................................................................................77 RX_ER Byte Capture ......................................................................................................................................78 1.25G PRBS Generator and Checker .............................................................................................................79 MDI/MDIX Crossover ......................................................................................................................................80 Unidirectional Transmit ...................................................................................................................................80 Polarity Correction...........................................................................................................................................81 FLP Exchange Complete with No Link............................................................................................................81 Duplex Mismatch Indicator ..............................................................................................................................81 Link Disconnect Counter .................................................................................................................................82 LED .................................................................................................................................................................83 2.26.1 LED Polarity......................................................................................................................................83 2.26.2 Pulse Stretching and Blinking ...........................................................................................................84 2.26.3 Bi-Color LED Mixing .........................................................................................................................85 2.26.4 Modes of Operation ..........................................................................................................................86 CLK125 ...........................................................................................................................................................89 2.27.1 Synchronous Ethernet Recovered Clock..........................................................................................89 Precise Timing Protocol (PTP) Time Stamping Support .................................................................................90 2.28.1 PTP Control ......................................................................................................................................90 2.28.2 Packet Time Stamping......................................................................................................................91 2.28.3 Time Application Interface (TAI) .......................................................................................................92 2.28.4 ReadPlus Command.........................................................................................................................96 Interrupt...........................................................................................................................................................97 Automatic and Manual Impedance Calibration................................................................................................98 2.30.1 MAC Interface Calibration Circuit .....................................................................................................98 2.30.2 MAC Interface Calibration Register Definitions.................................................................................98 2.30.3 Changing Auto Calibration Targets...................................................................................................99 2.30.4 Manual Settings to The Calibration Registers ..................................................................................99 Configuring the 88E1510/88E1518/88E1512/88E1514 Device ....................................................................101 2.31.1 Hardware Configuration.................................................................................................................101 2.31.2 Software Configuration - Management Interface ............................................................................102 Jumbo Packet Support..................................................................................................................................103 Copyright © 2012 Marvell February 24, 2012, Advance Doc. No. MV-S107146-00 Rev. -- Page 7 Document Classification: Proprietary Information 2.27 2.28 2.31 2.32 2.29 2.30
ctro ele h Micro c m e m 7 y ot-h Temperature Sensor .....................................................................................................................................103 Regulators and Power Supplies....................................................................................................................104 2.34.1 AVDD18..........................................................................................................................................105 0 4 2.34.2 AVDDC18 .......................................................................................................................................105 2.34.3 AVDD33..........................................................................................................................................105 2.34.4 DVDD..............................................................................................................................................105 2.34.5 REG_IN ..........................................................................................................................................105 2.34.6 AVDD18_OUT ................................................................................................................................105 2.34.7 DVDD_OUT ....................................................................................................................................105 2.34.8 VDDO .............................................................................................................................................105 2.34.9 Power Supply Sequencing..............................................................................................................105 Wake on Lan (WOL) Event Detection ...........................................................................................................106 2.35.1 Wake Up Frame Event ...................................................................................................................106 2.35.2 Magic Packet Event ........................................................................................................................107 2.35.3 Link Change Event .........................................................................................................................107 g gt0 3 q qig x 0jz 1 d b b 4 h w 2.35 2.33 2.34 3 3.1 3.2 d hid ctg 2 4 4.1 4.2 4.3 7 * Winte Alaska® 88E1510/88E1518/88E1512/88E1514 Datasheet Integrated 10/100/1000 Mbps Energy Efficient Ethernet Transceiver 88E1510/88E1518/88E1512/88E1514 Register Description....................................................108 PHY MDIO Register Description ...................................................................................................................108 PHY XMDIO Register Description.................................................................................................................226 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 e2ctghidd3gt0gdwbb4xqigqh10jzot-h7my40m7 * Wintech Microelectronics Co., Ltd. MARVELL CONFIDENTIAL, UNDER NDA# 12102018 Electrical Specifications ...........................................................................................................230 Absolute Maximum Ratings ..........................................................................................................................230 Recommended Operating Conditions ...........................................................................................................231 Package Thermal Information .......................................................................................................................232 Thermal Conditions for 88E1510/88E1518 48-pin, QFN Package .................................................232 4.3.1 4.3.2 Thermal Conditions for 88E1512/88E1514 56-pin, QFN Package .................................................233 88E1510/88E1518 Current Consumption .....................................................................................................234 Current Consumption AVDD18 + AVDDC18 ..................................................................................234 4.4.1 4.4.2 Current Consumption AVDD33.......................................................................................................234 Current Consumption DVDD ..........................................................................................................235 4.4.3 4.4.4 Current Consumption VDDO ..........................................................................................................236 88E1512 Current Consumption.....................................................................................................................237 4.5.1 Current Consumption AVDD18 + AVDDC18 ..................................................................................237 Current Consumption AVDD33.......................................................................................................238 4.5.2 Current Consumption DVDD ..........................................................................................................239 4.5.3 4.5.4 Current Consumption VDDO ..........................................................................................................240 DC Operating Conditions ..............................................................................................................................241 Digital Pins......................................................................................................................................241 4.6.1 4.6.2 IEEE DC Transceiver Parameters ..................................................................................................242 AC Electrical Specifications ..........................................................................................................................243 4.7.1 Reset Timing...................................................................................................................................243 XTAL_IN/XTAL_OUT Timing..........................................................................................................244 4.7.2 SyncE Recovered Clock Output Timing ........................................................................................245 4.7.3 4.7.4 LED to CONFIG Timing ..................................................................................................................246 SGMII Interface Timing .................................................................................................................................247 SGMII Output AC Characteristics ...................................................................................................247 4.8.1 4.8.2 SGMII Input AC Characteristics......................................................................................................247 Doc. No. MV-S107146-00 Rev. -- Page 8 Copyright © 2012 Marvell February 24, 2012, Advance Document Classification: Proprietary Information CONFIDENTIAL 4.4 4.6 4.7 4.5 4.8
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