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T3_Datasheet_V1.1.pdf
Revision History
Declaration
Contents
Figures
Tables
About This Documentation
1. Overview
2. Features
2.1. CPU Architecture
2.2. GPU Architecture
2.3. Memory Subsystem
Boot ROM
SDRAM
NAND Flash
SMHC
2.4. System Peripheral
Timer
High Speed Timer
RTC
GIC
DMA
CCU
PWM
Thermal Sensor
Crypto Engine
Security ID
2.5. Video Engine
Video Decoder
Video Encoder
2.6. Display Subsystem
DE2.0
Video Output
2.7. Image In
2.8. Audio Subsystem
Audio Codec
I2S/PCM
One Wire Audio(OWA)
AC97
2.9. External Peripherals
USB
EMAC
GMAC
Transport Stream Controller
TWI
Smart Card Reader
SPI
UART
PS2
CIR
SATA
Keypad
KEYADC
RTP
2.10. Package
3. Block Diagram
4. Pin Description
4.1. Pin Characteristics
4.2. Signal Descriptions
5. Electrical Characteristics
5.1. Absolute Maximum Ratings
5.2. Recommended Operating Conditions
5.3. DC Electrical Characteristics
5.4. PLL Electrical Characteristics
5.4.1. CPU PLL Electrical Parameters
5.4.2. Audio PLL Electrical Parameters
5.4.3. GPU PLL Electrical Parameters
5.4.4. Peripheral0/1 PLL Electrical Parameters
5.4.5. MIPI PLL Electrical Parameters
5.4.6. DDR0/1 PLL Electrical Parameters
5.4.7. Video0/1 PLL Electrical Parameters
5.4.8. VE PLL Electrical Parameters
5.4.9. DE PLL Electrical Parameters
5.4.10. SATA PLL Electrical Parameters
5.5. KEYADC Electrical Characteristics
5.6. Oscillator Electrical Characteristics
5.7. Maximum Current Consumption
5.8. External Memory Electrical Characteristics
5.8.1. Nand AC Electrical Characteristics
5.8.2. SMHC AC Electrical Characteristics
5.9. External Peripherals Electrical Characteristics
5.9.1. LCD AC Electrical Characteristics
5.9.2. CSI AC Electrical Characteristics
5.9.3. EMAC AC Electrical Characteristics
5.9.4. PS2 AC Electrical Characteristics
5.9.5. CIR AC Electrical Characteristics
5.9.6. SPI AC Electrical Characteristics
5.9.7. UART AC Electrical Characteristics
5.9.8. TWI AC Electrical Characteristics
5.9.9. TSC AC Electrical Characteristics
5.9.10. AC97 AC Electrical Characteristics
5.9.11. SCR AC Electrical Characteristics
5.10. Power-up and Power-down Sequence
6. Package Thermal Characteristics
7. Pin Assignment
7.1. Pin Map
7.2. Package Dimension
T3 Datasheet
Smart Automotive Processor
Revision 1.1
Jun. 02, 2016
Copyright © 2016 Allwinner Technology Co.,Ltd. All Rights Reserved.
Confidential
Revision History
Revision History
Revision
1.0
1.1
Date
Apr.19,2016
Jun.02,2016
Description
Initial Release Version.
Update pin characteristics
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 2
Confidential
Declaration
Declaration
THIS DOCUMENTATION IS THE ORIGINAL WORK AND COPYRIGHTED PROPERTY OF ALLWINNER TECHNOLOGY
(“ALLWINNER”). REPRODUCTION IN WHOLE OR IN PART MUST OBTAIN THE WRITTEN APPROVAL OF ALLWINNER AND
GIVE CLEAR ACKNOWLEDGEMENT TO THE COPYRIGHT OWNER.
THE INFORMATION FURNISHED BY ALLWINNER IS BELIEVED TO BE ACCURATE AND RELIABLE. ALLWINNER RESERVES THE
RIGHT TO MAKE CHANGES IN CIRCUIT DESIGN AND/OR SPECIFICATIONS AT ANY TIME WITHOUT NOTICE. ALLWINNER
DOES NOT ASSUME ANY RESPONSIBILITY AND LIABILITY FOR ITS USE. NOR FOR ANY INFRINGEMENTS OF PATENTS OR
OTHER RIGHTS OF THE THIRD PARTIES WHICH MAY RESULT FROM ITS USE. NO LICENSE IS GRANTED BY IMPLICATION OR
OTHERWISE UNDER ANY PATENT OR PATENT RIGHTS OF ALLWINNER. THIS DATASHEET NEITHER STATES NOR IMPLIES
WARRANTY OF ANY KIND, INCLUDING FITNESS FOR ANY PARTICULAR APPLICATION.
THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT. CUSTOMERS SHALL BE SOLELY
RESPONSIBLE TO OBTAIN ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES. ALLWINNER SHALL NOT BE LIABLE FOR
ANY LICENCE FEE OR ROYALTY DUE IN RESPECT OF ANY REQUIRED THIRD PARTY LICENCE. ALLWINNER SHALL HAVE NO
WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS COVERED UNDER ANY REQUIRED THIRD
PARTY LICENCE.
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 3
Confidential
Contents
Contents
1. Overview ....................................................................................................................................................................... 12
2. Features ......................................................................................................................................................................... 13
2.1. CPU Architecture ................................................................................................................................................ 13
2.2. GPU Architecture ............................................................................................................................................... 13
2.3. Memory Subsystem............................................................................................................................................ 13
2.4. System Peripheral ............................................................................................................................................... 14
2.5. Video Engine ...................................................................................................................................................... 15
2.6. Display Subsystem .............................................................................................................................................. 16
2.7. Image In ...............................................................................................................................................................17
2.8. Audio Subsystem .................................................................................................................................................17
2.9. External Peripherals ........................................................................................................................................... 18
2.10. Package ............................................................................................................................................................ 21
3. Block Diagram ............................................................................................................................................................... 22
4. Pin Description .............................................................................................................................................................. 24
4.1. Pin Characteristics .............................................................................................................................................. 24
4.2. Signal Descriptions ..............................................................................................................................................51
5. Electrical Characteristics ............................................................................................................................................... 58
5.1. Absolute Maximum Ratings ............................................................................................................................... 58
5.2. Recommended Operating Conditions ................................................................................................................ 59
5.3. DC Electrical Characteristics ............................................................................................................................... 59
5.4. PLL Electrical Characteristics .............................................................................................................................. 60
5.4.1. CPU PLL Electrical Parameters ................................................................................................................. 60
5.4.2. Audio PLL Electrical Parameters .............................................................................................................. 60
5.4.3. GPU PLL Electrical Parameters ................................................................................................................ 60
5.4.4. Peripheral0/1 PLL Electrical Parameters .................................................................................................. 60
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 4
Confidential
Contents
5.4.5. MIPI PLL Electrical Parameters ................................................................................................................ 61
5.4.6. DDR0/1 PLL Electrical Parameters ........................................................................................................... 61
5.4.7. Video0/1 PLL Electrical Parameters ......................................................................................................... 61
5.4.8. VE PLL Electrical Parameters ................................................................................................................... 61
5.4.9. DE PLL Electrical Parameters ....................................................................................................................62
5.4.10. SATA PLL Electrical Parameters ...............................................................................................................62
5.5. KEYADC Electrical Characteristics ........................................................................................................................62
5.6. Oscillator Electrical Characteristics .....................................................................................................................62
5.7. Maximum Current Consumption ....................................................................................................................... 63
5.8. External Memory Electrical Characteristics ....................................................................................................... 64
5.8.1. Nand AC Electrical Characteristics ........................................................................................................... 64
5.8.2. SMHC AC Electrical Characteristics ......................................................................................................... 68
5.9. External Peripherals Electrical Characteristics ................................................................................................... 69
5.9.1. LCD AC Electrical Characteristics ............................................................................................................. 69
5.9.2. CSI AC Electrical Characteristics .............................................................................................................. 71
5.9.3. EMAC AC Electrical Characteristics........................................................................................................... 72
5.9.4. PS2 AC Electrical Characteristics ..............................................................................................................73
5.9.5. CIR AC Electrical Characteristics ............................................................................................................... 74
5.9.6. SPI AC Electrical Characteristics ............................................................................................................... 74
5.9.7. UART AC Electrical Characteristics .......................................................................................................... 75
5.9.8. TWI AC Electrical Characteristics .............................................................................................................. 76
5.9.9. TSC AC Electrical Characteristics ............................................................................................................. 77
5.9.10. AC97 AC Electrical Characteristics ......................................................................................................... 77
5.9.11. SCR AC Electrical Characteristics ........................................................................................................... 80
5.10. Power-up and Power-down Sequence ............................................................................................................. 81
6. Package Thermal Characteristics ....................................................................................................................................82
7. Pin Assignment .............................................................................................................................................................. 83
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 5
Confidential
Contents
7.1. Pin Map .............................................................................................................................................................. 83
7.2. Package Dimension ............................................................................................................................................ 84
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 6
Confidential
Figures
Figures
Figure 3-1. T3 Block Diagram .............................................................................................................................................. 22
Figure 3-2. T3 Application Diagram ..................................................................................................................................... 23
Figure 5-1. Conventional Serial Access Cycle Timing (SAM0) ............................................................................................. 64
Figure 5-2. EDO Type Serial Access after Read Cycle Timing (SAM1) ................................................................................. 64
Figure 5-3. Extending EDO Type Serial Access Mode Timing (SAM2) ................................................................................. 65
Figure 5-4. Command Latch Cycle Timing ........................................................................................................................... 65
Figure 5-5. Address Latch Cycle Timing............................................................................................................................... 65
Figure 5-6. Write Data to Flash Cycle Timing ...................................................................................................................... 66
Figure 5-7. Waiting R/B# Ready Timing .............................................................................................................................. 66
Figure 5-8. WE# High to RE# Low Timing ............................................................................................................................ 66
Figure 5-9. RE# High to WE# Low Timing ............................................................................................................................ 67
Figure 5-10. Address to Data Loading Timing ..................................................................................................................... 67
Figure 5-11. SMHC in SDR Mode Output Timing ................................................................................................................ 68
Figure 5-12. SMHC in SDR Mode Input Timing ................................................................................................................... 68
Figure 5-13. HV_IF Interface Vertical Timing ...................................................................................................................... 69
Figure 5-14. HV_IF Interface Parallel Mode Horizontal Timing .......................................................................................... 69
Figure 5-15. HV_IF Interface Serial Mode Horizontal Timing ............................................................................................. 70
Figure 5-16. 8/10/12-bit CMOS Sensor Interface Timing.................................................................................................... 71
Figure 5-17. 16-bit YCbCr4:2:2 with Separate Sync Timing ................................................................................................ 71
Figure 5-18. 8-bit YCbCr4:2:2 with Embedded Syncs(BT656) Timing ................................................................................. 71
Figure 5-19. Data Sample Timing ........................................................................................................................................ 71
Figure 5-20. EMAC MII Interface Transmit Timing .............................................................................................................. 72
Figure 5-21. EMAC MII Interface Receive Timing................................................................................................................ 72
Figure 5-22. PS2 Timing for Master Transmit Data and Device Receive Data .................................................................... 73
Figure 5-23. PS2 Timing for Device Transmit Data and Master Receive Data .................................................................... 73
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 7
Confidential
Figures
Figure 5-24. PS2 Timing for Master Sending Command then Device Sending Response ................................................... 73
Figure 5-25. CIR-RX Timing .................................................................................................................................................. 74
Figure 5-26. SPI MOSI Timing .............................................................................................................................................. 74
Figure 5-27. SPI MISO Timing .............................................................................................................................................. 75
Figure 5-28. UART RX Timing .............................................................................................................................................. 75
Figure 5-29. UART nCTS Timing ........................................................................................................................................... 75
Figure 5-30. UART nRTS Timing ........................................................................................................................................... 76
Figure 5-31. TWI Timing ...................................................................................................................................................... 76
Figure 5-32. TSC Data and Clock Timing .............................................................................................................................. 77
Figure 5-33. AC97 Cold Reset Timing .................................................................................................................................. 77
Figure 5-34. AC97 Warm Reset Timing ............................................................................................................................... 77
Figure 5-35. AC-link Low Power Mode Timing .................................................................................................................... 78
Figure 5-36. BIT_CLK and SYNC Timing ............................................................................................................................... 78
Figure 5-37. AC-link Data Transmission Output and Input Timing...................................................................................... 78
Figure 5-38. Signal Rise and Fall Timing .............................................................................................................................. 78
Figure 5-39. SCR Activation and Cold Reset Timing ............................................................................................................ 80
Figure 5-40. SCR Warm Reset Timing.................................................................................................................................. 80
Figure 5-41. T3 Power Up Sequence ................................................................................................................................... 81
Figure 7-1. T3 Pin Map ........................................................................................................................................................ 83
Figure 7-2. T3 Package Dimension ...................................................................................................................................... 84
T3 Datasheet(Revision 1.1) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 8
Confidential
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