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MIPI Alliance Standard for Display Pixel Interface (DPI-2), vers....pdf

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1 Overview
1.1 Scope
1.2 Purpose
2 Terminology
2.1 Definitions
2.2 Abbreviations
2.3 Acronyms
3 References
4 Display Architectures and Interface Constructions
4.1 Display Architectures
5 Display Pixel Interface Interoperability
6 Interface Signal Description
6.1 Power Supply Connections
6.2 Interface Signals
7 Programmable Timing Parameters
8 Interface Color Coding
9 Interface Electrical Characteristics
9.1 Electrical Characteristics
10 DPI Timing Parameter Examples
11 Type 2 and Type 3 Display Architecture Control Interfaces
12 Type 4 Architecture Shutdown and Color Mode Signals
12.1 Shutdown for Type 4 Architecture
12.2 Color Mode for Type 4 Architecture
13 Command Set
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface MIPI Alliance Standard for Display Pixel Interface (DPI-2) Version 2.00 – 15 September 2005 MIPI Board Approved 23-Jan-2006 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. i
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface NOTICE OF DISCLAIMER The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled by any of the authors or developers of this material or MIPI. The material contained herein is provided on an “AS IS” basis and to the maximum extent permitted by applicable law, this material is provided AS IS AND WITH ALL FAULTS, and the authors and developers of this material and MIPI hereby disclaim all other warranties and conditions, either express, implied or statutory, including, but not limited to, any (if any) implied warranties, duties or conditions of merchantability, of fitness for a particular purpose, of accuracy or completeness of responses, of results, of workmanlike effort, of lack of viruses, and of lack of negligence. ALSO, THERE IS NO WARRANTY OF CONDITION OF TITLE, QUIET ENJOYMENT, QUIET POSSESSION, CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD TO THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT. IN NO EVENT WILL ANY AUTHOR OR DEVELOPER OF THIS MATERIAL OR THE CONTENTS OF THIS DOCUMENT OR MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL, CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER CONTRACT, TORT, WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR ANY OTHER AGREEMENT, SPECIFICATION OR DOCUMENT RELATING TO THIS MATERIAL, WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. Without limiting the generality of this Disclaimer stated above, the user of the contents of this Document is further notified that MIPI: (a) does not evaluate, test or verify the accuracy, soundness or credibility of the contents of this Document; (b) does not monitor or enforce compliance with the contents of this Document; and (c) does not certify, test, or in any manner investigate products or services or any claims of compliance with the contents of this Document. The use or implementation of the contents of this Document may involve or require the use of intellectual property rights ("IPR") including (but not limited to) patents, patent applications, or copyrights owned by one or more parties, whether or not Members of MIPI. MIPI does not make any search or investigation for IPR, nor does MIPI require or request the disclosure of any IPR or claims of IPR as respects the contents of this Document or otherwise. Questions pertaining to this document, or the terms or conditions of its provision, should be addressed to: MIPI Alliance, Inc. c/o IEEE-ISTO 445 Hoes Lane Piscataway, NJ 08854 Attn: Board Secretary 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. ii
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface 1.1 1.2 2.1 2.2 2.3 Contents Version 2.00 – 15 September 2005 ..................................................................................................................i 1 Overview .................................................................................................................................................4 Scope ...............................................................................................................................................4 Purpose ............................................................................................................................................4 2 Terminology ............................................................................................................................................5 Definitions .......................................................................................................................................5 Abbreviations ..................................................................................................................................5 Acronyms ........................................................................................................................................6 3 References ...............................................................................................................................................7 4 Display Architectures and Interface Constructions .................................................................................8 Display Architectures ......................................................................................................................8 5 Display Pixel Interface Interoperability.................................................................................................13 Interface Signal Description ..................................................................................................................15 6 Power Supply Connections............................................................................................................15 Interface Signals ............................................................................................................................15 Programmable Timing Parameters ........................................................................................................16 Interface Color Coding ..........................................................................................................................18 Interface Electrical Characteristics........................................................................................................20 Electrical Characteristics ...............................................................................................................20 DPI Timing Parameter Examples ......................................................................................................23 Type 2 and Type 3 Display Architecture Control Interfaces.............................................................30 Type 4 Architecture Shutdown and Color Mode Signals ..................................................................31 12.1 Shutdown for Type 4 Architecture ................................................................................................31 12.2 Color Mode for Type 4 Architecture.............................................................................................33 Command Set ....................................................................................................................................34 6.1 6.2 7 8 9 10 11 12 13 4.1 9.1 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. iii
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface MIPI Alliance Standard for Display Pixel Interface 1 Overview This document describes Display Pixel Interface (DPI), which is used for Active-Matrix LCD displays for handheld devices. The interface may be configured with data path of 16, 18 or 24 parallel data bits, and several control signals. This document specifies the interface requirements for both ends (host and display) of the link, including the following attributes: • Electrical • Timing • Pixel formats (mapping of pixel bits to data signals) • Command set to control display behaviors 1.1 Scope The scope of this document is to specify an electrical and logical interface between a host system (processor or controller) and an active-matrix (AM) display module. The specification is intended for display modules in mobile devices, with display resolution up to 800x480 pixels. This specification does not apply to passive-matrix display modules. Included, and within the scope of this specification, is the power supply for interface signaling between the host processor and the display module. However, power supply for other functions in the display module are beyond the scope of this specification. 1.2 Purpose The Display Pixel Interface specification is used by manufacturers to design products that adhere to MIPI specifications for mobile device processor, camera and display interfaces. Implementing the DPI standard reduces the time-to-market and design cost of mobile devices by simplifying the interconnection of products from different manufacturers. In addition, adding new features such as larger or additional displays to mobile devices is simplified due to the extensible nature of the MIPI specifications. 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. 4
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface 2 Terminology 2.1 Definitions Command: Digital information used to control display behavior and to identify the connected display module Data: Digital image data stored in the frame memory or numerical information to define the display module behavior accompanied with a command Display Controller: Isolated IC silicon chip or integrated functional block in the host processor to control a display module; may or may not include frame memory Display Device: Functional device which can show image, such as Liquid Crystal Displays Display Driver IC: IC silicon chip in a display module used to control the display device; may or may not include frame memory Display Glass: Same as display device, coming from material name Display Module: Functional module to show image on it, can consists of display device, display driver IC, other peripheral components and circuits and display interface Display Panel: Same as Display Device, coming from the physical outward appearance of the display device Frame Memory: Memory device integrated in a display driver IC or display controller in order to provide image data for refreshing the display device. Full-frame memory provides a full screen area of image data while partial-frame memory only provides memory for a portion of the screen area. Type 1 Display Architecture: One of the defined display module architectures. In DSI, DBI, DPI, and DCS, a display module architecture in which a display module includes a display device, display driver IC, full-frame memory, registers, timing controller, non-volatile memory and control interface. Type 2 Display Architecture: One of the defined display module architectures. In DSI, DBI, DPI, and DCS, a display module architecture in which a display module includes a display device, display driver IC, partial-frame memory, registers, timing controller, non-volatile memory, control interface and video stream interface. Type 3 Display Architecture: One of the defined display module architectures. In DSI, DBI, DPI, and DCS, a display module architecture in which a display module includes a display device, display driver IC, registers, timing controller, non-volatile memory, control interface and video stream interface. Type 4 Display Architecture: One of the defined display module architectures. In DSI, DBI, DPI, and DCS, a display module architecture in which a display module includes a display device, display driver IC, registers, timing controller, control lines and video stream interface. 2.2 Abbreviations High-Z High Impedance H-Sync Horizontal Synchronization 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. 5
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 Ta Ambient Temperature VDD Power Supply VDDI Logic Level Supply V-Sync Vertical Synchronization 2.3 Acronyms AGND Analog ground, for power connection AM Active Matrix ASIC Application Specific Integrated Circuit CM Color Mode CMOS Complementary Metal Oxide Semiconductor DBI Display Bus Interface DCS Display Command Set DE Data Enable DGND Logic ground, for power connection DOI Dependent On Implementation HBP Horizontal Back Porch HFP Horizontal Front Porch I/O Input/Output LCD Liquid Crystal Display LSB Least Significant Bit MIPI Mobile Industry Processor Interface MSB Most Significant Bit PCLK Pixel Clock SD Shutdown VBP Vertical Back Porch VFP Vertical Front Porch Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. 6
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface 149 150 151 3 References [1] [2] MIPI Alliance Standard for Display Command Set, version 0.36, June 2005 MIPI Alliance Standard for Display Bus Interface, version 0.xx, August 2005 Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. 7
Version 2.00 15-Sep-2005 MIPI Alliance Standard for Display Pixel Interface 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 4 Display Architectures and Interface Constructions 4.1 Display Architectures The display module shall be based on Type 1, Type 2, Type 3 or Type 4 display architecture. The Type 1 Display Architecture should consist of the following functional blocks: Display Device. Used to show the image data. Display Driver. May be one or more devices used to drive the display device. Full-frame memory. Used to hold the image data; can be integrated in the display driver. Registers. Used to configure the display module behavior and hold identification information; can be integrated in the display driver. Timing Controller. Provides timing signals to control the display device and display driver based on configuration information; can be integrated in the display driver. Non-volatile memory. Used to store default register and configuration values; can be integrated in the display driver. Control Interface. Provides the interface between the host processor and the display driver; can be integrated in the display driver. Display Driving Circuit. As a part of display driver, used to convert timing signals and voltages to signals appropriate to drive the display device. Power Supply. Used to convert system voltages to levels usable by the display device and display driver; can be integrated in the display driver. Copyright © 2005-2006 MIPI Alliance, Inc. All rights reserved. MIPI Alliance Member Confidential. 8
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