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Model-Based Engineering - AADL.pdf

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    Model-Based Engineering with AADL: An Overview Peter Feiler phf@sei.cmu.edu © 2009 Carnegie Mellon University
    Outline AADL: The Language What’s New in AADL V2 Modeling with AADL AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 2
    AADL: Components and Connections Component type Component type identifier • component category • component category • extends • extends {component_type} • features (is) • features • subcomponents (requires) • flow specification • properties features • port • port group • parameter • access • subprogram implements type is one of application Component Category • data • subprogram • thread • thread group • process • memory • device • processor/virt. processor • bus/virt. bus • system •abstract platform composite Properties Properties • standard • user defined Property set property types property definitions property values MBE with AADL Course Component implementation identifier • extends {component implementation} • refines type • subcomponents • connections • call sequences • modes • flow implementation & end-to-end flows • properties Package Package public component classifier private component classifier Connections • data • event • event data • port group • access modes mode transitions mode configurations more details reference AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 3 3
    Application Components System: hierarchical organization of components System Process: protected address space process Thread group: organization of threads in processes Thread group Thread: a schedulable unit of concurrent execution Thread: a schedulable unit of concurrent execution Thread Data: potentially sharable data & datqa typing data Subprogram: callable unit of sequential code Subprogram AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 4 4
    Execution Platform Components Processor – provides thread scheduling and execution services Processor Virtual processor – hierarchical schedulers & partitions Virtual Processor Memory – provides storage for data and source code Memory Memory Bus – provides physical connectivity between hardware components Bus Virtual bus – virtual channels & protocols Virt Bus Device – interface to external environment, physical components Device MBE with AADL Course AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 5 5
    System Type system GPS features System speed_data: in data port metric_speed {SEI::BaseType => UInt16;}; geo_db: requires data access real_time_geoDB; s_control_data: out data port state_control; flows flows speed_control: flow path speed_data -> s_control_data; properties SEI::redundancy => Dual; end GPS; {type} extends features flows properties speed_data geo_db GPS s_control_data AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 6
    System Implementation system implementation GPS.secure subcomponents decoder: system PGP_decoder.basic; encoder: system PGP_encoder.basic; receiver: system GPS_receiver.basic; connections c1: data port speed_data -> decoder.in; c2: data port decoder.out -> receiver.in; c3: data port receiver.out -> encoder.in; c3: data port receiver.out -> encoder.in; c4: data port encoder.out -> s_control_data; flows {implementation} extends refines type subcomponents calls connections flows modes properties speed_control: flow path speed_data -> c1 -> decoder.fs1 -> c2 -> receiver.fs1 -> c3 -> decoder.fs1 -> c4 -> s_control_data; modes none; properties arch::redundancy_scheme => Primary_Backup; end GPS; AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 7
    Some Standard Properties Dispatch_Protocol => Periodic; Period => 100 ms; Compute_Deadline => value (Period); Compute_Execution_Time => 10 ms .. 20 ms; Compute_Entrypoint => “speed_control”; Source_Text => “waypoint.java”; Source_Code_Size => 12 KB; Thread_Swap_Execution_Time => 5 us.. 10 us; Clock_Jitter => 5 ps; Thread Code to be executed on dispatch File containing the application code Processor Allowed_Message_Size => 1 KB; Propagation_Delay => 1ps .. 2ps; Bus_Properties::Protocols => CSMA; Protocols is a user defined property Bus AADL Introduction Peter Feiler, June 2009 © 2009 Carnegie Mellon University 8
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