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Essentials Of Computer Organization And Architecture.pdf

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    PREFACE
    Contents
    CHAPTER 1 Introduction
    1.1 OVERVIEW
    1.2 THE MAIN COMPONENTS OF A COMPUTER
    1.3 AN EXAMPLE SYSTEM: WADING THROUGH THE JARGON
    1.4 STANDARDS ORGANIZATIONS
    1.5 HISTORICAL DEVELOPMENT
    1.5.1 Generation Zero: Mechanical Calculating Machines (1642–1945)
    1.5.2 The First Generation: Vacuum Tube Computers (1945–1953)
    1.5.3 The Second Generation: Transistorized Computers (1954–1965)
    1.5.4 The Third Generation: Integrated Circuit Computers (1965–1980)
    1.5.5 The Fourth Generation: VLSI Computers (1980–????)
    1.5.6 Moore’s Law
    1.6 THE COMPUTER LEVEL HIERARCHY
    1.7 THE VON NEUMANN MODEL
    1.8 NON–VON NEUMANN MODELS
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 2 Data Representation in Computer Systems
    2.1 INTRODUCTION
    2.2 POSITIONAL NUMBERING SYSTEMS
    2.3 DECIMAL TO BINARY CONVERSIONS
    2.3.1 Converting Unsigned Whole Numbers
    2.3.2 Converting Fractions
    2.3.3 Converting between Power-of-Two Radices
    2.4 SIGNED INTEGER REPRESENTATION
    2.4.1 Signed Magnitude
    2.4.2 Complement Systems
    2.5 FLOATING-POINT REPRESENTATION
    2.5.1 A Simple Model
    2.5.2 Floating-Point Arithmetic
    2.5.3 Floating-Point Errors
    2.5.4 The IEEE-754 Floating-Point Standard
    2.6 CHARACTER CODES
    2.6.1 Binary-Coded Decimal
    2.6.2 EBCDIC
    2.6.3 ASCII
    2.6.4 Unicode
    2.7 CODES FOR DATA RECORDING AND TRANSMISSION
    2.7.1 Non-Return-to-Zero Code
    2.7.2 Non-Return-to-Zero-Invert Encoding
    2.7.3 Phase Modulation (Manchester Coding)
    2.7.4 Frequency Modulation
    2.7.5 Run-Length-Limited Code
    2.8 ERROR DETECTION AND CORRECTION
    2.8.1 Cyclic Redundancy Check
    2.8.2 Hamming Codes
    2.8.3 Reed-Soloman
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 3 Boolean Algebra and Digital Logic
    3.1 INTRODUCTION
    3.2 BOOLEAN ALGEBRA
    3.2.1 Boolean Expressions
    3.2.2 Boolean Identities
    3.2.3 Simplification of Boolean Expressions
    3.2.4 Complements
    3.2.5 Representing Boolean Functions
    3.3 LOGIC GATES
    3.3.1 Symbols for Logic Gates
    3.3.2 Universal Gates
    3.3.3 Multiple Input Gates
    3.4 DIGITAL COMPONENTS
    3.4.1 Digital Circuits and Their Relationship to Boolean Algebra
    3.4.2 Integrated Circuits
    3.5 COMBINATIONAL CIRCUITS
    3.5.1 Basic Concepts
    3.5.2 Examples of Typical Combinational Circuits
    3.6 SEQUENTIAL CIRCUITS
    3.6.1 Basic Concepts
    3.6.2 Clocks
    3.6.3 Flip-Flops
    3.6.4 Examples of Sequential Circuits
    3.7 DESIGNING CIRCUITS
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    FOCUS ON KARNAUGH MAPS
    3A.1 INTRODUCTION
    3A.2 DESCRIPTION OF KMAPS AND TERMINOLOGY
    3A.3 KMAP SIMPLIFICATION FOR TWO VARIABLES
    3A.4 KMAP SIMPLIFICATION FOR THREE VARIABLES
    3A.5 KMAP SIMPLIFICATION FOR FOUR VARIABLES
    3A.6 DON’T CARE CONDITIONS
    3A.7 SUMMARY
    EXERCISES
    CHAPTER 4 MARIE: An Introduction to a Simple Computer
    4.1 INTRODUCTION
    4.1.1 CPU Basics and Organization
    4.1.2 The Bus
    4.1.3 Clocks
    4.1.4 The Input/Output Subsystem
    4.1.5 Memory Organization and Addressing
    4.1.6 Interrupts
    4.2 MARIE
    4.2.1 The Architecture
    4.2.2 Registers and Buses
    4.2.3 The Instruction Set Architecture
    4.2.4 Register Transfer Notation
    4.3 INSTRUCTION PROCESSING
    4.3.1 The Fetch-Decode-Execute Cycle
    4.3.2 Interrupts and I/O
    4.4 A SIMPLE PROGRAM
    4.5 A DISCUSSION ON ASSEMBLERS
    4.5.1 What Do Assemblers Do?
    4.5.2 Why Use Assembly Language?
    4.6 EXTENDING OUR INSTRUCTION SET
    4.7 A DISCUSSION ON DECODING: HARDWIRED VS. MICROPROGRAMMED CONTROL
    4.8 REAL WORLD EXAMPLES OF COMPUTER ARCHITECTURES
    4.8.1 Intel Architectures
    4.8.2 MIPS Architectures
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 5 A Closer Look at Instruction Set Architectures
    5.1 INTRODUCTION
    5.2 INSTRUCTION FORMATS
    5.2.1 Design Decisions for Instruction Sets
    5.2.2 Little versus Big Endian
    5.2.3 Internal Storage in the CPU: Stacks versus Registers
    5.2.4 Number of Operands and Instruction Length
    5.2.5 Expanding Opcodes
    5.3 INSTRUCTION TYPES
    5.4 ADDRESSING
    5.4.1 Data Types
    5.4.2 Address Modes
    5.5 INSTRUCTION-LEVEL PIPELINING
    5.6 REAL-WORLD EXAMPLES OF ISAs
    5.6.1 Intel
    5.6.2 MIPS
    5.6.3 Java Virtual Machine
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 6 Memory
    6.1 INTRODUCTION
    6.2 TYPES OF MEMORY
    6.3 THE MEMORY HIERARCHY
    6.3.1 Locality of Reference
    6.4 CACHE MEMORY
    6.4.1 Cache Mapping Schemes
    6.4.2 Replacement Policies
    6.4.3 Effective Access Time and Hit Ratio
    6.4.4 When Does Caching Break Down?
    6.4.5 Cache Write Policies
    6.5 VIRTUAL MEMORY
    6.5.1 Paging
    6.5.2 Effective Access Time Using Paging
    6.5.3 Putting It All Together: Using Cache, TLBs, and Paging
    6.5.4 Advantages and Disadvantages of Paging and Virtual Memory
    6.5.5 Segmentation
    6.5.6 Paging Combined with Segmentation
    6.6 A REAL-WORLD EXAMPLE OF MEMORY MANAGEMENT
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 7 Input/Output and Storage Systems
    7.1 INTRODUCTION
    7.2 AMDAHL’S LAW
    7.3 I/O ARCHITECTURES
    7.3.1 I/O Control Methods
    7.3.2 I/O Bus Operation
    7.3.3 Another Look at Interrupt-Driven I/O
    7.4 MAGNETIC DISK TECHNOLOGY
    7.4.1 Rigid Disk Drives
    7.4.2 Flexible (Floppy) Disks
    7.5 OPTICAL DISKS
    7.5.1 CD-ROM
    7.5.2 DVD
    7.5.3 Optical Disk Recording Methods
    7.6 MAGNETIC TAPE
    7.7 RAID
    7.7.1 RAID Level 0
    7.7.2 RAID Level 1
    7.7.3 RAID Level 2
    7.7.4 RAID Level 3
    7.7.5 RAID Level 4
    7.7.6 RAID Level 5
    7.7.7 RAID Level 6
    7.7.8 Hybrid RAID Systems
    7.8 DATA COMPRESSION
    7.8.1 Statistical Coding
    7.8.2 Ziv-Lempel (LZ) Dictionary Systems
    7.8.3 GIF Compression
    7.8.4 JPEG Compression
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    FOCUS ON SELECTED DISK STORAGE IMPLEMENTATIONS
    7A.1 INTRODUCTION
    7A.2 DATA TRANSMISSION MODES
    7A.2.1 Parallel Data Transmission
    7A.2.2 Serial Data Transmission
    7A.3 SCSI
    7A.3.1 “Classic” Parallel SCSI
    7A.3.2 The SCSI-3 Architecture Model
    7A.4 STORAGE AREA NETWORKS
    7A.5 OTHER I/O CONNECTIONS
    7A.5.1 Parallel Buses: XT to ATA
    7A.5.2 Peripheral Component Interconnect
    7A.5.3 A Serial Interface: USB
    7A.5.4 High Performance Peripheral Interface: HIPPI
    7A.6 SUMMARY
    EXERCISES
    CHAPTER 8 System Software
    8.1 INTRODUCTION
    8.2 OPERATING SYSTEMS
    8.2.1 Operating Systems History
    8.2.2 Operating System Design
    8.2.3 Operating System Services
    8.3 PROTECTED ENVIRONMENTS
    8.3.1 Virtual Machines
    8.3.2 Subsystems and Partitions
    8.3.3 Protected Environments and the Evolution of Systems Architectures
    8.4 PROGRAMMING TOOLS
    8.4.1 Assemblers and Assembly
    8.4.2 Link Editors
    8.4.3 Dynamic Link Libraries
    8.4.4 Compilers
    8.4.5 Interpreters
    8.5 JAVA: ALL OF THE ABOVE
    8.6 DATABASE SOFTWARE
    8.7 TRANSACTION MANAGERS
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 9 Alternative Architectures
    9.1 INTRODUCTION
    9.2 RISC MACHINES
    9.3 FLYNN’S TAXONOMY
    9.4 PARALLEL AND MULTIPROCESSOR ARCHITECTURES
    9.4.1 Superscalar and VLIW
    9.4.2 Vector Processors
    9.4.3 Interconnection Networks
    9.4.4 Shared Memory Multiprocessors
    9.4.5 Distributed Computing
    9.5 ALTERNATIVE PARALLEL PROCESSING APPROACHES
    9.5.1 Dataflow Computing
    9.5.2 Neural Networks
    9.5.3 Systolic Arrays
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 10 Performance Measurement and Analysis
    10.1 INTRODUCTION
    10.2 THE BASIC COMPUTER PERFORMANCE EQUATION
    10.3 MATHEMATICAL PRELIMINARIES
    10.3.1 What the Means Mean
    10.3.2 The Statistics and Semantics
    10.4 BENCHMARKING
    10.4.1 Clock Rate, MIPS, and FLOPS
    10.4.2 Synthetic Benchmarks: Whetstone, Linpack, and Dhrystone
    10.4.3 Standard Performance Evaluation Corporation Benchmarks
    10.4.4 Transaction Performance Council Benchmarks
    10.4.5 System Simulation
    10.5 CPU PERFORMANCE OPTIMIZATION
    10.5.1 Branch Optimization
    10.5.2 Use of Good Algorithms and Simple Code
    10.6 DISK PERFORMANCE
    10.6.1 Understanding the Problem
    10.6.2 Physical Considerations
    10.6.3 Logical Considerations
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    CHAPTER 11 Network Organization and Architecture
    11.1 INTRODUCTION
    11.2 EARLY BUSINESS COMPUTER NETWORKS
    11.3 EARLY ACADEMIC AND SCIENTIFIC NETWORKS: THE ROOTS AND ARCHITECTURE OF THE INTERNET
    11.4 NETWORK PROTOCOLS I: ISO/OSI PROTOCOL UNIFICATION
    11.4.1 A Parable
    11.4.2 The OSI Reference Model
    11.5 NETWORK PROTOCOLS II: TCP/IP NETWORK ARCHITECTURE
    11.5.1 The IP Layer for Version 4
    11.5.2 The Trouble with IP Version 4
    11.5.3 Transmission Control Protocol
    11.5.4 The TCP Protocol at Work
    11.5.5 IP Version 6
    11.6 NETWORK ORGANIZATION
    11.6.1 Physical Transmission Media
    11.6.2 Interface Cards
    11.6.3 Repeaters
    11.6.4 Hubs
    11.6.5 Switches
    11.6.6 Bridges and Gateways
    11.6.7 Routers and Routing
    11.7 HIGH-CAPACITY DIGITAL LINKS
    11.7.1 The Digital Hierarchy
    11.7.2 ISDN
    11.7.3 Asynchronous Transfer Mode
    11.8 A LOOK AT THE INTERNET
    11.8.1 Ramping on to the Internet
    11.8.2 Ramping up the Internet
    CHAPTER SUMMARY
    FURTHER READING
    REFERENCES
    REVIEW OF ESSENTIAL TERMS AND CONCEPTS
    EXERCISES
    APPENDIX A Data Structures and the Computer
    A.1 INTRODUCTION
    A.2 FUNDAMENTAL STRUCTURES
    A.2.1 Arrays
    A.2.2 Queues and Linked Lists
    A.2.3 Stacks
    A.3 TREES
    A.4 NETWORK GRAPHS
    SUMMARY
    FURTHER READING
    REFERENCES
    EXERCISES
    Glossary
    Answers and Hints for Selected Exercises
    Index
    t h e e s s e n t i a l s o f Linda Null and Julia Lobur J O N E S A N D B A R T L E T T C O M P U T E R S C I E N C E
    t h e e s s e n t i a l s o f Linda Null Pennsylvania State University Julia Lobur Pennsylvania State University
    World Headquarters Jones and Bartlett Publishers 40 Tall Pine Drive Sudbury, MA 01776 978-443-5000 info@jbpub.com www.jbpub.com Jones and Bartlett Publishers Canada 2406 Nikanna Road Mississauga, ON L5C 2W6 CANADA Jones and Bartlett Publishers International Barb House, Barb Mews London W6 7PA UK Copyright © 2003 by Jones and Bartlett Publishers, Inc. Cover image © David Buffington / Getty Images Illustrations based upon and drawn from art provided by Julia Lobur Library of Congress Cataloging-in-Publication Data Null, Linda. The essentials of computer organization and architecture / Linda Null, Julia Lobur. p. cm. ISBN 0-7637-0444-X 1. Computer organization. 2. Computer architecture. I. Lobur, Julia. II. Title. QA76.9.C643 N85 2003 004.2’2—dc21 All rights reserved. No part of the material protected by this copyright notice may be reproduced or utilized in any form, electronic or mechanical, including photocopying, recording, or any information storage or retrieval system, without written permission from the copyright owner. 2002040576 Chief Executive Officer: Clayton Jones Chief Operating Officer: Don W. Jones, Jr. Executive V.P. and Publisher: Robert W. Holland, Jr. V.P., Design and Production: Anne Spencer V.P., Manufacturing and Inventory Control: Therese Bräuer Director, Sales and Marketing: William Kane Editor-in-Chief, College: J. Michael Stranz Production Manager: Amy Rose Senior Marketing Manager: Nathan Schultz Associate Production Editor: Karen C. Ferreira Associate Editor: Theresa DiDonato Production Assistant: Jenny McIsaac Cover Design: Kristin E. Ohlin Composition: Northeast Compositors Text Design: Anne Flanagan Printing and Binding: Courier Westford Cover Printing: Jaguar Advanced Graphics This book was typeset in Quark 4.1 on a Macintosh G4. The font families used were Times, Mixage, and Prestige Elite. The first printing was printed on 45# Highland Plus. Printed in the United States of America 07 06 05 04 03 10 9 8 7 6 5 4 3 2 1
    In memory of my father, Merrill Cornell, a pilot and man of endless talent and courage, who taught me that when we step into the unknown, we either find solid ground, or we learn to fly. —L. M. N. To the loving memory of my mother, Anna J. Surowski, who made all things possible for her girls. —J. M. L.
    PREFACE TO THE STUDENT This is a book about computer organization and architecture. It focuses on the function and design of the various components necessary to process informa- tion digitally. We present computing systems as a series of layers, starting with low-level hardware and progressing to higher-level software, including assem- blers and operating systems. These levels constitute a hierarchy of virtual machines. The study of computer organization focuses on this hierarchy and the issues involved with how we partition the levels and how each level is imple- mented. The study of computer architecture focuses on the interface between hardware and software, and emphasizes the structure and behavior of the system. The majority of information contained in this textbook is devoted to computer hardware, and computer organization and architecture, and their relationship to software performance. Students invariably ask, “Why, if I am a computer science major, must I learn about computer hardware? Isn’t that for computer engineers? Why do I care what the inside of a computer looks like?” As computer users, we probably do not have to worry about this any more than we need to know what our car looks like under the hood in order to drive it. We can certainly write high-level lan- guage programs without understanding how these programs execute; we can use various application packages without understanding how they really work. But what happens when the program we have written needs to be faster and more v
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