ST75256
4 Level Gray Scale Dot Matrix LCD Controller/Driver
Datasheet
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2013 Sitronix Technology Corporation. All rights reserved.
Version 1.6b
This controller datasheet was downloaded from http://www.crystalfontz.com/controllers/Crystalfontz
ST75256
LIST OF CONTENT
1
INTRODUCTION ...................................................................................... 1
2 FEATURES .............................................................................................. 1
3 PAD ARRANGEMENT ............................................................................. 2
4 PAD CENTER COORDINATES ............................................................... 3
5 BLOCK DIAGRAM ................................................................................. 11
6 PIN DESCRIPTION ................................................................................ 12
6.1 POWER SUPPLY PINS ............................................................................................... 12
6.2 DRIVER OUTPUT PINS ............................................................................................... 14
6.3 CLOCK SYSTEM INPUT .............................................................................................. 15
6.4
INTERFACE LOGIC PINS ............................................................................................. 16
6.5 MASTER/SLAVE PINS ................................................................................................ 18
6.6 OTP PINS ................................................................................................................ 19
6.7 TEST PINS ............................................................................................................... 19
6.8
ITO RESISTANCE LIMITATION .................................................................................... 19
6.9
ITO LAYOUT GUIDE .................................................................................................. 20
6.10
ITO LAYOUT REFERENCE....................................................................................... 21
6.11 FOR VPP ............................................................................................................. 23
6.12 ENHANCE ESD PERFORMANCE FOR COG APPLICATION ........................................... 23
7 FUNCTION DESCRIPTION .................................................................... 24
7.1 MICROPROCESSOR INTERFACE .................................................................................. 24
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
7.1.6
7.1.7
Chip Select Input ....................................................................................................................................... 24
Parallel / Serial Interface ........................................................................................................................... 24
Parallel Interface ....................................................................................................................................... 24
Setting Serial Interface .............................................................................................................................. 25
4-Line Serial Interface ............................................................................................................................... 25
3-Line Serial Interface ............................................................................................................................... 26
I2C Interface .............................................................................................................................................. 27
7.2 DATA TRANSFER ...................................................................................................... 31
7.3 DISPLAY DATA RAM (DDRAM) ................................................................................ 32
7.3.1
7.3.2
7.3.3
7.3.4
Version 1.6b
Page Address Circuit ................................................................................................................................. 34
Column Address Circuit ............................................................................................................................. 34
I/O Buffer Circuit ........................................................................................................................................ 34
Display Data Latch Circuit ......................................................................................................................... 34
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
Data Orientation ........................................................................................................................................ 35
DDRAM Map to LCD Driver Output ........................................................................................................... 37
Set ICON ................................................................................................................................................... 41
Partial Display ........................................................................................................................................... 42
Area Scroll Display .................................................................................................................................... 42
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
7.3.10 Partial Display Application with COMSCN ................................................................................................. 43
7.4 LIQUID CRYSTAL DRIVER POWER CIRCUIT .................................................................. 44
7.4.1
7.4.2
External Component of Power Circuit ....................................................................................................... 44
Voltage Regulator Circuits ......................................................................................................................... 45
7.5 TEMPERATURE GRADIENT SELECTION CIRCUIT ........................................................... 47
SET V0 with temperature compensation (Temperature ≠ 24°C) ............................................................. 47
7.5.1
7.6 FREQUENCY TEMPERATURE GRADIENT COMPENSATION COEFFICIENT.......................... 49
7.6.1
Register Loading Detection ....................................................................................................................... 49
8 RESET CIRCUIT .................................................................................... 50
9 COMMAND ............................................................................................ 52
9.1
INSTRUCTION TABLE .......................................................................................... 52
9.2
INSTRUCTION DESCRIPTION ............................................................................. 56
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
Extension Command ................................................................................................................................. 56
Display ON/OFF ........................................................................................................................................ 56
Inverse Display .......................................................................................................................................... 56
All Pixel ON/OFF ....................................................................................................................................... 56
Display Control .......................................................................................................................................... 57
Power Save ............................................................................................................................................... 58
Set Page Address ..................................................................................................................................... 58
Set Column Address ................................................................................................................................. 58
Data Scan Direction .................................................................................................................................. 59
9.2.10 Write Data ................................................................................................................................................. 61
9.2.11 Read Data ................................................................................................................................................. 61
9.2.12 Partial In .................................................................................................................................................... 61
9.2.13 Partial Out ................................................................................................................................................. 62
9.2.14 Read /Modify/Write In ................................................................................................................................ 62
9.2.15 Read /Modify/Write Out ............................................................................................................................. 63
9.2.16 Scroll Area ................................................................................................................................................. 63
9.2.17 Scroll Start Address Set ............................................................................................................................ 64
9.2.18 OSC ON .................................................................................................................................................... 65
9.2.19 OSC OFF .................................................................................................................................................. 65
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
9.2.20 Power Control ............................................................................................................................................ 65
9.2.21 Set Vop...................................................................................................................................................... 66
9.2.22 Vop Control ............................................................................................................................................... 66
9.2.23 Read Register Mode ................................................................................................................................. 67
9.2.24 NOP .......................................................................................................................................................... 67
9.2.25 Read Status (Parallel and I2C) .................................................................................................................. 67
9.2.26 Read Status (4-Line and 3-Line SPI) ......................................................................................................... 68
9.2.27 Data Format Select ................................................................................................................................... 68
9.2.28 Display Mode ............................................................................................................................................. 68
9.2.29 Set ICON ................................................................................................................................................... 69
9.2.30 Set Master/Slave ....................................................................................................................................... 69
9.2.31 Set Gray Level ........................................................................................................................................... 70
9.2.32 Analog Circuit Set ...................................................................................................................................... 71
9.2.33 Booster Level ............................................................................................................................................ 71
9.2.34 Driving Select ............................................................................................................................................ 72
9.2.35 Auto Read Control ..................................................................................................................................... 72
9.2.36 OTP WR/RD Control ................................................................................................................................. 72
9.2.37 OTP Control Out ........................................................................................................................................ 72
9.2.38 OTP Write .................................................................................................................................................. 72
9.2.39 OTP Read ................................................................................................................................................. 73
9.2.40 OTP Selection Control ............................................................................................................................... 73
9.2.41 OTP Programming Setting ........................................................................................................................ 73
9.2.42
Frame Rate ............................................................................................................................................... 74
9.2.43
Temperature Range .................................................................................................................................. 75
9.2.44
Temperature Gradient Compensation ....................................................................................................... 75
9.2.45 Enable OTP ............................................................................................................................................... 76
10 OPERATION FLOW ............................................................................ 77
10.1 POWER ON .......................................................................................................... 77
10.2 POWER OFF ......................................................................................................... 79
10.3 OTP OPERATION .................................................................................................. 81
10.3.1 Referential OTP Burning Flow ................................................................................................................... 81
10.3.2 Referential OTP Operation Code .............................................................................................................. 82
11 HANDLING .......................................................................................... 86
12 ABSOLUTE MAXIMUM RATINGS ...................................................... 86
13 DC CHARACTERISTICS ..................................................................... 87
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
14 AC CHARATERISTIC .......................................................................... 89
14.1 SYSTEM BUS TIMING FOR 8080 MCU INTERFACE .................................................... 89
14.2 SYSTEM BUS TIMING FOR 6800 MCU INTERFACE .................................................... 90
14.3 SYSTEM BUS TIMING FOR 4-LINE SPI MCU INTERFACE............................................ 91
14.4 SYSTEM BUS TIMING FOR 3-LINE SPI MCU INTERFACE............................................ 92
14.5 SERIAL INTERFACE (I2C INTERFACE) ................................................................. 93
14.6 RESET TIMING ....................................................................................................... 94
15 APPLICATION NOTE .......................................................................... 95
15.1 APPLICATION CIRCUIT ............................................................................................ 95
15.1.1 Parallel 8080 Interface .............................................................................................................................. 95
15.1.2 Parallel 6800 Interface .............................................................................................................................. 96
15.1.3
4-Line SPI Interface ................................................................................................................................... 97
15.1.4
3-Line SPI Interface ................................................................................................................................... 98
15.1.5
I2C Interface .............................................................................................................................................. 99
16 MASTER/SLAVE MODE ................................................................... 100
16.1 CONNECTIONS BETWEEN LCD DRIVERS (REFERENCE EXAMPLE) ............................ 100
16.2 REFERENTIAL MASTER/SLAVE OPERATION CODE .................................................. 103
16.2.1 Referential Initial Code ............................................................................................................................ 103
16.2.2 Referential Power OFF Code .................................................................................................................. 106
17 COF PACKAGE................................................................................. 107
18 REVISION HISTORY ......................................................................... 108
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
LIST OF FIGURES
Figure 1 Chip Outline ...................................................................................................................................... 2
Figure 2 Block Diagram................................................................................................................................. 11
Figure 3 V0 ITO Layout.................................................................................................................................. 20
Figure 4 XV0 ITO Layout ............................................................................................................................... 20
Figure 5 VG ITO Layout ................................................................................................................................. 20
Figure 6 VSS ITO Layout ............................................................................................................................... 20
Figure 7 VDD ITO Layout .............................................................................................................................. 20
Figure 8 RSTB ITO Layout ............................................................................................................................ 23
Figure 9 Air ESD Protection Ring ................................................................................................................ 23
Figure 10 Write Operation of 4-Line SPI ...................................................................................................... 25
Figure 11 Read Operation of 4-Line SPI ...................................................................................................... 26
Figure 12 Write Operation of 3-Line SPI ...................................................................................................... 26
Figure 13 Read Operation of 3-Line SPI ...................................................................................................... 26
Figure 14 Bit Transfer .................................................................................................................................... 27
Figure 15 Definition of START and STOP Condition ................................................................................. 27
Figure 16 System Configuration .................................................................................................................. 28
Figure 17 Acknowledgement of I2C Interface ............................................................................................. 29
Figure 18 I2C Interface Protocol ................................................................................................................... 30
Figure 19 Data Transfer: Write ..................................................................................................................... 31
Figure 20 Data Transfer: Read ..................................................................................................................... 31
Figure 21 DDRAM Mapping (4-Level Gray Scale Mode) ............................................................................ 32
Figure 22 DDRAM Mapping (Monochrome Mode) ...................................................................................... 33
Figure 23 RAM Format and Addressing, if DO=0 (4-Level Gray Scale Mode) ......................................... 35
Figure 24 RAM Format and Addressing, if DO=1 (4-Level Gray Scale Mode) ......................................... 35
Figure 25 RAM Format and Addressing, if DO=0 (Monochrome Mode) ................................................... 36
Figure 26 RAM Format and Addressing, if DO=1 (Monochrome Mode) ................................................... 36
Figure 27 DDRAM Display Direction (Monochrome Mode; COMSCN=0) ................................................. 37
Figure 28 DDRAM Display Direction (4-Level Gray Scale Mode; COMSCN=0) ....................................... 38
Figure 29 DDRAM Display Direction (Monochrome Mode; COMSCN=1) ................................................. 39
Figure 30 DDRAM Display Direction (4-Level Gray Scale Mode; COMSCN=1) ....................................... 40
Figure 31 ICON DDRAM Display Direction .................................................................................................. 41
Figure 32 Command Sequence for Set ICON.............................................................................................. 41
Figure 33 Partial Display Definition ............................................................................................................. 42
Figure 34 Scroll Definition ............................................................................................................................ 42
Figure 35 64 duty and COMSCN = H ............................................................................................................ 43
Figure 36 64 duty and COMSCN = L ............................................................................................................ 43
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
Figure 37 Internal Power Supply Circuit ..................................................................................................... 44
Figure 38 External Power Supply Circuit .................................................................................................... 45
Figure 39 V0 Programming Range ............................................................................................................... 46
Figure 40 Temperature Compensation Coefficient Selection ................................................................... 47
Figure 41 Temperature Gradient Compensation ........................................................................................ 48
Figure 42 Frame Rate .................................................................................................................................... 49
Figure 41 Different RAM accessing setup under COMMAND 0xBCh ....................................................... 59
Figure 42 Different RAM accessing setup under COMMAND 0xBCh ....................................................... 60
Figure 45 Command Sequence for Read/Modify/Write .............................................................................. 62
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.
ST75256
LIST OF TABLES
Table 1 Parallel/Serial Interface Mode ......................................................................................................... 24
Table 2 Microprocessor Selection for Parallel Interface ........................................................................... 24
Table 3 Parallel Data Transfer ...................................................................................................................... 24
Table 4 Equation V0(T) at Different Temperature ....................................................................................... 48
Table 5 The Default Values of Registers ..................................................................................................... 51
Version 1.6b
2015/6
Sitronix Confidential The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or
disclosed in whole or in part without prior written permission of Sitronix.