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华为G9青春版 VNS-TL00&Dl00 原理图 电路图.pdf

发布时间：2022-03-29 发布人：admin 分类：说明书 资料大小：0.55M 资料格式：pdf 举报 版权申诉
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    1 2 3 4 5 6 59.GPS 60.WIFI/BT BB 61.WIFI/BT RF 62.Reserved 63.NFC 64.RESERVED 65.RESERVED 66.ANT Match 67.MAIN ANT Tuner 68.DRX ANT Tuner 69.Reserved AP SCHEMETIC 1. Contents 2. PM8952 Control and MPP/Clock 3. PMI8952 Charge 4. PMI8952 Power and Control 5. PM8952 SMPS 6. PM8952 LDO 7. PM8952 CODEC 8. MSM8952 Control 9. MSM8952 EBI 10. MSM8952 GPIO 11. MSM8952 MIPI and RF Control 12. MSM8952 Power1 13. MSM8952 Power2 14. MSM8952 GND 15. eMMC and LPDDR3 16. Battery/USB IF. 17. Speaker 18. MIC 19. Earphone 20. LCD/CTP IF. 21. Camera IF. 22. Sensor 23. SIM/TF IF. 24. Sidekey 25. Reserved (CTP IF.) 26. Test Points 27. NFC (PN548) 28. Fingerprint Module IF. 29. Shielding 30. Sub PCB IF. A B C D 31.RF Interface 32.RESERVED 33.Main Antenna Switcher 34.RESERVED 35.RESERVED 36.RESERVED 37.QFE2320(MMPA) 38.Circuit of MMPA 39.TRX_B1 40.TRX_B8 41.TRX_B5 42.TRX_B3/GSM1900 43.RESERVED 44.RESERVED 45.DRX LNA B3/B26 46.RESERVED 47.TRX_B41 48.RESERVED 49.RESERVED 50.RESERVED 51.DRX LNA B41/B1 52.DRX_B1/B3/B26 53.RESERVED 54.DRX_B41 55.DRX_ANT_SWITCH 56.WTR4905 57.RESERVED 58.ET_APT A B C D 1 2 3 4 5 6
    1 2 3 4 5 6 2. PM8952 Control and MPP/Clock PM_XO_THERM 4 N I - H T 1 3 / D N G T U O H T - 2 X201 GND_XOADC TP204 XTAL_19M_IN XTAL_19M_OUT KYPD_PWR_N SYSOK_PMI8952 PM_PON_RESET_N PS_HOLD PM_RESIN_N SPMI_CLK SPMI_DATA WTR0_XO_CLK WCN_XO_CLK WTR1_XO_CLK BBCLK_MSM_EN BB_CLK VREG_L16_1P8 PM_XO_THERM 1 1 D201 D202 2 2 R206 69 GND1 2 3 XTAL_19M_IN XTAL_19M_OUT 99 107 109 135 125 110 47 59 41 39 42 44 30 43 93 56 1 15 KYPD_PWR_N PON_1 PON_RESET_N PS_HOLD RESIN_N CBL_PWR_N SPMI_CLK SPMI_DATA RF_CLK1 RF_CLK2 LN_BB_CLK BB_CLK1_EN BB_CLK1 BB_CLK2 XO_THERM GND_XOADC GND_XO_ISO_1 GND_XO_ISO_2 U201 PM8952 6 f o 1 e c a f r e t n I K H AVDD_BYP GND2 VPH_PWR VCOIN OPT_1 OPT_2 PA_THERM DNC VREF_LPDDR SLEEP_CLK1 GND_XO GND_RFCLK REF_BYP GND_REF 108 55 60 130 96 97 104 46 68 98 16 17 45 32 C D A O X _ D N G I O S O X _ D N G S S G 6 0 2 G S 1 0 2 C S S G 1 0 2 G S AVDD_BYP C205 GND_AVDDBYP SG205 S G S VPH_PWR C206 C207 R208 VREG_L16_1P8 PA_THERM VREF_LPDDR3 SLEEP_CLK REF_BYP 4 0 2 C 1 F E R _ D N G S O X _ D N G S 2 0 2 G S S G 3 0 2 G S S G UIM_BATT_ALM VIB_EN U201 PM8952 23 GPIO_01 36 GPIO_02 49 GPIO_03 48 GPIO_04 58 GPIO_05 85 GPIO_06 134 GPIO_07 120 GPIO_08 6 f o 2 e c a f r e t n I O I P G MPP_01 MPP_02 MPP_03 MPP_04 131 117 73 86 VDD_PX_BIAS_MPP CHG_THERM VREF_DAC_MPP MSM_THERM U201 PM8952 70 GND3 71 GND4 81 GND5 82 GND6 83 GND7 84 GND8 94 GND9 95 GND10 6 f o 6 e c a f r e t n I D N G VREG_L16_1P8 3 0 2 R MSM_THERM RT201 close to MSM T 1 0 2 T R 9 0 2 C A B C D A B C D 1 2 3 4 5 6 2_PM8952 Control and MPP/Clock
    1 2 3 4 5 6 3. PMI8952 Charge A B C D VBUS_USB_IN 4 1 3 C 3 0 3 C USB_HS_DN_DET USB_HS_DP_DET SYSON R308 VBUS_USB_IN VREG_L5_1P8 CHG_VBAT BAT_ID PMI8952_VBIAS BAT_THERM PMI_CS_N PMI_CS_P BATT_NEG BATT_PLUS VREG_L5_1P8 R312 R310 C304 U301 PMI8952 3 f o 2 e c a f r e t n I E G R A H C 142 USB_IN1 143 USB_IN2 144 USB_IN3 123 111 80 101 81 140 104 88 100 92 55 102 124 86 97 73 61 74 62 42 122 78 79 99 109 115 USB_DM USB_DP USB_ID USB_CS WIPWR_DIV2_EN WIPWR_CHG_OK DC_SNS DC_EN USB_EN USB_SNS SHDN_N CHG_EN CHG_VBAT_SNS BATT_ID BATT_THERM CS_MINUS CS_PLUS BATT_MINUS BATT_PLUS VDD_MSM_IO GND_REF_CHG GNDC14 GNDC15 GNDC16 GNDC17 GNDC18 USB_MID1 USB_MID2 USB_MID3 GND_CHG1 GND_CHG2 GND_CHG3 FLASH_OUT1 FLASH_OUT2 FLASH_OUT3 BOOT_CAT VSW_CHG1 VSW_CHG2 VSW_CHG3 VSW_CHG4 VSW_CHG5 VSW_CHG6 VSW_CHG7 VSW_CHG8 VPH_PWR1 VPH_PWR2 VPH_PWR3 VPH_PWR4 CHG_OUT1 CHG_OUT2 CHG_OUT3 CHG_OUT4 CHG_LED WIPWR_RST_N PGOOD_SYSOK BUA USB_ID_RVAL1 USB_ID_RVAL2 R_BIAS V_ARB VAA_CAP GND_FG SYSON 130 131 132 128 129 141 94 95 96 105 106 107 108 116 117 118 119 120 114 127 138 139 113 125 126 137 91 89 103 43 90 112 85 135 98 110 93 G F _ D N G 2 1 3 C 0 1 3 C GND_CHG SG302 S G S 8 0 3 C 1 2 0 3 D 2 VIN_FLASH_PWR C311 C316 L301 VPH_PWR 9 0 3 C 8 1 3 C GND_CHG 1 3 0 3 D 2 1 1 0 3 D 2 C306 C307 GND_FG VBAT LED_RED_DRV SYSOK_PMI8952 UIM_BATT_ALM PMI8952_VBIAS C302 SG304 S G S SYSON C305 C315 VREG_L16_1P8 4 1 3 R CHG_THERM T 1 0 3 T R 3 1 3 C A B C D 1 2 3 4 5 6
    3 60 72 84 7 8 28 3 25 15 26 30 51 11 12 48 36 23 37 52 64 70 VDD_TORCH VDD_FLASH1 VDD_FLASH2 VDD_WLED GND_WLED VDD_DIS_P VDD_DIS_N VDD_1P8_DIS_N DIS_N_CAP_REF GND_DIS_N_REF WLED_CABC DIS_SCTRL HAP_PWM_IN1 HAP_PWM_IN2 VDD_HAP GND_HAP GNDC19 GNDC20 GNDC21 GNDC22 GNDC23 U301 PMI8952 3 f o 3 e c a f r e t n I D E L W _ G E R 4 5 6 C416 C412 D401 2 1 GND_WLED FLASH_LED L401 VPH_PWR_WLED_BL GND_WLED_I SG401S G S LB401 1 2 C413 LED_A LED_K1 LED_K2 C414 L402 C415 L403 LB402 1 2 LCD_VSP SG405 S G S GND_DISP VPH_PWR D402 1 LB403 1 2 LCD_VSN GND_DISN SG403 S G S D403 2 2 1 FLASH_LED1 FLASH_LED2 VREG_WLED VSW_WLED GND_WLED_I WLED_SINK1 WLED_SINK2 WLED_SINK3 WLED_SINK4 VDIS_P_FB VDIS_P_OUT GND_DIS_P VSW_DIS_P1 VSW_DIS_P2 VDIS_N_FB VDIS_N_OUT1 VDIS_N_OUT2 VSW_DIS_N1 VSW_DIS_N2 HAP_OUT_P HAP_OUT_N 71 83 6 9 31 21 20 32 33 29 5 4 16 17 27 1 13 2 14 35 24 Q401 1 D1 2 D2 7 1 4 C WLED_SHORT_DET R405 3 G VPH_PWR_WLED_BL D5 D4 D3 S2 S1 7 6 5 8 4 1 42 0 4 D 7 0 4 R R406 VPH_PWR 1 2 4. PMI8952 Power and Control VDD_BUCK_BOOST VIN_FLASH_PWR VPH_PWR VREG_L5_1P8 LCD_PWM_OUT VPH_PWR 8 1 4 C C408 C409 C410 I F E R _ N S D _ D N G S I N S D _ D N G D E L W _ D N G S S S G 2 0 4 G S G 4 0 4 G S 9 0 4 R Analog output ADC input SUB_BRD_ID No using parallel charging NO NO DI NO NO Digital output NO MPP MPP1 MPP2 MPP3 MPP4 PM_RESIN_N SPMI_CLK SPMI_DATA KYPD_PWR_N PM_PON_RESET_N BOM Note*** NAME R408 CODE VNS-AL00 200k 07091406 VNS-CL00 150k 07092138 VREG_L16_1P8 R408 SUB_BRD_ID WLED_SHORT_DET FLASH_STROBE_NOW VPH_PWR 68 RESIN_N 38 39 SPMI_CLK SPMI_DATA 134 KYPD_PWR_N 69 50 40 41 44 18 19 75 63 22 34 10 47 57 PS_HOLD CLK_IN NC1 NC2 NC3 NC4 NC5 GPIO_1 GPIO_2 MPP_1 MPP_2 MPP_3 MPP_4 VDD_ADC_LDO VREG_ADC_LDO U301 PMI8952 C401 C402 C403 C404 GND_BYP SG406 S G S GND_REF SG407 S G S 46 54 53 58 59 49 45 87 56 66 67 76 77 65 82 121 133 136 DVDD_BYP AVDD_BYP REF_BYP GND_REF GNDC1 GNDC2 GNDC3 GNDC4 GNDC5 GNDC6 GNDC7 GNDC8 GNDC9 GNDC10 GNDC11 GNDC12 GNDC13 3 f o 1 e c a f r e t n I L O R T N O C A B C D A B C D 1 2 3 4 5 6 4_PMI8952 Power and Control
    1 2 3 4 5 6 A B C D 5. PM8952 SMPS VPH_PWR 7 0 5 C 8 0 5 C 9 0 5 C 0 1 5 C 0 2 5 C 1 0 5 C 7 2 5 C 2 0 5 C 8 2 5 C 3 0 5 C 5 2 5 C 4 0 5 C 6 2 5 C 5 0 5 C 6 0 5 C 6 S _ 5 S _ D N G S S G 1 0 5 G S 4 S _ D N G S 3 S _ D N G S 2 S _ D N G S 1 S _ D N G S S S S S G 3 0 5 G S G 4 0 5 G S G 5 0 5 G S G 6 0 5 G S 38 VDD_S1 74 75 VDD_S2_1 VDD_S2_2 156 11 162 163 146 159 62 63 100 101 145 158 13 25 136 137 148 161 VDD_S3 VDD_S4 VDD_S5_1 VDD_S5_2 VDD_S6_1 VDD_S6_2 GND_S1_1 GND_S1_2 GND_S2_1 GND_S2_2 GND_S3_1 GND_S3_2 GND_S4_1 GND_S4_2 GND_S5_1 GND_S5_2 GND_S6_1 GND_S6_2 U201 PM8952 6 f o 3 e c a f r e t n I 1 G E R V VREG_S1 VSW_S1_1 VSW_S1_2 VREG_S2 VSW_S2_1 VSW_S2_2 VREG_S3 VSW_S3_1 VSW_S3_2 VREG_S4 VSW_S4_1 VSW_S4_2 VREG_S5 VSW_S5_1 VSW_S5_2 VREG_S6 VSW_S6_1 VSW_S6_2 VREF_NEG_S5 VREF_NEG_S6 61 50 51 72 87 88 143 144 157 37 12 24 124 149 150 121 147 160 123 122 BUCK BOOST Vout=0.8*(1+R1/R2)=3.224V VPH_PWR 9 2 5 C 0 3 5 C L505 39110933 U501 ISL91110IIAZ_T A1 PVIN1 A2 PVIN2 A3 PVIN3 A4 PVIN4 VOUT1 VOUT2 VOUT3 VOUT4 A5 B1 B2 B3 B4 D1 D2 D3 D4 VIN MODE LX1_1 LX1_2 LX1_3 LX1_4 LX2_1 LX2_2 LX2_3 LX2_4 EN FB SGND1 SGND2 PGND1 PGND2 PGND3 E1 E2 E3 E4 C4 B5 E5 C5 D5 C1 C2 C3 1 2 VDD_BUCK_BOOST 3 3 5 C 2 3 5 C 1 3 5 C R505 VREG_S4_2P05 GND T S O O B K C U B _ D N G S S G 8 0 5 G S 2 0 5 R 3 0 5 R 3 VSW_S1 L502 3000mA VSW_S2 L507 3000mA VSW_S3 L503 2000mA VSW_S4 L504 2000mA VREG_S1_FB VREG_S1_1P15 VREG_S2_FB VREG_S2_1P15 VREG_S3_1P3 VREG_S4_2P05 VREG_S5_S6_FB VREG_S5_S6_1P15 3000mA L501 L506 3000mA 5 1 5 C 6 1 5 C 7 1 5 C 8 1 5 C 9 1 5 C 1 1 5 C 2 1 5 C 1 2 5 C 2 2 5 C 3 1 5 C 4 1 5 C 3 2 5 C 4 2 5 C GND_S5_S6_FB GND_S3 GND_S4 4 5 6 A B C D
    1 2 3 4 5 6 6. PM8952 LDO VREG_S3_1P3 VREG_S4_2P05 VDD_BUCK_BOOST VPH_PWR VREG_S4_2P05 A B C D 105 VDD_L1_19 132 VDD_L2_23 111 VDD_L3 21 20 6 27 29 VDD_L4_5_6_7_16 VDD_L8_11_12_17_22 VDD_L9_10_13_14_15_18_1 VDD_L9_10_13_14_15_18_2 VDD_XO_RFCLK U201 PM8952 6 f o 4 e c a f r e t n I 2 G E R V VREG_L1 VREG_L2 VREG_L3 VREG_L4 VREG_L5 VREG_L6 VREG_L7 VREG_L8 VREG_L9 VREG_L10 VREG_L11 VREG_L12 VREG_L13 VREG_L14 VREG_L15 VREG_L16 VREG_L17 VREG_L18 VREG_L19 VREG_XO VREG_RFCLK VREG_L22 VREG_L23 118 133 112 9 10 34 35 33 18 19 7 57 28 26 40 22 31 14 119 4 5 8 106 1200mA 1200mA 1200mA 450mA 300mA 300mA 150mA 600mA 600mA 150mA 800mA 150mA 50mA 50mA 50mA 5mA 600mA 150mA 1200mA VREG_XO VREG_RF_CLK 300mA 300mA VDD_WTR_1P0 VREG_L2_1P2 VREG_L3_1P15 VDD_WTR_1P8 VREG_L5_1P8 VREG_L6_1P8 VREG_L7_1P8 VREG_L8_2P9 VREG_L9_3P3 VREG_L10_2P85 VREG_L11_SDC VREG_L12_SDC VREG_L13_3P075 VREG_L14_UIM1 VREG_L15_UIM2 VREG_L16_1P8 VREG_L17_2P85 VREG_L18_2P7 VREG_L19_1P35 VREG_L22_2P85 VREG_L23_1P2 9 2 6 C 0 3 6 C 9 0 6 C 0 2 6 C 1 2 6 C 7 2 6 C 0 1 6 C 3 1 6 C 5 1 6 C 4 1 6 C 2 2 6 C 1 3 6 C 3 2 6 C 1 1 6 C 4 2 6 C 6 1 6 C 7 1 6 C 9 1 6 C 8 1 6 C 8 0 6 C 5 2 6 C 2 3 6 C 2 1 6 C 6 2 6 C 8 2 6 C Design Note: PSEUDO CAPLESS LDOs: L4, L6, L8, L9, L10, L11, L12, L14, L15, L17, L18, L22, L23 GND_XO A B C D 1 2 3 4 5 6
    1 2 3 4 5 6 7. PM8952 CODEC MIC_IN1_P MIC_IN1_N MIC_IN2_P MIC_IN3_P MIC_BIAS1 MIC_BIAS2 1 1 7 C 2 1 7 C 3 1 7 C 4 1 7 C 7 3 7 C 8 3 7 C C703 LB703 CDC_EAR_P CDC_EAR_M CDC_PDM_CLK CDC_PDM_SYNC CDC_PDM_TX CDC_PDM_RX0 CDC_PDM_RX1 CDC_PDM_RX2 90 SPKR_DRV_P 102 SPKR_DRV_M 66 54 78 92 80 67 76 77 129 116 128 115 155 142 138 126 114 52 MIC1_IN_P MIC1_IN_M MIC2_IN MIC3_IN MIC_BIAS1 MIC_BIAS2 EARO_P EARO_M PDM_CLK PDM_SYNC PDM_TX PDM_RX0 PDM_RX1 PDM_RX2 CP_C1_P CP_C1_M CP_VNEG VNEG_HPH U201 PM8952 6 f o 5 e c a f r e t n I C D C VDD_AUDIO_IO VDD_HPH VDD_CP VDD_SPKR_PA VREG_BOOST VSW_BOOST BOOST_SNS HPH_REF HPH_L HPH_R HS_DET GND_CP GND_CFILT GND_SPKR_PA GND_BOOST1 GND_BOOST2 141 64 139 89 154 153 140 91 53 65 103 127 79 113 151 152 7 0 7 C 8 0 7 C GND_CP VREG_L5_1P8 VREG_S4_2P05 VREG_S4_2P05 VPH_PWR 4 0 7 C P C _ D N G 9 0 7 C 6 0 7 C 5 0 7 C *C705 only for Earpiece,SPK use external PA GND_SPKR_PA C715 CDC_HPH_REF CDC_HPH_L CDC_HPH_R CDC_HS_DET A P _ R K P S _ D N G S P C _ D N G S S S S S G 5 0 7 G S G 4 0 7 G S G 6 0 7 G S 6 1 7 C GND_MIC 0 2 7 C 9 1 7 C 8 1 7 C Audio component Design note: LB705/LB706 L703/L704 Default 0ohm 07090800 07090800 Audio bead/inductor 10100081/ 10100673 10100668/ 10100559 PGND_U701 I2C address: 1100010 (0x62) 1 2 7 C 2 2 7 C 3 2 7 C 4 2 7 C 6 2 7 C VREG_L5_1P8 C727 C728 AUD_PA_I2S_SCLK AUD_PA_I2S_WS AUD_PA_I2S_DO AUD_PA_I2S_DI U701 VBST PVDD DVDD WDT VREFC1 VREFC2 MCLK BCLK LRCLK DIN DOUT ADDR GND1 GND2 GND3 GND4 E1 D1 E5 A3 B6 E3 B3 A6 B5 A5 B4 D3 C3 C4 C5 C6 R702 C701 PGND_U701 VREG_L5_1P8 VBAT 9 4 7 C 5 2 7 C 0 3 7 C 5 3 7 C 1 3 7 C 2 3 7 C 9 2 7 C PGND_U701 PGND_U701 SPK_OUT1_P SPK_OUT1_N VIOC VBAT LX1 LX2 SCL SDA IRQ VSNSP VSNSN OUTP OUTN PGND1 PGND2 PGND3 A4 B1 D2 E2 E4 D4 D5 E6 D6 A1 A2 B2 C1 C2 L701 AUD_I2C_SCL AUD_I2C_SDA AUD_PA_INT1_N SPK_OUT1_FB_P SPK_OUT1_FB_N PGND_U701 S S G 1 0 7 G S AUD_PA_I2S_DO AUD_PA_I2S_SCLK R701 R704 AUD_PA_I2S_DI AUD_PA_I2S_WS R701/R704 is for debug A B C D A B C D 1 2 3 4 5 6
    1 2 3 4 5 6 8. MSM8952 Control BB_CLK BBCLK_MSM_EN SLEEP_CLK PM_PON_RESET_N MSM_RESOUT_N C807 C808 PS_HOLD JTAG_RESOUT_N JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N VREF_LPDDR3 C806 1 0 8 C 3 0 8 C CAD NOTE: Place R802 close to MSM pin AY4 WLAN_XO AB42 AA45 AY44 CXO CXO_EN SLEEP_CLK AW43 AL3 RESIN_N RESOUT_N V46 W47 Y46 T6 M6 M2 M4 K4 L5 E31 E33 E21 MODE_0 MODE_1 PS_HOLD SRST_N TCK TDI TDO TMS TRST_N EBI_VREF_CA EBI_VREF_D0_D2 EBI_VREF_D1_D3 H8 W43 AA41 DNC1 DNC2 DNC3 U801 MSM8952 3 1 f o 1 e c a f r e t n I L O R T N O C SDC1_RCLK SDC1_CLK SDC1_CMD SDC1_DATA_0 SDC1_DATA_1 SDC1_DATA_2 SDC1_DATA_3 SDC1_DATA_4 SDC1_DATA_5 SDC1_DATA_6 SDC1_DATA_7 SDC2_CLK SDC2_CMD SDC2_DATA_0 SDC2_DATA_1 SDC2_DATA_2 SDC2_DATA_3 USB_HS_DM USB_HS_DP USB_HS_ID USB_HS_REXT USB_HS_VBUS SPMI_CLK SPMI_DATA G3 H4 F4 E1 F2 E3 H6 D2 G1 J5 G5 L3 J1 L1 K2 J3 H2 AE47 AD46 AC45 AE45 AC47 AG41 AH42 R802 USB_HS_REXT R801 4 0 8 C 5 0 8 C SDC1_RCLK SDC1_CLK SDC1_CMD SDC1_DATA_0 SDC1_DATA_1 SDC1_DATA_2 SDC1_DATA_3 SDC1_DATA_4 SDC1_DATA_5 SDC1_DATA_6 SDC1_DATA_7 SDC2_SDCARD_CLK SDC2_SDCARD_CMD SDC2_SDCARD_D0 SDC2_SDCARD_D1 SDC2_SDCARD_D2 SDC2_SDCARD_D3 USB_HS_D_M USB_HS_D_P SPMI_CLK SPMI_DATA CAD NOTE: SPMI should be well shielding and protected from MSM to PM/PMI side please star routing SPMI_CLK/DATA from MSM to PM/PMI respectively A B C D A B C D 1 2 3 4 5 6
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