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君正t21 datesheet.pdf
CONTENTS
Overview
Block Diagram
Features
CPU
VPU
ISP
Image post processor(IPU)
Display(LCD)
Video input
Audio
Memory Interface
System Functions
Peripherals
Bootrom
Characteristic
Packaging and Pinout Information
Overview
Solder Process
Moisture Sensitivity Level
T21 Package
Pin Description
Static Memory/DVP/I2C0
SFC
MSC0/GMAC/PWMx/UARTx/I2C1/JTAG/SLCD
MSC1/SSI0/PWMx/I2C1/GMAC/UART2/CAMERA/SLCD
GPIO
System
Digital IO/core power/ground
DDR power/ground
Analog - USB
Analog - SARADC
Analog - CODEC
Analog - MAC-PHY
Analog - EFUSE
Analog - CLOCK/PLL
Analog - RTC
Electrical Specifications
Absolute Maximum Ratings
Recommended operating conditions
Audio codec
Microphone input
ALC
Headphone output
Microphone bias
Power On, Reset and BOOT
Power-On Timing
Reset procedure
BOOT
T21
Smart Video Application Processor
Data Sheet
Release Date: Jun. 4, 2018
Confidential for 乔安
T21 Smart Video Application Processor
Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co. Ltd. All rights reserved.
Disclaimer
This documentation is provided for use with Ingenic products. No license to Ingenic property rights is
granted. Ingenic assumes no liability, provides no warranty either expressed or implied relating to the
usage, or intellectual property right infringement except as provided for by Ingenic Terms and
Conditions of Sale.
Ingenic products are not designed for and should not be used in any medical or life sustaining or
supporting equipment.
All information in this document should be treated as preliminary. Ingenic may make changes to this
document without notice. Anyone relying on this documentation should contact Ingenic for the current
documentation and errata.
Ingenic Semiconductor Co., Ltd.
Ingenic Headquarters, Zhongguancun Software Park,
Dongbeiwang West Road, Haidian District, Beijing, China,
Tel: 86-10-56345000
Fax: 86-10-56345001
Http: //www.ingenic.com
Confidential for 乔安
CONTENTS
CONTENTS
1.3
1.1
1.2
1 Overview ............................................................................................ 1
Block Diagram ......................................................................................................................... 2
Features .................................................................................................................................. 2
CPU ................................................................................................................................. 2
1.2.1
VPU ................................................................................................................................. 2
1.2.2
ISP ................................................................................................................................... 3
1.2.3
Image post processor(IPU) ............................................................................................. 3
1.2.4
Display(LCD) ................................................................................................................... 4
1.2.5
Video input ....................................................................................................................... 4
1.2.6
Audio ............................................................................................................................... 4
1.2.7
Memory Interface ............................................................................................................ 4
1.2.8
1.2.9
System Functions ............................................................................................................ 5
1.2.10 Peripherals ...................................................................................................................... 6
1.2.11 Bootrom ......................................................................................................................... 10
Characteristic ........................................................................................................................ 10
2 Packaging and Pinout Information .................................................... 11
2.1 Overview ................................................................................................................................ 11
2.2
Solder Process ....................................................................................................................... 11
2.3 Moisture Sensitivity Level ...................................................................................................... 11
T21 Package .......................................................................................................................... 11
2.4
Pin Description ...................................................................................................................... 12
2.5
Static Memory/DVP/I2C0 ............................................................................................... 12
2.5.1
SFC ............................................................................................................................... 14
2.5.2
MSC0/GMAC/PWMx/UARTx/I2C1/JTAG/SLCD ........................................................... 14
2.5.3
MSC1/SSI0/PWMx/I2C1/GMAC/UART2/CAMERA/SLCD ........................................... 16
2.5.4
GPIO .............................................................................................................................. 17
2.5.5
System........................................................................................................................... 18
2.5.6
Digital IO/core power/ground ......................................................................................... 18
2.5.7
DDR power/ground ........................................................................................................ 19
2.5.8
2.5.9
Analog - USB ................................................................................................................. 19
2.5.10 Analog - SARADC ......................................................................................................... 20
2.5.11 Analog - CODEC ........................................................................................................... 20
2.5.12 Analog - MAC-PHY ....................................................................................................... 20
2.5.13 Analog - EFUSE ............................................................................................................ 21
2.5.14 Analog - CLOCK/PLL .................................................................................................... 21
2.5.15 Analog - RTC ................................................................................................................. 21
3 Electrical Specifications ................................................................... 23
Absolute Maximum Ratings .................................................................................................. 23
Recommended operating conditions .................................................................................... 23
i
3.1
3.2
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
Confidential for 乔安
CONTENTS
3.3
3.4
Audio codec ........................................................................................................................... 25
Microphone input ........................................................................................................... 25
ALC ................................................................................................................................ 25
Headphone output ......................................................................................................... 26
Microphone bias ............................................................................................................ 26
Power On, Reset and BOOT ................................................................................................. 26
Power-On Timing ........................................................................................................... 26
Reset procedure ............................................................................................................ 28
BOOT ............................................................................................................................. 29
3.3.1
3.3.2
3.3.3
3.3.4
3.4.1
3.4.2
3.4.3
ii
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
Confidential for 乔安
1 Overview
Overview
T21 is a smart video application processor targeting for video devices like mobile camera, security
survey, video talking, video analysis and so on. This SoC introduces a kind of innovative architecture
to fulfill both high performance computing and high quality image and video encoding requirements
addressed by video devices. T21 provides high-speed CPU computing power, excellent image signal
process, fluent 2048x2048 resolution video recording.
The CPU (Central Processing Unit) core, equipped with 16kB instruction and 16kB data L1 cache, and
64kB L2 cache, operating at 800MHz, and full feature MMU function performs OS related tasks. At the
heart of the CPU core is XBurst® processor engine. XBurst® is an industry leading microprocessor
core which delivers superior high performance and best-in-class low power consumption. A hardware
floating-point unit which compatible with IEEE754 is also included.
The VPU (Video Processing Unit) core is powered with another XBurst® processor engine. Together
with the on chip video accelerating engine and post processing unit, T21 delivers high video
performance. The maximum resolution of 2560x2048 in the format of H.264 are supported in encoding.
up to 50Mbit/s, 1080P@40fps.
The ISP (Image signal processor) core supports excellent image process with the image from raw
sensors. It supports DVP interface. With the functions, such as 3A, 2D and 3D denoise, WDR/HDR,
lens shading, it can supply maximum resolution 2048x2048 resolution image for view or encoding to
store or transfer.
For more quickly and easily to use T21, DDR is integrated on chip.
On-chip modules such as audio CODEC, multi-channel SAR-ADC controller and camera interface
offer designers a economical suite of peripherals for video application. WLAN, Bluetooth and
expansion options are supported through high-speed SPI and MMC/SD/SDIO host controllers. Other
peripherals such as USB OTG, MAC, UART and SPI as well as general system resources provide
enough computing and connectivity capability for many applications.
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
1
Confidential for 乔安
Overview
1.1 Block Diagram
RTC/watch dog
AES256/DES/OTP
DTRNG/HASH
MEMORY
Integrated DDR
XBurst®1 CPU
800MHz, MIPS32 ISA, FPU
16K I-Cache + 16K D-Cache
64KB L2 Cache
SENSOR IF(DVP/BT)
LCD IF(smart LCD)
Image Signal
Processor
3A, 3D denoise, Demosaic, Sharpen,
Defog, Crop, Mirror and Flip, Scale
Video Processor
H264 Encoder(I, P slices,
1080P@40fps+50Mbit/s)
SDIOx2/SPIx2/SFC
MAC(RMII)
USB 2.0 OTG
I2Cx2/UARTx3
Audio Codec
ADCx2/PWMx8
Figure 1-1 T21 Diagram
1.2 Features
1.2.1 CPU
XBurst®-1 core
– XBurst® FPU instruction set supporting both single and double floating point format
which are IEEE754 compatible
– XBurst® 9-stage pipeline micro-architecture, the operating frequency is 800MHz
MMU
– 32-entry joint-TLB
– 8 entry instruction TLB
– 8 entry data TLB
L1 Cache
– 16kB instruction cache
– 16kB data cache
Hardware debug support
16kB tight coupled memory
L2 Cache
– 64kB unify cache
1.2.2 VPU
Support H264 Encoder(I、P slices)
Support H264 baseline main high profile encoding up to 50M bit/s, 1080P@40fps
Support H264 maximum size up to 2560x2048 resolution
2
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
Confidential for 乔安
JPEG compressing/decompressing up to 70Mega-pixels per second（baseline）
Overview
1.2.3
ISP
Dynamic/Static Defect Pixel Correction
Green Equalization
Black Level Correction
Lens Shading Correction
3A(Auto Exposure/Auto White Balance/Auto Focus)
Support Statistical Information Output(3A)
Adaptive Dynamic Range Compression
Demosaic
Sharpen
Bayer Denoise
2D/3D Denosie
Color Noise Suppression
Lens Distortion Correction
2D Color Correction
3D Color Correction
Gamma Correction
Defog
3 Independent Image Scaler and Output
Crop, Mirror and Flip
Support Maximum Resolution:2048x2048
Flash timer
1.2.4
Image post processor(IPU)
AXI Bus for data transaction
Input data format:
― NV12
Output data format:
― ARGB, RGB
― NV12/NV21
― HSV
Color conversion feature: input and output format can be chosen freely from input and output
data format.
Minimum input image size (pixel): 4x4
Maximum input image size (pixel): 2048x2048
Minimum output image size (pixel): 4x4
Maximum output image size (pixel): 2048x2048
Background channel OSD function:
― Support 4 layers OSD
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
3
Confidential for 乔安
Overview
― Support whole background picture into OSD process and partial picture into OSD
process
― Support 12 port-duff OSD modes
― Support 1 input format in background channel: NV12
― Output picture format must be NV12
1.2.5 Display(LCD)
Basic Features
― Display size up to 800x600@60Hz,24BPP
― SLCD interface 6800(type A) and 8080(type B)
Colors Supports
― Support up to 16,777,216 (16M) colors
Panel Supports
transmit 565 by one cycle via SLCD 16bit data interface
transmit 666 by two cycle via SLCD 9bit data interface
transmit 565 by two cycle via SLCD 8bit data interface
transmit 888 by three cycle via SLCD 8bit data interface
―
―
―
―
― Supports different size of display panel
― Supports internal DMA operation and direct write register operation
1.2.6 Video input
Support 8/10/12 bit RGB Bayer input
Support maximum：2688x2048 @20fps, 1080p @60fps,720p @120fps
Support single-sensor input
Support DVP/BT1120(serial mode)/BT656/BT601
1.2.7 Audio
Integrated Audio codec.
– 24 bits DAC with 93dB SNR
– 24 bits ADC with 92dB SNR
– Support signal-ended and differential microphone input and line input
– Automatic Level Control (ALC) for smooth audio recording
– Pure logic process: no need for mixed signal layers and less mask cost
– Programmable input and output analog gains
– Digital interpolation and decimation filter integrated
– Sampling rate 8K/12K/16K/24K/32/44.1K/48K/96K
1.2.8 Memory Interface
Integrated DDR on chip
4
T21 Smart Video Application Processor Data Sheet
Copyright © 2005-2018 Ingenic Semiconductor Co., Ltd. All rights reserved.
Confidential for 乔安
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