Phison PS3006 Controller Spec v1.7.pdf

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PS3006 2F, RiteKom Bldg No.669, Sec. 4, Chung Hsing Rd., Chutung, Hsinchu, Taiwan 310, R.O.C. Tel： 886‐3‐5833899‐3001 or 1001 or 1005 Fax： 886‐3‐5833666 Phison PS3006 Controller Version 1.7 3/10/2008 1

PS3006 Contents A. Features B. General Description C. Block Diagram D. Pin Configuration D1. TQFP/LQFP 100 pin (8CE) Configuration D2. TQFP/LQFP 100 pin (16CE) Configuration D3. BGA 85pin (8CE) Configuration E. Pin Description F. Power Consumption G. Electrical Specifications H. DC Characters I. AC Characters I1. PCMCIA Interface I2. IDE Interface I3. Flash Interface J. Package J1. TQFP100 J2. BGA85 K. PS3006 Marking K1. LQFP K2. TQFP K3. BGA Revision History Revision No History 0.0 1.0 1.1 1. Initial issue Take out 128 pin package 1.Page3,Built-in hardware ECC circuit(Reed-Solomon)->(B.C.H.) 2. Page7, FCE7 -> FCE7- Page11, B10 VSSK -> B10 VSS 3. Pin Description add PU/PD field Draft Date Apr.10.2007 Oct.11,2007 Nov.1,2007 3/10/2008 2

PS3006 4. add LQFP-100 Package 1.2 Page 44, 45, 46: Add marking information for PS3006 on Nov.14, 2007 different package 1. Delete quad mode 2. Operating Temp: change to -40~85 degrees Delete LQFP (LVDT=2.4V) Add BGA package Add FRDY2, FRDY3 (page 15) 1. Add 16CE marking rule 2. Take out original marking for pin define illustration 1.3 1.4 1.5 1.6 1.7 Nov.15, 2007 Dec. 06, 2007 Dec. 28, 2007 Mar. 10, 2008 3/10/2008 3

PS3006 A. Features 1. Support Host Interfaces : PCMCIA/IDE Interface (Support to PIO Mode 6 & Multi Word DMA Mode4 & Ultra DMA Mode 6) Fully compatible with CompactFlash Specification Version 3.0 Fully compatible with PC Card Standard Release 8.0 Fully compatible with the IDE standard interface Host Transfer Rate for PC Card/CompactFlash : 25MB/s (PIO6) Host Transfer Rate for IDE standard interface: 133MB/s (UDMA6) 2. Build-In NAND Flash Memory Interface(support Individual mode, Dual mode) Build-in hardware ECC circuit (B.C.H.), support max 12 bit ECC. Support SLC(Single level cell) and MLC(Multi level cell) NAND Flash Memory Support 512B per page, 2KB per page, 4KB per page NAND Flash Memory 3. Build-In 1T RISC uP8051: 4. Build-In Oscillator: 5. Build-In Low Voltage Detector: 6. Build-In Regulator: 3.3V and 1.8V 7. 100-Pin TQFP/LQFP Package and 85-Ball BGA Package are available. 8. Operating Voltage: 2.7~5.5V 9. Power Saving implemented 3/10/2008 4

PS3006 B. General Description The PHISON PS3006 micro-controller is the best choice for CompactFlash™ card and IDE interface storage devices. It is a powerful chip with excellent performance and low cost. All flash modules, commercial or industrial, designed in with this controller can exclude the mechanical parts which have the full advantage of anti vibration and extremely low power consumption. With built in regulator and oscillator, this reduces cost for external components. With the latest Program RAM and SMART commands integrated into this one chip solution, efforts from R/D to mass production will greatly decrease, at the same time, providing the edge to shortening time to market. 3/10/2008 5

PS3006 C. Block Diagram 3/10/2008 6

PS3006 D1. PACKAGE TYPE : TQFP/LQFP100 (8CE) 3/10/2008 7

1 VCC3 2 VSS 3 VSSK 4 VCCK 5 HRESET- 6 HD7 7 HD6 8 HD5 9 HD4 10 HD3 11 HD2 12 HD1 13 HD0 14 HOE- 15 DMARQ 16 HA3 17 HA4 18 HA5 19 HA6 20 HIOR- 21 DMACK- 22 23 HA1 24 HA0 25 HCS0- INTRQ PS3006 26 VCC3 27 VSS 28 VSSK 29 FCE7- 30 FD0 31 FD8 32 FD1 33 FD9 34 FD2 35 FD10 36 FD3 37 FD11 38 FD4 39 FD12 40 FD5 41 VCCK 42 FD13 43 FD6 44 FD14 45 FD7 46 FD15 47 DEVSEL 48 VCC3 49 VSS 50 HCS1- 51 HA2 52 PDIAG- 53 IOIS16- 54 CSEL 55 HIOW- 56 HA7 57 HA8 58 HA9 59 HA10 60 IORDY 61 HWE- 62 HD15 63 HD14 64 HD13 65 HD12 66 HD11 67 HD10 68 HD9 69 HD8 70 DASP- 71 ROMOE- 72 VCC3 73 VCCK 74 V18 75 V33 76 VCC5A 77 GNDA 78 VSS 79 TESTEXT 80 FCE1- 81 FRDY0 82 FRE0- 83 FCE0- 84 FCE2- 85 FCE3- 86 FCE6- 87 FCLE0 88 FCE4- 89 FALE0 90 FCE5- 91 FWE0- 92 FWP- 93 FRDY1 94 FRDY2 95 FRDY3 96 FRE1- 97 FCLE1 98 FALE1 99 FWE1- 100 GPIO0 3/10/2008 8

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