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Spyglass 图形界面使用方法.doc

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Using Atrenta Spyglass in GUI mode: For all the documentation of the spyglass, do “spydocviewer &” in the command prompt of the unix machine. Invoke the tool by: spyglass & There are three steps to be performed: and Tech libraries are added. 1. Design Setup: Design files, sgdc (spyglass design constraint file), HDL Libraries 2. Goal Set up and Run: Specify the goals, the severity level of tool run (initial rtl, detailed rtl and rtl handoff levels) and run the goals. 3. Analyze the results: The results of the tool run on the set up goals are analyzed and reports are generated.
1. Design Setup: a. Adding files: Click Add File(s) to add design files. If .sgdc files are present, they can be added here. .sgdc files are the constraint files that have clocks, resets, auto-case analysis information. They can be automatically generated in latter stages. For now, you can add just design files ie .v files. Please make sure that you don’t add unnecessary verilog files, as they may affect the final results. You can omit ram files as they are out of the design.
Unnecessary files can be removed by selecting the file and then “Delete”. The .prj, .sgdc and unnecessary files are removed from above snapshot as shown below.
b. Run Design Read. After adding the necessary design files, go to Run Design Read tab and click Run Design Read button. This will run very basic rules to check if all the design modules are present, hierarchy etc.
After the Run Design Read button is executed, the tool will ask for the project name.
After Run Design Read is executed, messages can be seen in the below session log. There are three type of messages that will be generated in session log name Info, Warning and Error messages.
2. Goal Set up and Run: If there are no issues with Run Design Read we can proceed to Goal Setup and Run. We can three severity levels in Goal setup and run namely initial rtl, detailed rtl and rtl hand- off, with rtl handoff severity level being run with more stringent rules.
Select Central Set up for Designing clocks, resets and autocaseanalysis constraint files. Here Blackboxes can be found out if present. If they are present they can be resolved here. Sanity Checks can be performed on the generated .sgdc constraint files.
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