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Description
Features
Device Structure
USE RESTRICTION NOTICE
1. Block Diagram and Pin Configuration
1-1 Block Diagram
1-2 Pin Description
1-3 Pin Equivalent Circuit
1-4 Chip Center, Optical Center and Pin Assignment
1-5 Pin Coordinates
2. Pixel Signal Output Specifications
2-1 CSI-2 Signalling Mode
2-1-1 MIPI Transmitter
3. Control Registers
3-1 2-wire Serial Communication Operation Specifications
3-1-1 Communication Protocol
3-1-2 2-wire serial communication read/write operation supported
3-1-3 2-wire serial communication block characteristics
3-1-4 2-wire serial communication register map
3-1-5 Register Synchronization (Frame Bank )
3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register)
3-2-1 Configuration Registers – [0x0000-0x0FFF]
3-2-2 Set-up Registers – [0x0100-0x0147]
3-2-3 Frame Bank Control and Group “A” – [0x0150-0x018D]
3-2-4 Frame Bank Control Group “B” – [0x0254-0x028D]
3-2-5 Set-up Registers – [0x0300-0x0627]
3-3 Parameter Limit Registers – [0x1000-0x1FFF] (Read Only and Static)
3-3-1 Integration Time and Gain Parameter Limit Registers – [0x1000-0x1301]
3-4 Manufacturer Specific Registers – [0x3000-0x5FFF ]
4. Output Data Format
4-1 CSI-2 Output Data Format
4-1-1 CSI-2 Output Data Channels
4-1-2 CSI-2 Frame Structure
4-1-3 Short Packet & Long Packet
4-1-4 Data type
4-1-5 CSI-2 Frame Format
4-1-6 CSI-2 Embedded Data Line
5. Setting Required for Imaging
5-1 Pixel Array Physical Image
5-2 Pixel Binning Mode
5-3 image size
5-4 Readout Position
5-5 Frame Rate Calculation Formula
5-6 Black Level Control
5-7 Storage Time (Electronic Shutter) Settings
5-7-1 Storage Time (Electronic Shutter) Setting Registers
5-7-2 Storage Time Calculation Method
5-8 Gain Settings
5-8-1 Analogue Gain Settings
5-8-2 Digital gain settings
6. On Chip Image Processing
6-1 Test Pattern Generator
6-1-1 Test Pattern
6-2 Digital Gain Setting
6-3 Black Level Adjust
6-4 Defect Correction
6-5 Pixel Re-alignment H Direction
6-6 Pixel Re-alignment V Direction
7. NVM Memory Map
7-1 Block Diagram
7-2 NVM Functions
7-3 Related Registers
7-4 NVM Memory Map
7-5 Defects Address registration
7-5-1 Single defect address
7-5-2 Same Color Adjoining defect address
7-5-3 2x4 defect address
7-5-4 Example Setting
8. How to operate IMX219PQH5-C
8-1 Power on sequence
8-2 Power off sequence
9. Other Functions
9-1 Clock System
9-1-1 Clock Structure
9-1-2 EXCK_FREQ setting depend on INCK frequency
9-2 Clock Setting Example
9-3 Temperature Sensor
10. Electrical Characteristics
10-1 Absolute Maximum Ratings
10-2 Recommended Operating Conditions
10-3 AC Characteristics
10-3-1 Master Clock Waveform Diagram
10-4 Electrical Characteristics
11. Spectral Sensitivity Characteristic
12. Image Sensor Characteristics
12-1 Image Sensor Characteristics
12-2 Zone Definition used for specifying image sensor characteristics
13. Measurement Method for Image Sensor Characteristics
13-1 Measurement conditions
13-2 Color Coding of This Image Sensor and Readout
13-3 Definition of Standard Imaging Conditions
13-4 Measurement method
14. Spot Pixel Specification
15. Notice on White Pixels Specifications
15-1 Measurement Method for Spot Pixels
15-2 Spot Pixel Pattern Specifications
16. Chief Ray Angle Characteristics
17. Connection Example
Diagonal 4.60 mm (Type 1/4.0) 8 Mega-Pixel CMOS Image Sensor with Square Pixel for Color Cameras Description IMX219PQH5-C The IMX219PQH5-C is a diagonal 4.60 mm (Type 1/4.0) CMOS active pixel type image sensor with a square pixel array and 8.08M effective pixels. This chip operates with three power supplies, analogue 2.8 V, digital 1.2 V, and IF 1.8 V, and has low power consumption. High sensitivity, low dark current, and no smear are achieved through the adoption of R, G, and B primary color pigment mosaic filters. This chip features an electronic shutter with variable charge-storage time. In addition, this product is designed for use in cellular phone and tablet pc. When using this for another application, Sony does not guarantee the quality and reliability of product. Therefore, don't use this for applications other than cellular phone and tablet pc. Consult your Sony sales representative if you have any questions. Features Truly Opto-Electronics Ltd. Only CONFIDENTIAL ◆ Back-illuminated CMOS image sensor Exmor RTM ◆ 2-wire serial communication circuit on chip ◆ CSI2 serial data output (selection of 4lane/2lane) ◆ Timing generator, H and V driver circuits on chip ◆ CDS/PGA on chip ◆ 10-bit A/D converter on chip ◆ Automatic optical black (OB) clamp circuit on chip ◆ PLL on chip (rectangular wave) ◆ High sensitivity, low dark current, no smear ◆ Excellent anti-blooming characteristics ◆ Variable-speed shutter function (1 H units) ◆ R, G, B primary color pigment mosaic filters on chip ◆ Max. 30 frame/s in all-pixel scan mode ◆ Pixel rate: 280 MHz (All-pixels mode) ◆ 720p/120 frame/s, 1080p (crop)/30 frame/s ◆ Data rate: Max. 755 Mbps/lane 1 * Exmor R is a trademark of Sony Corporation. The Exmor R is a Sony's CMOS image sensor with significantly enhanced imaging characteristics including sensitivity and low noise by changing fundamental structure of ExmorTM pixel adopted column parallel A/D converter to back-illuminated type. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Device Structure IMX219PQH5-C ◆ CMOS image sensor ◆ Image size ◆ Total number of pixels ◆ Number of effective pixels ◆ Number of active pixels ◆ Chip size ◆ Unit cell size ◆ Substrate material : Diagonal 4.60 mm (Type 1/4.0) : 3296 (H) × 2512 (V) approx. 8.28 M pixels : 3296 (H) × 2480 (V) approx. 8.17 M pixels : 3280 (H) × 2464 (V) approx. 8.08 M pixels : 5.095 mm (H) × 4.930 mm (V) (w/ Scribe) : 1.12 µm (H) × 1.12 µm (V) : Silicon Truly Opto-Electronics Ltd. Only CONFIDENTIAL 2
USE RESTRICTION NOTICE IMX219PQH5-C Truly Opto-Electronics Ltd. Only CONFIDENTIAL 3 This USE RESTRICTION NOTICE ("Notice") is for customers who are considering or currently using the image sensor products ("Products") set forth in this specifications book. Sony Corporation ("Sony") may, at any time, modify this Notice which will be available to you in the latest specifications book for the Products. You should abide by the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor. You should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice when you consider using the Products. Use Restrictions  The Products are intended for incorporation into such general electronic equipment as office products, communication products, measurement products, and home electronics products in accordance with the terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.  You should not use the Products for critical applications which may pose a life- or injury- threatening risk or are highly likely to cause significant property damage in the event of failure of the Products. You should consult your sales representative beforehand when you consider using the Products for such critical applications. In addition, you should not use the Products in weapon or military equipment.  Sony disclaims and does not assume any liability and damages arising out of misuse, improper use, modification, use of the Products for the above-mentioned critical applications, weapon and military equipment, or any deviation from the requirements set forth in this specifications book. Design for Safety  Sony is making continuous efforts to further improve the quality and reliability of the Products; however, failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to ensure the safe design of your products such as component redundancy, anti-conflagration features, and features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social damage as a result of such failure. Export Control  If the Products are controlled items under the export control laws or regulations of various countries, approval may be required for the export of the Products under the said laws or regulations. You should be responsible for compliance with the said laws or regulations. No License Implied  The technical information shown in this specifications book is for your reference purposes only. The availability of this specifications book shall not be construed as giving any indication that Sony and its licensors will license any intellectual property rights in such information by any implication or otherwise. Sony will not assume responsibility for any problems in connection with your use of such information or for any infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to resolve any such problems and infringement. Governing Law  This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first instance. Other Applicable Terms and Conditions  The terms and conditions in the Sony additional specifications, which will be made available to you when you order the Products, shall also be applicable to your use of the Products as well as to this specifications book. You should review those terms and conditions when you consider purchasing and/or using the Products.
Contents IMX219PQH5-C Description...................................................................................................................................................... 1 Features ......................................................................................................................................................... 1 Device Structure ............................................................................................................................................. 2 USE RESTRICTION NOTICE ......................................................................................................................... 3 1. Block Diagram and Pin Configuration...................................................................................................... 10 1-1 Block Diagram ................................................................................................................................... 10 1-2 Pin Description .................................................................................................................................. 10 2. Pixel Signal Output Specifications ........................................................................................................... 16 3. Control Registers .................................................................................................................................... 17 3-1 2-wire Serial Communication Operation Specifications ...................................................................... 17 2-1 CSI-2 Signalling Mode ....................................................................................................................... 16 1-3 Pin Equivalent Circuit ........................................................................................................................ 13 1-4 Chip Center, Optical Center and Pin Assignment ............................................................................... 14 1-5 Pin Coordinates................................................................................................................................. 15 2-1-1 MIPI Transmitter .......................................................................................................................... 16 3-1-1 Communication Protocol ............................................................................................................. 17 3-1-2 2-wire serial communication read/write operation supported ........................................................ 19 3-1-3 2-wire serial communication block characteristics ........................................................................ 23 3-1-4 2-wire serial communication register map .................................................................................... 24 3-1-5 Register Synchronization (Frame Bank) ...................................................................................... 25 Truly Opto-Electronics Ltd. Only CONFIDENTIAL 3-2-1 Configuration Registers – [0x0000-0x0FFF] ................................................................................ 26 3-2-2 Set-up Registers – [0x0100-0x0147] ........................................................................................... 28 3-2-3 Frame Bank Control and Group “A” – [0x0150-0x018D] ............................................................... 30 3-2-4 Frame Bank Control Group “B” – [0x0254-0x028D] ..................................................................... 32 3-2-5 Set-up Registers – [0x0300-0x0627] ........................................................................................... 33 3-3 Parameter Limit Registers – [0x1000-0x1FFF] (Read Only and Static) ............................................... 36 3-3-1 Integration Time and Gain Parameter Limit Registers – [0x1000-0x1301] .................................... 36 3-4 Manufacturer Specific Registers – [0x3000-0x5FFF] .......................................................................... 41 3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register) ..... 26 4. Output Data Format ................................................................................................................................ 43 4-1 CSI-2 Output Data Format ................................................................................................................. 43 4-1-1 CSI-2 Output Data Channels ....................................................................................................... 43 4-1-2 CSI-2 Frame Structure ................................................................................................................ 43 4-1-3 Short Packet & Long Packet ........................................................................................................ 44 4-1-4 Data type .................................................................................................................................... 45 4-1-5 CSI-2 Frame Format ................................................................................................................... 45 4-1-6 CSI-2 Embedded Data Line ......................................................................................................... 46 4
IMX219PQH5-C 5. Setting Required for Imaging .................................................................................................................. 52 5-1 Pixel Array Physical Image ................................................................................................................ 52 5-2 Pixel Binning Mode ........................................................................................................................... 53 5-3 image size ......................................................................................................................................... 54 5-4 Readout Position ............................................................................................................................... 55 5-5 Frame Rate Calculation Formula ....................................................................................................... 56 5-6 Black Level Control ........................................................................................................................... 56 5-7 Storage Time (Electronic Shutter) Settings ........................................................................................ 56 5-7-1 Storage Time (Electronic Shutter) Setting Registers .................................................................... 56 5-7-2 Storage Time Calculation Method................................................................................................ 57 5-8 Gain Settings .................................................................................................................................... 58 5-8-1 Analogue Gain Settings............................................................................................................... 58 5-8-2 Digital gain settings ..................................................................................................................... 60 6. On Chip Image Processing ..................................................................................................................... 62 6-1 Test Pattern Generator ...................................................................................................................... 62 6-1-1 Test Pattern ................................................................................................................................ 62 6-2 Digital Gain Setting............................................................................................................................ 67 6-3 Black Level Adjust ............................................................................................................................. 67 6-4 Defect Correction .............................................................................................................................. 67 6-5 Pixel Re-alignment H Direction .......................................................................................................... 67 6-6 Pixel Re-alignment V Direction .......................................................................................................... 68 Truly Opto-Electronics Ltd. Only CONFIDENTIAL 7-1 Block Diagram ................................................................................................................................... 69 7-2 NVM Functions ................................................................................................................................. 69 7-3 Related Registers .............................................................................................................................. 70 7-4 NVM Memory Map ............................................................................................................................ 72 7-5 Defects Address registration .............................................................................................................. 75 7-5-1 Single defect address .................................................................................................................. 75 7-5-2 Same Color Adjoining defect address .......................................................................................... 75 7-5-3 2x4 defect address ...................................................................................................................... 75 7-5-4 Example Setting .......................................................................................................................... 76 7. NVM Memory Map.................................................................................................................................. 69 8. How to operate IMX219PQH5-C ............................................................................................................. 77 8-1 Power on sequence ............................................................................................................................. 77 8-2 Power off sequence ............................................................................................................................. 79 9. Other Functions ...................................................................................................................................... 81 9-1 Clock System .................................................................................................................................... 81 9-1-1 Clock Structure ........................................................................................................................... 81 9-1-2 EXCK_FREQ setting depend on INCK frequency ........................................................................ 81 9-2 Clock Setting Example ...................................................................................................................... 82 5
IMX219PQH5-C 9-3 Temperature Sensor .......................................................................................................................... 83 10. Electrical Characteristics....................................................................................................................... 84 10-1 Absolute Maximum Ratings ............................................................................................................. 84 10-2 Recommended Operating Conditions .............................................................................................. 84 10-3 AC Characteristics........................................................................................................................... 85 10-3-1 Master Clock Waveform Diagram .............................................................................................. 85 10-4 Electrical Characteristics ................................................................................................................. 85 11. Spectral Sensitivity Characteristic ......................................................................................................... 86 12. Image Sensor Characteristics ............................................................................................................... 87 12-1 Image Sensor Characteristics .......................................................................................................... 87 12-2 Zone Definition used for specifying image sensor characteristics ..................................................... 87 13. Measurement Method for Image Sensor Characteristics ....................................................................... 88 13-1 Measurement conditions ................................................................................................................. 88 13-2 Color Coding of This Image Sensor and Readout ............................................................................ 88 13-3 Definition of Standard Imaging Conditions ....................................................................................... 88 13-4 Measurement method...................................................................................................................... 89 14. Spot Pixel Specification ........................................................................................................................ 90 15. Notice on White Pixels Specifications ................................................................................................... 91 15-1 Measurement Method for Spot Pixels .............................................................................................. 92 15-2 Spot Pixel Pattern Specifications ..................................................................................................... 92 16. Chief Ray Angle Characteristics ............................................................................................................ 93 17. Connection Example............................................................................................................................. 94 Truly Opto-Electronics Ltd. Only CONFIDENTIAL 6
Table of Figures IMX219PQH5-C Fig. 1 Block Diagram .............................................................................................................................. 10 Fig. 2 Pin Equivalent Circuit .................................................................................................................... 13 Fig. 3 Chip Center and Optical Center..................................................................................................... 14 Fig. 4 Relationship between Output pin name and Mipi output Lane ........................................................ 16 Fig. 5 2-wire Serial Communication ......................................................................................................... 17 Fig. 6 2-wire Serial Communication Protocol ........................................................................................... 17 Fig. 7 Start Condition .............................................................................................................................. 18 Fig. 8 Repeated Start Condition .............................................................................................................. 18 Fig. 9 Stop Condition .............................................................................................................................. 18 Fig. 10 Slave Address ............................................................................................................................. 18 Fig. 11 Acknowledge and Negative Acknowledge .................................................................................... 19 Fig. 12 CCI single read from random location.......................................................................................... 20 Fig. 13 CCI single read from current location........................................................................................... 20 Fig. 14 CCI sequential read starting from random location ...................................................................... 21 Fig. 15 CCI sequential read starting from current location ....................................................................... 21 Fig. 16 CCI single write to random location ............................................................................................. 22 Truly Opto-Electronics Ltd. Only CONFIDENTIAL Fig. 27 Pixel Array Physical Image .......................................................................................................... 52 Fig. 28 Image of 2x2 averaged Binning Mode ......................................................................................... 53 Fig. 29 Image size .................................................................................................................................. 54 Fig. 30 Readout Position ......................................................................................................................... 55 Fig. 17 CCI sequential write starting from random location ...................................................................... 22 Fig. 18 2-wire Serial Communication Specifications ................................................................................ 23 Fig. 19 Function Example for Frame Bank .............................................................................................. 25 Fig. 20 Frame Structure for Serial signal output ...................................................................................... 43 Fig. 21 Signaling Waveform during Line Blanking Period (CSI-2)............................................................. 44 Fig. 22 Signaling Waveform during Frame Blanking Period (CSI-2) ......................................................... 44 Fig. 23 Short Packet & Long Packet ........................................................................................................ 44 Fig. 24 Frame Format during Embedded Data Line Output ..................................................................... 46 Fig. 25 Embedded data lines alignment in RAW8 mode .......................................................................... 46 Fig. 26 Detailed Embedded Data Line Output in RAW10 Output Mode .................................................... 46 Fig. 31 Output Image Diagrams for Vertical Flip and Horizontal Mirror ..................................................... 55 Fig. 32 Data Flow Diagram ..................................................................................................................... 62 Fig. 33 Block Diagram ............................................................................................................................ 69 Fig. 34 NVM Map structure ..................................................................................................................... 69 Fig. 35 Single defect ............................................................................................................................... 75 Fig. 36 Same Color Adjoining defect ....................................................................................................... 75 Fig. 37 2x4 defect ................................................................................................................................... 75 Fig. 38 Power-on Sequence in 2-wire Serial Communication Mode ......................................................... 77 7
IMX219PQH5-C Fig. 39 Start streaming sequence with 2-wire serial communication (external reset) ................................ 78 Fig. 40 Power-off Sequence in 2-wire Serial Communication ................................................................... 79 Fig. 41 Software Standby Operation Pattern 1 ........................................................................................ 80 Fig. 42 Software Standby Operation Pattern 2 ........................................................................................ 80 Fig. 43 Clock System Block Diagram ...................................................................................................... 81 Fig. 44 Master Clock Square Waveform Diagram .................................................................................... 85 Fig. 45 Spectral sensitivity characteristics ............................................................................................... 86 Fig. 46 Zone Definition Diagram .............................................................................................................. 87 Fig. 47 Color coding alignment................................................................................................................ 88 Fig. 48 Measurement Method for Spot Pixels .......................................................................................... 92 Fig. 49 Chief Ray Angle Characteristics .................................................................................................. 93 Fig. 50 Recommended Circuit ................................................................................................................. 94 Tables Table 1 Pin Description ........................................................................................................................... 10 Table 2 Pin Coordinates .......................................................................................................................... 15 Table 3 Description of 2-wire Serial Communication Pins ........................................................................ 17 Table 4 R/W Bit ....................................................................................................................................... 18 Table 5 2-wire Serial Communication Address Space.............................................................................. 19 Table 6 Operations Supported by 2-wire Serial Communication .............................................................. 19 Table 7 2-wire Serial Communication Operation Specifications ............................................................... 23 Truly Opto-Electronics Ltd. Only CONFIDENTIAL Table 8 2-wire Serial Communication AC Timing (Fast mode plus (INCK[fSCK] = 11.4 to 27 MHz)) ......... 23 Table 9 2-wire Serial Communication AC Timing (Fast mode) .................................................................. 24 Table 10 2-wire Serial Communication Register Map Address Areas ....................................................... 24 Table 11 Access command sequence...................................................................................................... 41 Table 12 Number of CSI lane Setting Registers ....................................................................................... 43 Table 13 Image pixel area and data type ................................................................................................. 45 Table 14 Sync Code Settings .................................................................................................................. 45 Table 15 Embedded Data Line Tag ......................................................................................................... 47 Table 16 Mode example .......................................................................................................................... 53 Table 17 Image Orientation Register ....................................................................................................... 55 Table 18 Gain Setting Variables .............................................................................................................. 56 Table 19 Storage Time Setting Register .................................................................................................. 56 Table 20 Storage Time Offset Register.................................................................................................... 56 Table 21 Storage Time Setting (in case of Line_Length_pck = 3448) ....................................................... 57 Table 22 Gain Setting Variables .............................................................................................................. 58 Table 23 Analogue Gain Setting .............................................................................................................. 59 Table 24 Digital Gain Settings ................................................................................................................. 60 Table 25 Example of Digital Gain Setting ................................................................................................ 61 8
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