Verilog Operator Name Functional Group [ ] ( ) ! ~ & | ~& ~| ^ ~^ or ^~ + - { } {{ }} * / % + - << >> > >= < <= == != & ^ | && || ?: bit-select or part-select parenthesis logical negation negation reduction AND reduction OR reduction NAND reduction NOR reduction XOR reduction XNOR unary (sign) plus unary (sign) minus concatenation replication multiply divide modulus binary plus binary minus shift left shift right greater than greater than or equal to less than less than or equal to case equality case inequality bit-wise AND bit-wise XOR bit-wise OR logical AND logical OR conditional logical bit-wise reduction reduction reduction reduction reduction reduction arithmetic arithmetic concatenation replication arithmetic arithmetic arithmetic arithmetic arithmetic shift shift relational relational relational relational equality equality bit-wise bit-wise bit-wise logical logical conditional