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88E1111 Datasheet
Integrated 10/100/1000 Ultra
Gigabit Ethernet Transceiver
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
Doc. No. MV-S100649-00, Rev. F
December 3, 2004
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Document Status
Advance
Information
Preliminary
Information
Final
Information
Revision Code: Rev. F
Advance
This document contains design specifications for initial product development. Specifications may change
without notice. Contact Marvell Field Application Engineers for more information.
This document contains preliminary data, and a revision of this document will be published at a later date.
Specifications may change without notice. Contact Marvell Field Application Engineers for more information.
This document contains specifications on a product that is in final release. Specifications may change without
notice. Contact Marvell Field Application Engineers for more information.
Technical Publications: 2.60
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express
written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard
to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose. Further, Marvell does not warrant the
accuracy or completeness of the information, text, graphics, or other items contained within this document.
Marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situation if any such products failed. Do not use Marvell products in these
types of equipment or applications.
Marvell assumes no responsibility, either for use of these products or for any infringements of patents and trademarks, or other rights of third parties resulting from its use. No license is granted
under any patents, patent rights, or trademarks of Marvell.
These products may include one or more optional functions. The user has the choice of implementing any particular optional function. Should the user choose to implement any of these optional
functions, it is possible that the use could be subject to third party intellectual property rights. Marvell recommends that the user investigate whether third party intellectual property rights are
relevant to the intended use of these products and obtain licenses as appropriate under relevant intellectual property rights.
With respect to the products described herein, the user or recipient, in the absence of appropriate U.S. government authorization, agrees:
1) Not to re-export or release any such information consisting of technology, software or source code controlled for national security reasons by the U.S. Export Control Regulations ("EAR"),
to a national of EAR Country Groups D:1 or E:2;
2) Not to export the direct product of such technology or such software, to EAR Country Groups D:1 or E:2, if such technology or software and direct products thereof are controlled for national
security reasons by the EAR; and,
3) In the case of technology controlled for national security reasons under the EAR where the direct product of the technology is a complete plant or component of a plant, not to export to EAR
Country Groups D:1 or E:2 the direct product of the plant or major component thereof, if such direct product is controlled for national security reasons by the EAR, or is subject to controls under
the U.S. Munitions List ("USML").
At all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this document in connection with their receipt of any such information.
Copyright © 2004. Marvell International Ltd. All rights reserved. Marvell, the Marvell logo, Moving Forward Faster, Alaska, Fastwriter, GalNet, PHYAdvantage and Prestera are registered trade-
marks of Marvell. Discovery, DSP Switcher, GalTis, Horizon, Libertas, Link Street, NetGX, RADLAN, Raising The Technology Bar, The Technology Within, UniMAC, Virtual Cable Tester, and
Yukon are trademarks of Marvell. All other trademarks are the property of their respective owners.
Doc. No. MV-S100649-00 Rev. F
Page 2
Copyright © 2004 Marvell
December 3, 2004, Advance
Document Classification: Proprietary Information
CONFIDENTIAL
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88E1111
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
FEATURES
•
•
The 88E1111 device supports the Gigabit Media Inde-
pendent Interface (GMII), Reduced GMII (RGMII),
Serial Gigabit Media Independent Interface (SGMII),
the Ten-Bit Interface (TBI), and Reduced TBI (RTBI) for
direct connection to a MAC/Switch port.
OVERVIEW
The Alaska™ Ultra 88E1111 Gigabit Ethernet Trans-
ceiver is a physical layer device for Ethernet
1000BASE-T, 100BASE-TX, and 10BASE-T applica-
tions. It is manufactured using standard digital CMOS
process and contains all the active circuitry required to
implement the physical layer functions to transmit and
receive data on standard CAT 5 unshielded twisted pair.
The 88E1111 device incorporates the Marvell Virtual
Cable Tester™ (VCT™) feature, which uses Time
Domain Reflectometry (TDR) technology for the remote
identification of potential cable malfunctions, thus
reducing equipment returns and service calls. Using
VCT, the Alaska 88E1111 device detects and reports
potential cabling issues such as pair swaps, pair polar-
ity and excessive pair skew. The device will also detect
cable opens, shorts or any impedance mismatch in the
cable and report accurately within one meter the dis-
tance to the fault.
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
10/100/1000BASE-T IEEE 802.3 compliant
Supports GMII, TBI, reduced pin count GMII
(RGMII), reduced pin count TBI (RTBI), and serial
GMII (SGMII) interfaces
Integrated 1.25 GHz SERDES for 1000BASE-X
fiber applications
Four RGMII timing modes
Energy Detect and Energy Detect+ low power
modes
Three loopback modes for diagnostics
"Downshift" mode for two-pair cable installations
Fully integrated digital adaptive equalizers, echo
cancellers, and crosstalk cancellers
Advanced digital baseline wander correction
Automatic MDI/MDIX crossover at all speeds of
operation
Automatic polarity correction
IEEE 802.3u compliant Auto-Negotiation
Software programmable LED modes including LED
testing
Automatic detection of fiber or copper operation
Supports IEEE 1149.1 JTAG
Two-Wire Serial Interface (TWSI) and MDC/MDIO
CRC checker, packet counter
Packet generation
Virtual Cable Tester (VCT)
Auto-Calibration for MAC Interface outputs
Requires only two supplies: 2.5V and 1.0V (with
1.2V option for the 1.0V supply)
I/Os are 3.3V tolerant
Low power dissipation Pave = 0.75W
0.13 µm digital CMOS process
117-Pin TFBGA, 96-Pin BCC, and 128 PQFP
package options
117-Pin TFBGA package available in Commercial
or Industrial grade
Lead-free packages available
The 88E1111 device incorporates an optional 1.25 GHz
SERDES (Serializer/Deserializer). The serial interface
may be connected directly to a fiber-optic transceiver
for 1000BASE-T/1000BASE-X media conversion appli-
cations. Additionally, the 88E1111 device may be used
to implement 1000BASE-T Gigabit Interface Converter
(GBIC) or Small Form Factor Pluggable (SFP) modules.
The 88E1111 device uses advanced mixed-signal pro-
cessing to perform equalization, echo and crosstalk
cancellation, data recovery, and error correction at a
gigabit per second data rate. The device achieves
robust performance in noisy environments with very low
power dissipation.
The 88E1111 device is offered in three different pack-
age options including a 117-Pin TFBGA, a 96-pin BCC
featuring a body size of only 9 x 9 mm, and a 128 PQFP
package.
Document Classification: Proprietary Information
CONFIDENTIAL
Doc. No. MV-S100649-00, Rev. F
December 3, 2004, Advance
•
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•
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Copyright © 2004 Marvell
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88E1111
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
M
a
g
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c
s
RJ45
10/100/1000 Mbps
Ethernet MAC
88E1111
Device
10/100/1000 Mbps
Ethernet MAC
88E1111 Device used in Copper Application
Media Types:
- 10BASE-T
- 100BASE-TX
- 1000BASE-T
MAC Interface Options
- GMII/MII
- TBI
- RGMII
- RTBI
- SGMII
- Serial Interface
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
88E1111 RGMII/GMII MAC to SGMII MAC Conversion
MAC Interface Options
- GMII/MII
- RGMII
MAC Interface Options
- GMII
- RGMII
88E1111 Device used in Fiber Application
Document Classification: Proprietary Information
Fiber
Optics
Media Types:
- 1000BASE-X
CONFIDENTIAL
Copyright © 2004 Marvell
December 3, 2004, Advance
Doc. No. MV-S100649-00, Rev. F
Page 4
88E1111
Device
Gigabit Ethernet
MAC
88E1111
Device
3-Speed
SFP
Serial
Interface
(Effective SGMII MAC)
Serial Interface
- 4-pin SGMIII
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7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
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MARVELL CONFIDENTIAL, UNDER NDA# 021303
Document Classification: Proprietary Information
CONFIDENTIAL
Doc. No. MV-S100649-00, Rev. F
Page 5
Copyright © 2004 Marvell
December 3, 2004, Advance
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88E1111
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
SECTION 1. SIGNAL DESCRIPTION..................................................................11
1.1
117-Pin TFBGA Package .............................................................................................11
96-Pin BCC Package ...................................................................................................12
1.2
1.3
128-Pin PQFP Package ................................................................................................13
1.4 Pin Description.............................................................................................................14
1.4.1
Pin Type Definitions ..........................................................................................................14
I/O State at Various Test or Reset Modes ..................................................................37
117-Pin TFBGA Pin Assignment List - Alphabetical by Signal Name .....................38
96-Pin BCC Pin Assignment List - Alphabetical by Signal Name............................40
128-Pin PQFP Pin Assignment List - Alphabetical by Signal Name........................42
1.5
1.6
1.7
1.8
Table of Contents
7vu31zzfnua-e4681dge * Marvell Semiconductor, Inc.
MARVELL CONFIDENTIAL, UNDER NDA# 021303
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MARVELL CONFIDENTIAL, UNDER NDA# 021303
SECTION 2. FUNCTIONAL DESCRIPTION..........................................................44
2.1
88E1111 Device Interface Description .......................................................................45
2.1.1 Media Interface..................................................................................................................45
MAC Interface ..................................................................................................................47
2.1.2
2.2 MAC Interfaces .............................................................................................................48
2.2.1 Gigabit Media Independent Interface (GMII/MII)...............................................................48
2.2.2
Ten-Bit Interface................................................................................................................50
2.2.3 Reduced Pin Count GMII (RGMII).....................................................................................52
2.2.4 Reduced Pin Count TBI (RTBI).........................................................................................54
2.2.5
SGMII Interface .................................................................................................................55
2.2.6
Serial MAC Interface .........................................................................................................56
88E1111 Device Modes of Operation .........................................................................57
2.3.1 Modes of Operation for Copper Media..............................................................................58
2.3.2 Modes of Operation for Fiber Media..................................................................................61
2.3.3 GMII/MII to SGMII and RGMII to SGMII Mode..................................................................61
2.3.4 Mode Switching.................................................................................................................62
2.4 Hardware Configuration ..............................................................................................63
88E1111 Device Configuration Description.......................................................................65
2.5 Synchronizing FIFO .....................................................................................................69
2.6 Copper Media Transmit and Receive Functions .......................................................70
Transmit Side Network Interface.......................................................................................70
Encoder.............................................................................................................................70
Document Classification: Proprietary Information
CONFIDENTIAL
Doc. No. MV-S100649-00,Rev. F
Copyright © 2004 Marvell
December 3, 2004, Advance
2.3
2.4.1
2.6.1
2.6.2
Page 6
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2.8.1
2.8.2
2.8.3
2.8.4
2.9.1
2.9.2
2.9.3
2.6.3 Receive Side Network Interface........................................................................................70
2.6.4 Decoder.............................................................................................................................72
2.7 Power Supplies ............................................................................................................ 73
VDDO................................................................................................................................73
2.7.1
VDDOH .............................................................................................................................73
2.7.2
VDDOX .............................................................................................................................73
2.7.3
AVDD ................................................................................................................................73
2.7.4
2.7.5 DVDD ................................................................................................................................73
2.8 Power Management ..................................................................................................... 74
Low Power Modes.............................................................................................................74
Enabling Low Power Modes..............................................................................................74
Low Power Operating Modes............................................................................................75
125CLK and MAC Interface Effect on Low Power Modes ................................................76
2.9 Management Interface................................................................................................. 77
Extended Register Access ................................................................................................78
Preamble Suppression......................................................................................................78
Programming Interrupts ....................................................................................................79
2.10 Two-wire Serial Interface............................................................................................ 80
2.10.1 Bus Operation ...................................................................................................................80
2.10.2 Read and Write Operations...............................................................................................81
2.11 Auto-Negotiation.......................................................................................................... 84
2.11.1 10/100/1000BASE-T Auto-Negotiation .............................................................................84
2.11.2 1000BASE-X Auto-Negotiation .........................................................................................85
2.11.3 SGMII Auto-Negotiation ....................................................................................................86
2.11.4 GBIC Mode Auto-Negotiation............................................................................................86
2.11.5 Auto-Media Detect Auto-Negotiation.................................................................................86
2.11.6 Serial Interface Auto-Negotiation Bypass Mode ...............................................................86
2.12 Fiber/Copper Auto-Selection ...................................................................................... 88
2.12.1 Preferred Media for Fiber/Copper Auto-Selection.............................................................89
2.13 Downshift Feature........................................................................................................ 90
2.14 Loopback Modes.......................................................................................................... 91
2.14.1 MAC Interface Loopback...................................................................................................91
2.14.2 Copper Line Loopback ......................................................................................................93
2.14.3 External 1000 Mbps Loopback..........................................................................................93
2.15 Virtual Cable Tester™ (VCT™) Feature ..................................................................... 96
2.16 MDI/MDIX Crossover.................................................................................................... 97
2.17 Polarity Correction....................................................................................................... 98
2.18 Data Terminal Equipment (DTE) Detect ..................................................................... 99
2.19 Automatic and Manual Impedance Calibration ....................................................... 100
2.19.1 MAC Interface Calibration Circuit....................................................................................100
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MARVELL CONFIDENTIAL, UNDER NDA# 021303
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MARVELL CONFIDENTIAL, UNDER NDA# 021303
Document Classification: Proprietary Information
CONFIDENTIAL
Doc. No. MV-S100649-00, Rev. F
December 3, 2004, Advance
Copyright © 2004 Marvell
Page 7
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88E1111
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
SECTION 3. REGISTER DESCRIPTION........................................................... 117
2.19.2 MAC Interface Calibration Register Definitions .............................................................. 100
2.19.3 Changing Auto Calibration Targets ................................................................................ 101
2.19.4 Manual Settings to The Calibration Registers ................................................................ 102
2.20 Packet Generator........................................................................................................105
2.21 CRC Error Counter and Frame Counter ...................................................................105
2.21.1 Enabling The CRC Error Counter and Frame Counter................................................... 105
2.22 LED Interface ..............................................................................................................107
2.22.1 Manual LED Control ....................................................................................................... 107
2.22.2 LED Functionality ........................................................................................................... 108
2.23 IEEE 1149.1 Controller ...............................................................................................113
2.23.1 Bypass Instruction .......................................................................................................... 113
2.23.2 Sample/Preload Instruction ............................................................................................ 113
2.24 88E1111 Device Boundary Scan Chain Order ........................................................114
2.24.1 Extest Instruction ............................................................................................................ 116
2.24.2 The Clamp Instruction .................................................................................................... 116
2.24.3 The HIGH-Z Instruction .................................................................................................. 116
2.24.4 ID CODE Instruction ....................................................................................................... 116
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MARVELL CONFIDENTIAL, UNDER NDA# 021303
SECTION 4. ELECTRICAL SPECIFICATIONS................................................... 189
4.1 Absolute Maximum Ratings ......................................................................................189
4.2 Recommended Operating Conditions......................................................................190
4.3 Package Thermal Information ...................................................................................191
Thermal Conditions for 117-Pin TFBGA Package.......................................................... 191
Thermal Conditions for 96-Pin BCC Package ................................................................ 192
Thermal Conditions for 128-Pin PQFP Package ............................................................ 193
4.4 DC Electrical Characteristics ....................................................................................194
4.4.1 Current Consumption AVDDH, AVDDL.......................................................................... 194
4.4.2 Current Consumption VDDO, VDDOX, VDDOH ............................................................ 194
4.4.3 Current Consumption Center_Tap ................................................................................. 195
4.4.4 Current Consumption DVDD .......................................................................................... 195
4.5 DC Operating Conditions...........................................................................................196
4.5.1 Digital Pins...................................................................................................................... 196
4.5.2
Internal Resistor Description .......................................................................................... 199
IEEE DC Transceiver Parameters .............................................................................200
Serial and SGMII Interface ............................................................................................ 201
4.6.1
4.7 AC Timing Reference Values.....................................................................................206
4.8 AC Electrical Specifications......................................................................................207
4.8.1 Reset Timing .................................................................................................................. 207
Document Classification: Proprietary Information
CONFIDENTIAL
Copyright © 2004 Marvell
December 3, 2004, Advance
Doc. No. MV-S100649-00,Rev. F
Page 8
4.3.1
4.3.2
4.3.3
4.6
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