logo资料库

ARM嵌入式系统开发:软件设计与优化 ARM System Developer's Guide 英文版.pdf

第1页 / 共703页
第2页 / 共703页
第3页 / 共703页
第4页 / 共703页
第5页 / 共703页
第6页 / 共703页
第7页 / 共703页
第8页 / 共703页
资料共703页,剩余部分请下载后查看
ARM System Developer’s Guide Designing and Optimizing System Software
Copyright Page
Contents
About the Authors
Preface
Chapter 1. ARM Embedded Systems
1.1 The RISC design philosophy
1.2 The ARM Design Philosophy
1.3 Embedded System Hardware
1.4 Embedded System Software
1.5 Summary
Chapter 2. ARM Processor Fundamentals
2.1 Registers
2.2 Current Program Status Register
2.3 Pipeline
2.4 Exceptions, Interrupts, and the Vector Table
2.5 Core Extensions
2.6 Architecture Revisions
2.7 ARM Processor Families
2.8 Summary
Chapter 3. Introduction to the ARM Instruction Set
3.1 Data Processing Instructions
3.2 Branch Instructions
3.3 Load-Store Instructions
3.4 Software Interrupt Instruction
3.5 Program Status Register Instructions
3.6 Loading Constants
3.7 ARMv5E Extensions
3.8 Conditional Execution
3.9 Summary
Chapter 4. Introduction to the Thumb Instruction Set
4.1 Thumb Register Usage
4.2 ARM-Thumb Interworking
4.3 Other Branch Instructions
4.4 Data Processing Instructions
4.5 Single-Register Load-Store Instructions
4.6 Multiple-Register Load-Store Instructions
4.7 Stack Instructions
4.8 Software Interrupt Instruction
4.9 Summary
Chapter 5. Efficient C Programming
5.1 Overview of C Compilers and Optimization
5.2 Basic C Data Types
5.3 C Looping Structures
5.4 Register Allocation
5.5 Function Calls
5.6 Pointer Aliasing
5.7 Structure Arrangement
5.8 Bit-fields
5.9 Unaligned Data and Endianness
5.10 Division
5.11 Floating Point
5.12 Inline Functions and Inline Assembly
5.13 Portability Issues
5.14 Summary
Chapter 6. Writing and Optimizing ARM Assembly Code
6.1 Writing Assembly Code
6.2 Profiling and Cycle Counting
6.3 Instruction Scheduling
6.4 Register Allocation
6.5 Conditional Execution
6.6 Looping Constructs
6.7 Bit Manipulation
6.8 Efficient Switches
6.9 Handling Unaligned Data
6.10 Summary
Chapter 7. Optimized Primitives
7.1 Double-Precision Integer Multiplication
7.2 Integer Normalization and Count Leading Zeros
7.3 Division
7.4 Square Roots
7.5 Transcendental Functions: log, exp, sin, cos
7.6 Endian Reversal and Bit Operations
7.7 Saturated and Rounded Arithmetic
7.8 Random Number Generation
7.9 Summary
Chapter 8. Digital Signal Processing
8.1 Representing a Digital Signal
8.2 Introduction to DSP on the ARM
8.3 FIR filters
8.4 IIR Filters
8.5 The Discrete Fourier Transform
8.6 Summary
Chapter 9. Exception and Interrupt Handling
9.1 Exception Handling
9.2 Interrupts
9.3 Interrupt Handling Schemes
9.4 Summary
Chapter 10. Firmware
10.1 Firmware and Bootloader
10.2 Example: Sandstone
10.3 Summary
Chapter 11. Embedded Operating Systems
11.1 Fundamental Components
11.2 Example: Simple Little Operating System
11.3 Summary
Chapter 12. Caches
12.1 The Memory Hierarchy and Cache Memory
12.2 Cache Architecture
12.3 Cache Policy
12.4 Coprocessor 15 and Caches
12.5 Flushing and Cleaning Cache Memory
12.6 Cache Lockdown
12.7 Caches and Software Performance
12.8 Summary
Chapter 13. Memory Protection Units
13.1 Protected Regions
13.2 Initializing the MPU, Caches, and Write Buffer
13.3 Demonstration of an MPU system
13.4 Summary
Chapter 14. Memory Management Units
14.1 Moving from an MPU to an MMU
14.2 How Virtual Memory Works
14.3 Details of the ARM MMU
14.4 Page Tables
14.5 The Translation Lookaside Buffer
14.6 Domains and Memory Access Permission
14.7 The Caches and Write Buffer
14.8 Coprocessor 15 and MMU Configuration
14.9 The Fast Context Switch Extension
14.10 Demonstration: A Small Virtual Memory System
14.11 The Demonstration as mmuSLOS
14.12 Summary
Chapter 15. The Future of the Architecture
15.1 Advanced DSP and SIMD Support in ARMv6
15.2 System and Multiprocessor Support Additions to ARMv6
15.3 ARMv6 Implementations
15.4 Future Technologies beyond ARMv6
15.5 Summary
Appendix A. ARM and Thumb Assembler Instructions
A.1 Using This Appendix
A.2 Syntax
A.3 Alphabetical List of ARM and Thumb Instructions
A.4 ARM Assembler Quick Reference
A.5 GNU Assembler Quick Reference
Appendix B. ARM and Thumb Instruction Encodings
B.1 ARM Instruction Set Encodings
B.2 Thumb Instruction Set Encodings
B.3 Program Status Registers
Appendix C. Processors and Architecture
C.1 ARM Naming Convention
C.2 Core and Architectures
Appendix D. Instruction Cycle Timings
D.1 Using the Instruction Cycle Timing Tables
D.2 ARM7TDMI Instruction Cycle Timings
D.3 ARM9TDMI Instruction Cycle Timings
D.4 StrongARM1 Instruction Cycle Timings
D.5 ARM9E Instruction Cycle Timings
D.6 ARM10E Instruction Cycle Timings
D.7 Intel XScale Instruction Cycle Timings
D.8 ARM11 Cycle Timings
Appendix E. Suggested Reading
E.1 ARM References
E.2 Algorithm References
E.3 Memory Management and Cache Architecture (Hardware Overview and Reference)
E.4 Operating System References
Index
ARM System Developer’s Guide Designing and Optimizing System Software
About the Authors Andrew N. Sloss Andrew Sloss received a B.Sc. in Computer Science from the University of Herefordshire (UK) in 1992 and was certified as a Chartered Engineer by the British Computer Society (C.Eng, MBCS). He has worked in the computer industry for over 16 years and has been involved with the ARM processor since 1987. He has gained extensive experience developing a wide range of applications running on the ARM processor. He designed the first editing systems for both Chinese and Egyptian Hieroglyphics executing on the ARM2 and ARM3 processors for Emerald Publishing (UK). Andrew Sloss has worked at ARM Inc. for over six years. He is currently a Technical Sales Engineer advising and supporting companies developing new products. He works within the U.S. Sales Organization and is based in Los Gatos, California. Dominic Symes Dominic Symes is currently a software engineer at ARM Ltd. in Cambridge, England, where he has worked on ARM-based embedded software since 1995. He received his B.A. and D.Phil. in Mathematics from Oxford University. He first programmed the ARM in 1989 and is particularly interested in algorithms and optimization techniques. Before joining ARM, he wrote commercial and public domain ARM software. Chris Wright Chris Wright began his embedded systems career in the early 80s at Lockheed Advanced Marine Systems. While at Advanced Marine Systems he wrote small software control systems for use on the Intel 8051 family of microcontrollers. He has spent much of his career working at the Lockheed Palo Alto Research Laboratory and in a software development group at Dow Jones Telerate. Most recently, Chris Wright spent several years in the Customer Support group at ARM Inc., training and supporting partner companies developing new ARM-based products. Chris Wright is currently the Director of Customer Support at Ultimodule Inc. in Sunnyvale, California. John Rayfield John Rayfield, an independent consultant, was formerly Vice President of Marketing, U.S., at ARM. In this role he was responsible for setting ARM’s strategic marketing direction in the U.S., and identifying opportunities for new technologies to serve key market segments. John joined ARM in 1996 and held various roles within the company, including Director of Technical Marketing and R&D, which were focused around new product/technology development. Before joining ARM, John held several engineering and management roles in the field of digital signal processing, software, hardware, ASIC and system design. John holds an M.Sc. in Signal Processing from the University of Surrey (UK) and a B.Sc.Hons. in Electronic Engineering from Brunel University (UK).
ARM System Developer’s Guide Designing and Optimizing System Software Andrew N. Sloss Dominic Symes Chris Wright With a contribution by John Rayfield AMSTERDAM • BOSTON • HEIDELBERG • LONDON NEW YORK • OXFORD • PARIS • SAN DIEGO SAN FRANCISCO • SINGAPORE • SYDNEY • TOKYO Morgan Kaufmann is an imprint of Elsevier
Senior Editor Publishing Services Manager Project Manager Developmental Editor Editorial Assistant Cover Design Cover Image Technical Illustration Composition Copyeditor Proofreader Indexer Interior printer Cover printer Denise E.M. Penrose Simon Crump Sarah M. Hajduk Belinda Breyer Summer Block Dick Hannus Red Wing No.6 by Charles Biederman Collection Walker Art Center, Minneapolis Gift of the artist through the Ford Foundation Purchase Program, 1964 Dartmouth Publishing Cepha Imaging, Ltd. Ken Dellapenta Jan Cocker Ferreira Indexing The Maple-Vail Book Manufacturing Group Phoenix Color Morgan Kaufmann Publishers is an imprint of Elsevier. 500 Sansome Street, Suite 400, San Francisco, CA 94111 This book is printed on acid-free paper. © 2004 by Elsevier Inc. All rights reserved. The programs, examples, and applications presented in this book and on the publisher’s Web site have been included for their instructional value. The publisher and the authors offer no warranty implied or express, including but not limited to implied warranties of fitness or merchantability for any particular purpose and do not accept any liability for any loss or damage arising from the use of any information in this book, or any error or omission in such information, or any incorrect use of these programs, procedures, and applications. Designations used by companies to distinguish their products are often claimed as trademarks or registered trademarks. In all instances in which Morgan Kaufmann Publishers is aware of a claim, the product names appear in initial capital or all capital letters. Readers, however, should contact the appropriate companies for more complete information regarding trademarks and registration. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means—electronic, mechanical, photocopying, scanning, or otherwise—without prior written permission of the publisher. Permissions may be sought directly from Elsevier’s Science & Technology Rights Department in Oxford, UK: phone: (+44) 1865 843830, fax: (+44) 1865 853333, e-mail: permissions@elsevier.com.uk. You may also complete your request on-line via the Elsevier homepage (http://elsevier.com) by selecting “Customer Support” and then “Obtaining Permissions.” Library of Congress Cataloging-in-Publication Data Sloss, Andrew N. ARM system developer’s guide: designing and optimizing system software/Andrew N. Sloss, Dominic Symes, Chris Wright. p. cm. Includes bibliographical references and index. ISBN 1-55860-874-5 (alk. paper) 1. Computer software–Development. 2. RISC microprocessors. 3. Computer architecture. I. Symes, Dominic. II. Wright, Chris, 1953- III. Title. QA76.76.D47S565 2004 005.1–dc22 ISBN: 1-55860-874-5 For information on all Morgan Kaufmann publications, visit our Web site at www.mkp.com. Printed in the United States of America 08 07 06 05 04 5 4 3 2 1 2004040366
About the Authors Preface Chapter 1 ARM Embedded Systems 1.1 1.2 1.3 1.4 1.5 The RISC Design Philosophy The ARM Design Philosophy Embedded System Hardware Embedded System Software Summary Chapter 2 ARM Processor Fundamentals 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 Registers Current Program Status Register Pipeline Exceptions, Interrupts, and the Vector Table Core Extensions Architecture Revisions ARM Processor Families Summary Chapter 3 Introduction to the ARM Instruction Set 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 Data Processing Instructions Branch Instructions Load-Store Instructions Software Interrupt Instruction Program Status Register Instructions Loading Constants ARMv5E Extensions Conditional Execution Summary Contents ii xi 3 4 5 6 12 15 19 21 22 29 33 34 37 38 43 47 50 58 60 73 75 78 79 82 84 v
vi Contents Chapter 4 Introduction to the Thumb Instruction Set Thumb Register Usage ARM-Thumb Interworking Other Branch Instructions Data Processing Instructions Single-Register Load-Store Instructions 4.1 4.2 4.3 4.4 4.5 4.6 Multiple-Register Load-Store Instructions 4.7 4.8 4.9 Stack Instructions Software Interrupt Instruction Summary Chapter 5 Efficient C Programming 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 Division 5.11 5.12 5.13 5.14 Overview of C Compilers and Optimization Basic C Data Types C Looping Structures Register Allocation Function Calls Pointer Aliasing Structure Arrangement Bit-fields Unaligned Data and Endianness Floating Point Inline Functions and Inline Assembly Portability Issues Summary Chapter 6 Writing and Optimizing ARM Assembly Code 6.1 Writing Assembly Code 6.2 6.3 6.4 6.5 6.6 6.7 6.8 Profiling and Cycle Counting Instruction Scheduling Register Allocation Conditional Execution Looping Constructs Bit Manipulation Efficient Switches 87 89 90 92 93 96 97 98 99 100 103 104 105 113 120 122 127 130 133 136 140 149 149 153 155 157 158 163 163 171 180 183 191 197
6.9 6.10 Handling Unaligned Data Summary Chapter 7 Optimized Primitives 7.1 Double-Precision Integer Multiplication 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 Integer Normalization and Count Leading Zeros Division Square Roots Transcendental Functions: log, exp, sin, cos Endian Reversal and Bit Operations Saturated and Rounded Arithmetic Random Number Generation Summary Chapter 8 Digital Signal Processing 8.1 8.2 8.3 8.4 8.5 8.6 Representing a Digital Signal Introduction to DSP on the ARM FIR filters IIR Filters The Discrete Fourier Transform Summary Chapter 9 Exception and Interrupt Handling 9.1 9.2 9.3 9.4 Exception Handling Interrupts Interrupt Handling Schemes Summary Chapter 10 Firmware 10.1 10.2 10.3 Firmware and Bootloader Example: Sandstone Summary Contents vii 201 204 207 208 212 216 238 241 248 253 255 256 259 260 269 280 294 303 314 317 318 324 333 364 367 367 372 379
分享到:
收藏