第1页 / 共54页
第2页 / 共54页
第3页 / 共54页
第4页 / 共54页
第5页 / 共54页
第6页 / 共54页
第7页 / 共54页
第8页 / 共54页
HDMI发送器SiI9134芯片手册和编程指南.pdf
81BCopyright Notice
82BTrademark Acknowledgment
83BFurther Information
0BGeneral Description
9BFeatures
1BSiI9134 Transmitter Pin Diagram
2BFunctional Description
10BSiI9134 HDMI Deep Color Transmitter Compared with SiI9030/9034 devices
11BVideo Data Input and Conversion
35BVideo Processing Pipeline
36BInput Clock Multiplier/Divider
37BVideo Data Capture Logic
38BConfiguration to Support Deep-color
39BCommon Video Input Formats
40BEmbedded Sync Decoding
41BData Enable Generator
42BRe-sampling
43BColor Space Converters (CSC)
44B14-to-8/10/12-Dither
45BColor Range Scaling
46BClipping
47BHDCP Encryption Engine/XOR Mask
48BTMDS Digital Core
12BAudio Data Capture Logic
49BS/PDIF
50BI2S
51BOne-Bit Audio Input (DSD/SACD)
52BHigh-Bit Rate Audio on HDMI
13BAudio DownSampler Limitations
14BHDCP Key ROM
15BInterrupt Out
16BControl and Configuration
53BRegisters/Configuration Logic
54BMicrocontroller Slave I2C Interface
55BDDC Master I2C Interface
3BElectrical Specifications
17BAbsolute Maximum Conditions
18BNormal Operating Conditions
19BDC Specifications
56BDigital I/O Specifications1
57BDC Power Supply Pin Specifications
20BAC Specifications
58BTMDS AC Timing Specifications
59BAudio AC Timing Specifications
84BS/PDIF Input Port Timings
85BI2S Input Port Timings
86BDSD Input Port Timings
60BVideo AC Timing Specifications
61BControl Timing Specifications
21BTiming Diagrams
62BInput Timing Diagrams
63BAudio Timing Diagrams
64BPower Supply Sequencing
65BOutput Timing Diagrams
4BPin Descriptions
22BVideo and Audio Input Pins
23BConfiguration/Programming Pins
24BControl Pins
25BDifferential Signal Data Pins
26BPower and Ground Pins
5BData Bus Mappings
66BRGB and YCbCr 4:4:4 Formats with Separate Syncs
67BYC 4:2:2 Formats with Separate Syncs
68BYC 4:2:2 Formats with Embedded Sync
69BYC Mux 4:2:2 Formats with Separate Syncs
70BYC Mux 4:2:2 Embedded Sync Formats
71B12/15/18-Bit DMO RGB and YCbCr Formats
6BDesign Guidelines
27BPower Supplies
72BVoltage Ripple Regulation
73BDecoupling
28BHigh-Speed TMDS Signals
74BESD Protection
75BTransmitter Layout Guidelines
29BProtection for I2C Port
30BHot Plug Signal Conditioning
31BHDMI Design Considerations
76BHDMI CTS Test ID 7-4: TMDS Differential Rise and Fall Time
77BRecommendation to pass Test ID 7-4
32BEMI Considerations
33BTypical Circuit
78BPower Supply Decoupling
79BHDMI Port TMDS Connections
80BControl Signal Connections
7BPackaging
34B100-pin TQFP Package Dimensions and Marking Specification
8BOrdering Information
87B Disclaimers
88BProducts and Services
Data Sheet
SiI9134 HDMI Deep Color Transmitter
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
Data Sheet
Document # SiI-DS-0193-D
This document was watermarked on 16-01-2008 at 14:14:51 local time.
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
October 2007
Trademark Acknowledgment
Silicon Image™, VastLane™, SteelVine™, PinnaClear™, Simplay™, Simplay HD™, Satalink™, and TMDS™ are
trademarks or registered trademarks of Silicon Image, Inc. in the United States and other countries. HDMI™, the HDMI logo
and High-Definition Multimedia Interface™ are trademarks or registered trademarks of, and are used under license from,
HDMI Licensing, LLC.
Copyright Notice
Copyright © 2007 Silicon Image, Inc. All rights reserved. These materials contain proprietary and confidential information
(including trade secrets, copyright and other interests) of Silicon Image, Inc. You may not use these materials except only for
your bona fide non-commercial evaluation of your potential purchase of products and/services from Silicon Image or its
affiliates, and/or only in connection with your purchase of products and/or services from Silicon Image or its affiliates, and
only in accordance with the terms and conditions herein. You have no right to copy, modify, transfer, sublicense, publicly
display, create derivative works of or distribute these materials, or otherwise make these materials available, in whole or in
part, to any third party.
Further Information
To request other materials, documentation, and information, contact your local Silicon Image, Inc. sales office or visit the
Silicon Image, Inc. web site at www.siliconimage.com.
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
Comment
Tables of AC and DC specification were updated.
Updated DC specifications and overall formatting.
Updated ICCT and ISTBY specifications.
Added Audio Down-sampler information and HDMI design considerations
Corrected DC and Digital I/O specifications, hot plug information, and other
content
Date
11/06
12/06
2/07
4/07
10/07
Revision History
Revision
A
B
B01
C
D
© 2007 Silicon Image. Inc.
SiI-DS-0193-D
ii
© 2007 Silicon Image, Inc. CONFIDENTIAL
Silicon Image, Inc.
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Table of Contents
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
General Description...................................................................................................................................................... 1
Features ..................................................................................................................................................................... 1
SiI9134 Transmitter Pin Diagram ............................................................................................................................... 3
Functional Description ................................................................................................................................................. 4
SiI9134 HDMI Deep Color Transmitter Compared with SiI9030/9034 devices.................................................. 4
Video Data Input and Conversion........................................................................................................................... 5
Video Processing Pipeline ...................................................................................................................................... 5
Input Clock Multiplier/Divider............................................................................................................................... 5
Video Data Capture Logic ...................................................................................................................................... 5
Configuration to Support Deep-color ..................................................................................................................... 5
Common Video Input Formats................................................................................................................................ 6
Embedded Sync Decoding...................................................................................................................................... 6
Data Enable Generator............................................................................................................................................ 6
Re-sampling............................................................................................................................................................ 6
Color Space Converters (CSC)............................................................................................................................... 7
14-to-8/10/12-Dither............................................................................................................................................... 7
Color Range Scaling............................................................................................................................................... 8
Clipping .................................................................................................................................................................. 8
HDCP Encryption Engine/XOR Mask ................................................................................................................... 8
TMDS Digital Core ................................................................................................................................................ 8
Audio Data Capture Logic....................................................................................................................................... 9
S/PDIF .................................................................................................................................................................... 9
I2S ........................................................................................................................................................................... 9
One-Bit Audio Input (DSD/SACD)........................................................................................................................ 9
High-Bit Rate Audio on HDMI .............................................................................................................................. 9
Audio DownSampler Limitations.......................................................................................................................... 10
HDCP Key ROM .....................................................................................................................................................11
Interrupt Out ...........................................................................................................................................................11
Control and Configuration .................................................................................................................................... 12
Registers/Configuration Logic.............................................................................................................................. 12
Microcontroller Slave I2C Interface...................................................................................................................... 12
DDC Master I2C Interface .................................................................................................................................... 12
Electrical Specifications ............................................................................................................................................. 13
Absolute Maximum Conditions............................................................................................................................. 13
Normal Operating Conditions............................................................................................................................... 13
DC Specifications.................................................................................................................................................... 14
Digital I/O Specifications1.................................................................................................................................... 14
DC Power Supply Pin Specifications ................................................................................................................... 15
AC Specifications.................................................................................................................................................... 16
TMDS AC Timing Specifications......................................................................................................................... 16
Audio AC Timing Specifications.......................................................................................................................... 17
Video AC Timing Specifications .......................................................................................................................... 18
Control Timing Specifications.............................................................................................................................. 19
Timing Diagrams .................................................................................................................................................... 20
Input Timing Diagrams......................................................................................................................................... 20
Audio Timing Diagrams ....................................................................................................................................... 22
Power Supply Sequencing .................................................................................................................................... 23
Output Timing Diagrams ...................................................................................................................................... 23
© 2007 Silicon Image, Inc. CONFIDENTIAL
iii
SiI-DS-0193-D
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
Pin Descriptions .......................................................................................................................................................... 24
Video and Audio Input Pins................................................................................................................................... 24
Configuration/Programming Pins......................................................................................................................... 25
Control Pins............................................................................................................................................................. 25
Differential Signal Data Pins ................................................................................................................................. 26
Power and Ground Pins ......................................................................................................................................... 26
Data Bus Mappings .................................................................................................................................................... 27
RGB and YCbCr 4:4:4 Formats with Separate Syncs .......................................................................................... 28
YC 4:2:2 Formats with Separate Syncs ................................................................................................................ 31
YC 4:2:2 Formats with Embedded Sync .............................................................................................................. 32
YC Mux 4:2:2 Formats with Separate Syncs........................................................................................................ 34
YC Mux 4:2:2 Embedded Sync Formats.............................................................................................................. 36
12/15/18-Bit DMO RGB and YCbCr Formats ..................................................................................................... 38
Design Guidelines ....................................................................................................................................................... 39
Power Supplies........................................................................................................................................................ 39
Voltage Ripple Regulation .................................................................................................................................... 39
Decoupling............................................................................................................................................................ 39
High-Speed TMDS Signals..................................................................................................................................... 40
ESD Protection ..................................................................................................................................................... 40
Transmitter Layout Guidelines ............................................................................................................................. 40
Protection for I2C Port ........................................................................................................................................... 41
Hot Plug Signal Conditioning................................................................................................................................ 41
HDMI Design Considerations................................................................................................................................ 41
HDMI CTS Test ID 7-4: TMDS Differential Rise and Fall Time......................................................................... 41
Recommendation to pass Test ID 7-4 ................................................................................................................... 41
EMI Considerations ............................................................................................................................................... 41
Typical Circuit ........................................................................................................................................................ 42
Power Supply Decoupling .................................................................................................................................... 42
HDMI Port TMDS Connections........................................................................................................................... 43
Control Signal Connections.................................................................................................................................. 44
Packaging .................................................................................................................................................................... 45
100-pin TQFP Package Dimensions and Marking Specification........................................................................ 45
Ordering Information ................................................................................................................................................ 46
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
SiI-DS-0193-D
iv
© 2007 Silicon Image, Inc. CONFIDENTIAL
Silicon Image, Inc.
SiI9134 HDMI Deep Color Transmitter
Data Sheet
List of Figures
Figure 1. Functional Block Diagram .............................................................................................................................. 1
Figure 2. 100-Pin TQFP Pinout Diagram ....................................................................................................................... 3
Figure 3. Simplified Host I2C Ports................................................................................................................................ 4
Figure 4. Transmitter Video Data Processing Path ......................................................................................................... 5
Figure 5: High Speed Data Transmission ..................................................................................................................... 10
Figure 6: High Bitrate Stream Before and after Reassembly and Splitting .................................................................. 10
Figure 7. High Bit Rate Stream After Splitting............................................................................................................. 10
Figure 8. Master I2C Supported Transactions............................................................................................................... 12
Figure 9. IDCK Clock Cycle/High/Low Times ............................................................................................................ 20
Figure 10. Control and Data Single-Edge Setup/Hold Times to IDCK........................................................................ 20
Figure 11. Dual-Edge Setup/Hold Times to IDCK....................................................................................................... 20
Figure 12. VSYNC and HSYNC Delay Times from/to DE.......................................................................................... 21
Figure 13. DE High/Low Times ................................................................................................................................... 21
Figure 14. RESET# Minimum Timings........................................................................................................................ 21
Figure 15. S/PDIF Input Timings ................................................................................................................................. 22
Figure 16. I2S Input Timings ........................................................................................................................................ 22
Figure 17. DSD Input Timings ..................................................................................................................................... 22
Figure 18. MCLK Timings .......................................................................................................................................... 22
Figure 19. Power Supply Sequencing........................................................................................................................... 23
Figure 20. Differential Transition Times ...................................................................................................................... 23
Figure 21. I2C Data Valid Delay (Driving Read Cycle Data) ....................................................................................... 23
Figure 22. INT Output Pin Response to HPD Input Change........................................................................................ 23
Figure 23. 4:4:4 RGB 36-Bit Timing Diagram............................................................................................................. 29
Figure 24. 4:4:4 YCbCr 36-Bit Timing Diagram.......................................................................................................... 29
Figure 25. 4:4:4 RGB 30-Bit Timing Diagram............................................................................................................. 29
Figure 26. 4:4:4 YCbCr 30-Bit Timing Diagram.......................................................................................................... 30
Figure 27. 4:4:4 RGB 24-Bit Timing Diagram............................................................................................................. 30
Figure 28. Figure 24. 4:4:4 RGB 24-Bit Timing Diagram ........................................................................................... 30
Figure 29. YC 4:2:2 12-Bit per Pixel Timing Diagram ................................................................................................ 33
Figure 30. YC 4:2:2 10-Bit per Pixel Timing Diagram ................................................................................................ 33
Figure 31. YC 4:2:2 8-Bit per Pixel Timing Diagram .................................................................................................. 33
Figure 32. YC Mux 4:2:2 Timing Diagram .................................................................................................................. 35
Figure 33. YC Mux 4:2:2 Embedded Sync Encoding Timing Diagram....................................................................... 37
Figure 34. 12-Bit Input DMO Timing Diagram ........................................................................................................... 38
Figure 35. Decoupling and Bypass Capacitor Placement............................................................................................. 39
Figure 36. Decoupling and Bypass Schematic ............................................................................................................. 39
Figure 37. Transmitter to HDMI Connector Routing – Top View................................................................................ 40
Figure 38. Power Supply Decoupling and PLL Filtering Schematic............................................................................ 42
Figure 39. HDMI Port TMDS Connections Schematic ................................................................................................ 43
Figure 40. HDMI Port ESD Protection Schematic....................................................................................................... 43
Figure 41. Controller Connections Schematic.............................................................................................................. 44
Figure 42. 13 mm x 13 mm TQFP Package Diagram................................................................................................... 45
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
© 2007 Silicon Image, Inc. CONFIDENTIAL
v
SiI-DS-0193-D
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
List of Tables
Table 1. Summary of New Features................................................................................................................................ 4
Table 2. Video Input Formats Example .......................................................................................................................... 6
Table 3. Color Space versus Video Format..................................................................................................................... 7
Table 4. YCbCr-to-RGB Color Space Conversion Formula........................................................................................... 7
Table 5. Supported MCLK Frequencies ......................................................................................................................... 9
Table 6. Channel Status Bits Used for Word Length .....................................................................................................11
Table 7. Control of I2C Address with CI2CA Pin ......................................................................................................... 12
Table 8. Video and Audio Pins...................................................................................................................................... 24
Table 9. Configuration/Programming Pins ................................................................................................................... 25
Table 10. Control Pins .................................................................................................................................................. 25
Table 11. Differential Signal Data Pins ........................................................................................................................ 26
Table 12. Power and Ground Pins ................................................................................................................................ 26
Table 13. Input Video Formats ..................................................................................................................................... 27
Table 14. 4:4:4 Mappings ............................................................................................................................................. 28
Table 15. YC 4:2:2 Separate Sync Pin Mappings......................................................................................................... 31
Table 16. YC 4:2:2 Embedded Sync Pin Mappings...................................................................................................... 32
Table 17. YC Mux 4:2:2 Mappings .............................................................................................................................. 34
Table 18. YC Mux 4:2:2 Embedded Sync Pin Mapping............................................................................................... 36
Table 19. 12/15/18-Bit Input 4:4:4 Mappings .............................................................................................................. 38
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
SiI-DS-0193-D
vi
© 2007 Silicon Image, Inc. CONFIDENTIAL
SiI9134 HDMI Deep Color Transmitter
Data Sheet
formats. Four I2S inputs support High Bit-Rate audio and
DVD-Audio, and a dedicated 4-pin Direct Stream Digital
(DSD) 8-channel input provides for SACD and decoded
Dolby Digital applications.
Features
Transmitter complies with the HDMI 1.3, HDCP 1.3, and
Integrated TMDS core operates from 25 MHz to
225 MHz to support Deep Color and 1080p resolution
Flexible video interface
High-end digital audio interface
Master I2C interface for DDC connection simplifies board
Integrated HDCP encryption engine for transmitting
Pre-programmed HDCP keys provide the highest level of
Receiver Detection
layout and lowers cost
DVI 1.0 Specifications
protected audio and video content
key security and simplify manufacturing
General Description
The SiI9134 HDMI Deep Color Transmitter is a third-
generation High Definition Multimedia Interface (HDMI)
transmitter that supports the HDMI 1.3 Specification.
This fully HDMI-compliant device provides a simple, low
cost method of sending protected digital audio and video
that provides end users with a truly all-digital experience.
AV receivers, along with Blu-ray and HD DVD
players/recorders, can provide high quality digital audio
and video over a simple, low cost cable. Built-in
backward compatibility with the DVI 1.0 Specification
allows HDMI systems to connect to DVI 1.0 displays.
The SiI9134 transmitter extends the Silicon Image family
of HDMI transmitters by supporting 30-bit and 36-bit
Deep Color. It performs 10/12-bit to 8-bit conversion of
the 10/12-bit Deep Color video input data by increasing
the TMDS clock frequency and packing the extra bits into
the next byte.
The SiI9134 transmitter incorporates a flexible audio and
video interface. An integrated color-space converter
allows direct connection to all major MPEG decoders,
including those that provide only an ITU.656 output. An
industry standard S/PDIF input accepts PCM-encoded
data as well as Dolby Digital, DTS, and other compatible
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
Flexible power management
100-pin TQFP package
Registers
----------------
Configuration
Logic Block
VastLane
TMDS
Digital
Core
Video Data
Capture /
DE Gen /
IDCK
D[35:0]
HSYNC
VSYNC
DE
Receiver Sense + Interrupt Logic
Video
Processing
656
Logic
Block
TXC±
TX0±
TX1±
TX2±
5V
DSDA
DSCL
INT
HPD
Packetizer
XOR
E-DDC
Master
CSDA
CSCL
CI2CA
RESET #
encrypted
data
EXT _SWING
I2C
Slave
HDCP
Keys
ROM
control signals
Monitor Detection supported through Hot Plug and
Programmable Data Enable generator and sync extraction
Software- and pin-compatible with the SiI9034
transmitter
DCLK
SPDIF
MCLK
SCK
WS
SD[3:0]
DL[3:0]
DR[3:0]
Audio Data
`
Capture
Logic
Block
audio data
Figure 1. Functional Block Diagram
© 2007 Silicon Image, Inc. CONFIDENTIAL
SiI-DS-0193-D
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
The transmitter comes pre-programmed with High Bandwidth Content Protection (HDCP) keys, which simplifies
manufacturing, lowers cost, and provides the highest level of HDCP key security available. The HDMI transmitters from
Silicon Image use the latest generation of TMDS core technology, which are guaranteed to pass all HDMI compliance tests.
The SiI9134 transmitter is capable of supporting resolutions of up to 1080p.
The video interface supports DVD and HD MPEG decoders and has the following features:
24-bit, 30-bit, and 36-bit RGB/YCbCr 4:4:4 (Deep Color)
16-bit, 20-bit, and 24-bit YCbCr 4:2:2
8-bit, 10-bit, and 12-bit YCbCr 4:2:2 (ITU.601 and ITU.656)
12-bit, 15-bit, and 18-bit, dual-edge clocking input modes
•
•
•
•
• YCbCr-to-RGB color space conversion
• BTA-T1004 video input format
•
Input clock divider or multiplier ( input clock frequencies of 0.5x, 2x, 4x)
IEC60958 or IEC61937 compatible
2:1 and 4:1 down-sampling to handle 96 kHz and 192 kHz audio streams
The audio interface supports the formats and provides the features described below:
• DTS HD and Dolby True HD high bit rate audio support
• Dedicated 4-pin DSD input to support Super Audio CD applications
• Four I2S inputs accept Dolby Digital and DVD-Audio input (2-channel 192 kHz, 8-channel 192 kHz)
• S/PDIF input supports PCM, Dolby Digital, and DTS digital audio transmission (32–192 kHz sample rate)
•
• Flexible, programmable I2S channel mapping
•
Silicon Im age
CAV Audio CHIN A IN C.
Confidential
Internal Use Only
for
SiI-DS-0193-D
2
© 2007 Silicon Image, Inc. CONFIDENTIAL
相关推荐
2023年江西萍乡中考道德与法治真题及答案.doc
2012年重庆南川中考生物真题及答案.doc
2013年江西师范大学地理学综合及文艺理论基础考研真题.doc
2020年四川甘孜小升初语文真题及答案I卷.doc
2020年注册岩土工程师专业基础考试真题及答案.doc
2023-2024学年福建省厦门市九年级上学期数学月考试题及答案.doc
2021-2022学年辽宁省沈阳市大东区九年级上学期语文期末试题及答案.doc
2022-2023学年北京东城区初三第一学期物理期末试卷及答案.doc
2018上半年江西教师资格初中地理学科知识与教学能力真题及答案.doc
2012年河北国家公务员申论考试真题及答案-省级.doc
2020-2021学年江苏省扬州市江都区邵樊片九年级上学期数学第一次质量检测试题及答案.doc
2022下半年黑龙江教师资格证中学综合素质真题及答案.doc
