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32418_fm.pdf
Front Matter
About the Author
Preface
Table of Contents
Index
A
B
C
D
E
F
G
H
I
J
K
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32418_toc.pdf
Front Matter
Preface
Table of Contents
1. The Semiconductor Industry
1.1 Overview
1.2 Objectives
1.3 Birth of an Industry
1.4 The Solid-State Era
1.5 Integrated Circuits (ICs)
1.6 Process and Product Trends
1.7 Industry Organization
1.8 Stages of Manufacturing
1.9 The Junction Transistor
1.10 Five Decades of Industry Development
1.11 The Nano Era
1.12 Review Questions
1.13 References
2. Properties of Semiconductor Materials and Chemicals
2.1 Overview
2.2 Objectives
2.3 Atomic Structure
2.4 The Periodic Table of the Elements
2.5 Electrical Conduction
2.6 Dielectrics and Capacitors
2.7 Intrinsic Semiconductors
2.8 Doped Semiconductors
2.9 Electron and Hole Conduction
2.10 Semiconductor Production Materials
2.11 Semiconducting Compounds
2.12 Silicon Germanium
2.13 Engineered Substrates
2.14 Ferroelectric Materials
2.15 Diamond Semiconductors
2.16 Process Chemicals
2.17 States of Matter
2.18 Properties of Matter
2.19 Pressure and Vacuum
2.20 Acids, Alkalis, and Solvents
2.21 Chemical Purity and Cleanliness
2.22 Review Questions
2.23 References
3. Crystal Growth and Silicon Wafer Preparation
3.1 Overview
3.2 Objectives
3.3 Introduction
3.4 Semiconductor Silicon Preparation
3.5 Crystalline Materials
3.6 Crystal Orientation
3.7 Crystal Growth
3.8 Crystal and Wafer Quality
3.9 Wafer Preparation
3.10 Wafer Slicing
3.11 Wafer Marking
3.12 Rough Polish
3.13 Chemical Mechanical Polishing (CMP)
3.14 Backside Processing
3.15 Double-Sided Polishing
3.16 Edge Grinding and Polishing
3.17 Wafer Evaluation
3.18 Oxidation
3.19 Packaging
3.20 Engineered Wafers (Substrates)
3.21 Review Questions
3.22 References
4. Overview of Wafer Fabrication
4.1 Overview
4.2 Objectives
4.3 Goal of Wafer Fabrication
4.4 Wafer Terminology
4.5 Basic Wafer-Fabrication Operations
4.6 Example Fabrication Process
4.7 Chip Terminology
4.8 Wafer Sort
4.9 Packaging
4.10 Summary
4.11 Review Questions
4.12 References
5. Contamination Control
5.1 Overview
5.2 Objectives
5.3 Introduction
5.4 Contamination Sources
5.5 Cleanroom Construction
5.6 Cleanroom Materials and Supplies
5.7 Cleanroom Maintenance
5.8 Wafer Surface Cleaning
5.9 Review Questions
5.10 References
6. Productivity and Process Yields
6.1 Overview
6.2 Objectives
6.3 Yield Measurement Points
6.4 Accumulative Wafer-Fabrication Yield
6.5 Wafer-Fabrication Yield Limiters
6.6 Assembly and Final Test Yields
6.7 Overall Process Yields
6.8 Review Questions
6.9 References
7. Oxidation
7.1 Overview
7.2 Objectives
7.3 Silicon Dioxide Layer Uses
7.4 Thermal Oxidation Mechanisms
7.5 Oxidation Processes
7.6 Postoxidation Evaluation
7.7 Review Questions
7.8 References
8. The Ten-Step Patterning Process - Surface Preparation to Exposure
8.1 Overview
8.2 Objectives
8.3 Introduction
8.4 Overview of the Photomasking Process
8.5 Ten-Step Process
8.6 Basic Photoresist Chemistry
8.7 Photoresist Performance Factors
8.8 Physical Properties of Photoresists
8.9 Photomasking Processes
8.10 Surface Preparation
8.11 Photoresist Application (Spinning)
8.12 Soft Bake
8.13 Alignment and Exposure
8.14 Advanced Lithography
8.15 Review Questions
8.16 References
9. The Ten-Step Patterning Process - Developing to Final Inspection
9.1 Overview
9.2 Objectives
9.3 Hard Bake
9.4 Integrated Image Processing
9.5 Etch
9.6 Wet Etching
9.7 Dry Etch
9.8 Resist Stripping
9.9 Final Inspection
9.10 Mask Making
9.11 Summary
9.12 Review Questions
9.13 References
10. Advanced Photolithography Processes
10.1 Overview
10.2 Objectives
10.3 Issues of VLSI/ULSI Patterning
10.4 Other Exposure Issues
10.5 Surface Problems
10.6 Antireflective Coatings
10.7 Photoresist Process Advances
10.8 Improving Etch Definition
10.9 Self-Aligned Structures
10.10 Etch Profile Control
10.11 Review Questions
10.12 References
11. Doping
11.1 Overview
11.2 Objectives
11.3 Introduction
11.4 Formation of a Doped Region by Diffusion
11.5 Formation of a Doped Region and Junction by Diffusion
11.6 Diffusion Process Steps
11.7 Deposition
11.8 Drive-in Oxidation
11.9 Introduction to Ion Implantation
11.10 Concept of Ion Implantation
11.11 Ion Implantation System
11.12 Dopant Concentration in Implanted Regions
11.13 Evaluation of Implanted Layers
11.14 Uses of Ion Implantation
11.15 The Future of Doping
11.16 Review Questions
11.17 References
12. Layer Deposition
12.1 Overview
12.2 Objectives
12.3 Introduction
12.4 Chemical Vapor Deposition Basics
12.5 CVD Process Steps
12.6 CVD System Types
12.7 Atmospheric-Pressure CVD Systems
12.8 Low-Pressure Chemical Vapor Deposition (LPCVD)
12.9 Atomic Layer Deposition (ALD)
12.10 Vapor Phase Epitaxy (VPE)
12.11 Molecular Beam Epitaxy (MBE)
12.12 Metalorganic CVD (MOCVD)
12.13 Deposited Films
12.14 Deposited Semiconductors
12.15 Epitaxial Silicon
12.16 Polysilicon and Amorphous Silicon Deposition
12.17 SOS and SOI
12.18 Gallium Arsenide on Silicon
12.19 Insulators and Dielectrics
12.20 Conductors
12.21 Review Questions
12.22 References
13. Metallization
13.1 Overview
13.2 Objectives
13.3 Introduction
13.4 Conductors - Single-Level Metal
13.5 Conductors - Multilevel Metal Schemes
13.6 Conductors
13.7 Electrochemical Plating (ECP)
13.8 Chemical Mechanical Processing
13.9 Metal Film Uses
13.10 Deposition Methods
13.11 Vacuum Pumps
13.12 Summary
13.13 Review Questions
13.14 References
14. Process and Device Evaluation
14.1 Overview
14.2 Objectives
14.3 Introduction
14.4 Wafer Electrical Measurements
14.5 Process and Device Evaluation
14.6 Physical Measurement Methods
14.7 Layer Thickness Measurements
14.8 Junction Depth
14.9 Contamination and Defect Detection
14.10 General Surface Characterization
14.11 Contamination Identification
14.12 Device Electrical Measurements
14.13 Review Questions
14.14 References
15. The Business of Wafer Fabrication
15.1 Overview
15.2 Objectives
15.3 Wafer Fabrication Costs
15.4 Equipment
15.5 Automation
15.6 Factory-Level Automation
15.7 Equipment Standards
15.8 Statistical Process Control (SPC)
15.9 Inventory Control
15.10 Quality Control and Certification - ISO 9000
15.11 Line Organization
15.12 Review Questions
15.13 References
16. Introduction to Devices and Integrated Circuit Formation
16.1 Overview
16.2 Objectives
16.3 Semiconductor-Device Formation
16.4 Alternative (Scaled) Transistor Designs
16.5 Integrated-Circuit Formation
16.6 Bi-MOS
16.7 Superconductors
16.8 Review Questions
16.9 References
17. Introduction to Integrated Circuits
17.1 Overview
17.2 Objectives
17.3 Introduction
17.4 Circuit Basics
17.5 Integrated Circuit Types
17.6 The Next Generation
17.7 Review Questions
17.8 References
18. Packaging
18.1 Overview
18.2 Objectives
18.3 Introduction
18.4 Chip Characteristics
18.5 Package Functions and Design
18.6 Overview of Packaging Operations
18.7 Packaging Processes
18.8 Alternative Process
18.9 Transfer to Packaging Area
18.10 Package Process Flows
18.11 Package/Bare Die Strategies
18.12 Package Design
18.13 Package Type/Technology Summary
18.14 Review Questions
18.15 References
Glossary
Index
A
B
C
D
E
F
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H
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J
K
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32418_01.pdf
Front Matter
Table of Contents
1. The Semiconductor Industry
1.1 Overview
1.2 Objectives
1.3 Birth of an Industry
1.4 The Solid-State Era
1.5 Integrated Circuits (ICs)
1.6 Process and Product Trends
1.7 Industry Organization
1.8 Stages of Manufacturing
1.9 The Junction Transistor
1.10 Five Decades of Industry Development
1.11 The Nano Era
1.12 Review Questions
1.13 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
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X
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Z
32418_02.pdf
Front Matter
Table of Contents
2. Properties of Semiconductor Materials and Chemicals
2.1 Overview
2.2 Objectives
2.3 Atomic Structure
2.4 The Periodic Table of the Elements
2.5 Electrical Conduction
2.6 Dielectrics and Capacitors
2.7 Intrinsic Semiconductors
2.8 Doped Semiconductors
2.9 Electron and Hole Conduction
2.10 Semiconductor Production Materials
2.11 Semiconducting Compounds
2.12 Silicon Germanium
2.13 Engineered Substrates
2.14 Ferroelectric Materials
2.15 Diamond Semiconductors
2.16 Process Chemicals
2.17 States of Matter
2.18 Properties of Matter
2.19 Pressure and Vacuum
2.20 Acids, Alkalis, and Solvents
2.21 Chemical Purity and Cleanliness
2.22 Review Questions
2.23 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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U
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X
Y
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32418_03.pdf
Front Matter
Table of Contents
3. Crystal Growth and Silicon Wafer Preparation
3.1 Overview
3.2 Objectives
3.3 Introduction
3.4 Semiconductor Silicon Preparation
3.5 Crystalline Materials
3.6 Crystal Orientation
3.7 Crystal Growth
3.8 Crystal and Wafer Quality
3.9 Wafer Preparation
3.10 Wafer Slicing
3.11 Wafer Marking
3.12 Rough Polish
3.13 Chemical Mechanical Polishing (CMP)
3.14 Backside Processing
3.15 Double-Sided Polishing
3.16 Edge Grinding and Polishing
3.17 Wafer Evaluation
3.18 Oxidation
3.19 Packaging
3.20 Engineered Wafers (Substrates)
3.21 Review Questions
3.22 References
Index
A
B
C
D
E
F
G
H
I
J
K
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N
O
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32418_04.pdf
Front Matter
Table of Contents
4. Overview of Wafer Fabrication
4.1 Overview
4.2 Objectives
4.3 Goal of Wafer Fabrication
4.4 Wafer Terminology
4.5 Basic Wafer-Fabrication Operations
4.6 Example Fabrication Process
4.7 Chip Terminology
4.8 Wafer Sort
4.9 Packaging
4.10 Summary
4.11 Review Questions
4.12 References
Index
A
B
C
D
E
F
G
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K
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32418_05.pdf
Front Matter
Table of Contents
5. Contamination Control
5.1 Overview
5.2 Objectives
5.3 Introduction
5.4 Contamination Sources
5.5 Cleanroom Construction
5.6 Cleanroom Materials and Supplies
5.7 Cleanroom Maintenance
5.8 Wafer Surface Cleaning
5.9 Review Questions
5.10 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
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S
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U
V
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X
Y
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32418_06.pdf
Front Matter
Table of Contents
6. Productivity and Process Yields
6.1 Overview
6.2 Objectives
6.3 Yield Measurement Points
6.4 Accumulative Wafer-Fabrication Yield
6.5 Wafer-Fabrication Yield Limiters
6.6 Assembly and Final Test Yields
6.7 Overall Process Yields
6.8 Review Questions
6.9 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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U
V
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X
Y
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32418_07.pdf
Front Matter
Table of Contents
7. Oxidation
7.1 Overview
7.2 Objectives
7.3 Silicon Dioxide Layer Uses
7.4 Thermal Oxidation Mechanisms
7.5 Oxidation Processes
7.6 Postoxidation Evaluation
7.7 Review Questions
7.8 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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U
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X
Y
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32418_08.pdf
Front Matter
Table of Contents
8. The Ten-Step Patterning Process - Surface Preparation to Exposure
8.1 Overview
8.2 Objectives
8.3 Introduction
8.4 Overview of the Photomasking Process
8.5 Ten-Step Process
8.6 Basic Photoresist Chemistry
8.7 Photoresist Performance Factors
8.8 Physical Properties of Photoresists
8.9 Photomasking Processes
8.10 Surface Preparation
8.11 Photoresist Application (Spinning)
8.12 Soft Bake
8.13 Alignment and Exposure
8.14 Advanced Lithography
8.15 Review Questions
8.16 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
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32418_09.pdf
Front Matter
Table of Contents
9. The Ten-Step Patterning Process - Developing to Final Inspection
9.1 Overview
9.2 Objectives
9.3 Hard Bake
9.4 Integrated Image Processing
9.5 Etch
9.6 Wet Etching
9.7 Dry Etch
9.8 Resist Stripping
9.9 Final Inspection
9.10 Mask Making
9.11 Summary
9.12 Review Questions
9.13 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
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32418_10.pdf
Front Matter
Table of Contents
10. Advanced Photolithography Processes
10.1 Overview
10.2 Objectives
10.3 Issues of VLSI/ULSI Patterning
10.4 Other Exposure Issues
10.5 Surface Problems
10.6 Antireflective Coatings
10.7 Photoresist Process Advances
10.8 Improving Etch Definition
10.9 Self-Aligned Structures
10.10 Etch Profile Control
10.11 Review Questions
10.12 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
32418_11.pdf
Front Matter
Table of Contents
11. Doping
11.1 Overview
11.2 Objectives
11.3 Introduction
11.4 Formation of a Doped Region by Diffusion
11.5 Formation of a Doped Region and Junction by Diffusion
11.6 Diffusion Process Steps
11.7 Deposition
11.8 Drive-in Oxidation
11.9 Introduction to Ion Implantation
11.10 Concept of Ion Implantation
11.11 Ion Implantation System
11.12 Dopant Concentration in Implanted Regions
11.13 Evaluation of Implanted Layers
11.14 Uses of Ion Implantation
11.15 The Future of Doping
11.16 Review Questions
11.17 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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U
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X
Y
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32418_12.pdf
Front Matter
Table of Contents
12. Layer Deposition
12.1 Overview
12.2 Objectives
12.3 Introduction
12.4 Chemical Vapor Deposition Basics
12.5 CVD Process Steps
12.6 CVD System Types
12.7 Atmospheric-Pressure CVD Systems
12.8 Low-Pressure Chemical Vapor Deposition (LPCVD)
12.9 Atomic Layer Deposition (ALD)
12.10 Vapor Phase Epitaxy (VPE)
12.11 Molecular Beam Epitaxy (MBE)
12.12 Metalorganic CVD (MOCVD)
12.13 Deposited Films
12.14 Deposited Semiconductors
12.15 Epitaxial Silicon
12.16 Polysilicon and Amorphous Silicon Deposition
12.17 SOS and SOI
12.18 Gallium Arsenide on Silicon
12.19 Insulators and Dielectrics
12.20 Conductors
12.21 Review Questions
12.22 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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X
Y
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32418_13.pdf
Front Matter
Table of Contents
13. Metallization
13.1 Overview
13.2 Objectives
13.3 Introduction
13.4 Conductors - Single-Level Metal
13.5 Conductors - Multilevel Metal Schemes
13.6 Conductors
13.7 Electrochemical Plating (ECP)
13.8 Chemical Mechanical Processing
13.9 Metal Film Uses
13.10 Deposition Methods
13.11 Vacuum Pumps
13.12 Summary
13.13 Review Questions
13.14 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
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U
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X
Y
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32418_14.pdf
Front Matter
Table of Contents
14. Process and Device Evaluation
14.1 Overview
14.2 Objectives
14.3 Introduction
14.4 Wafer Electrical Measurements
14.5 Process and Device Evaluation
14.6 Physical Measurement Methods
14.7 Layer Thickness Measurements
14.8 Junction Depth
14.9 Contamination and Defect Detection
14.10 General Surface Characterization
14.11 Contamination Identification
14.12 Device Electrical Measurements
14.13 Review Questions
14.14 References
Index
A
B
C
D
E
F
G
H
I
J
K
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M
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32418_15.pdf
Front Matter
Table of Contents
15. The Business of Wafer Fabrication
15.1 Overview
15.2 Objectives
15.3 Wafer Fabrication Costs
15.4 Equipment
15.5 Automation
15.6 Factory-Level Automation
15.7 Equipment Standards
15.8 Statistical Process Control (SPC)
15.9 Inventory Control
15.10 Quality Control and Certification - ISO 9000
15.11 Line Organization
15.12 Review Questions
15.13 References
Index
A
B
C
D
E
F
G
H
I
J
K
L
M
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32418_16.pdf
Front Matter
Table of Contents
16. Introduction to Devices and Integrated Circuit Formation
16.1 Overview
16.2 Objectives
16.3 Semiconductor-Device Formation
16.4 Alternative (Scaled) Transistor Designs
16.5 Integrated-Circuit Formation
16.6 Bi-MOS
16.7 Superconductors
16.8 Review Questions
16.9 References
Index
A
B
C
D
E
F
G
H
I
J
K
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32418_17.pdf
Front Matter
Table of Contents
17. Introduction to Integrated Circuits
17.1 Overview
17.2 Objectives
17.3 Introduction
17.4 Circuit Basics
17.5 Integrated Circuit Types
17.6 The Next Generation
17.7 Review Questions
17.8 References
Index
A
B
C
D
E
F
G
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32418_18.pdf
Front Matter
Table of Contents
18. Packaging
18.1 Overview
18.2 Objectives
18.3 Introduction
18.4 Chip Characteristics
18.5 Package Functions and Design
18.6 Overview of Packaging Operations
18.7 Packaging Processes
18.8 Alternative Process
18.9 Transfer to Packaging Area
18.10 Package Process Flows
18.11 Package/Bare Die Strategies
18.12 Package Design
18.13 Package Type/Technology Summary
18.14 Review Questions
18.15 References
Index
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B
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D
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32418_glo.pdf
Front Matter
Table of Contents
Glossary
Index
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32418_indx.pdf
Front Matter
Table of Contents
Index
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Microchip Fabrication A Practical Guide to Semiconductor Processing Peter Van Zant Fifth Edition McGraw-Hill New York Chicago San Francisco Lisbon London Madrid Mexico City Milan New Delhi San Juan Seoul Singapore Sydney Toronto iii
Library of Congress Cataloging-in-Publication Data Van Zant, Peter. Microchip fabrication / Peter Van Zant.—5th ed. p. cm. Includes index. ISBN 0-07-143241-8 1. Semiconductors—Design and construction. 2. Integrated circuits—Design and construction. I. Title. TK7871.85.V36 621.3815'2—dc22 2004 2004040287 Copyright © 2004, 2000, 1997, 1984 by The McGraw-Hill Companies, Inc. All rights reserved. Printed in the United States of America. Except as permitted under the United States Copyright Act of 1976, no part of this publication may be repro- duced or distributed in any form or by any means, or stored in a data base or re- trieval system, without the prior written permission of the publisher. 1 2 3 4 5 6 7 8 9 0 DOC/DOC 0 1 0 9 8 7 6 5 4 ISBN 0-07-143241-8 The sponsoring editor for this book was Stephen S. Chapman and the production supervisor was Pamela Pelton. It was set in Century Schoolbook by J. K. Eckert & Company, Inc. Printed and bound by R. R. Donnelley. McGraw-Hill books are available at special quantity discounts to use as premiums and sales promotions, or for use in corporate training programs. For more informa- tion, please write to the Director of Special Sales, McGraw-Hill Professional, Two Penn Plaza, New York, NY 10121-2298. Or contact your local bookstore. This book is printed on recycles, acid-free paper containing a minimum of 50% re- cycled, de-inked fiber. Information contained in this work has been obtained by The McGraw-Hill Companies, Inc. (“McGraw-Hill”) from sources believed to be reliable. However, neither McGraw-Hill nor its authors guarantee the accuracy or completeness of any information published herein and neither McGraw- Hill nor its authors shall be responsible for any errors, omissions, or dam- ages arising out of use of this information. This work is published with the understanding that McGraw-Hill and its authors are supplying information but are not attempting to render engineering or other professional services. If such services are required, the assistance of an appropriate professional should be sought. iv
This edition is dedicated to two exceptional women, Marilyn (Van Zant) O’Connor and Anne Miller. Marilyn is my lovely and loving sister. She is also my good friend, enthusiastic supporter, and a wise confidant. Thanks, sis. For over twenty years Anne has been a collaborator, business partner, and friend. Her wise business counsel and contributions to this text are greatly appreciated. v
Preface to the Fifth Edition Despite recessions, the microchip industry continues its evolutionary march to the physical limits of silicon-based ICs. Fortunately, the end seems always just over the hill, and the industry keeps chugging along. Unfortunately, keeping a textbook current with the advances in microchip fabrication means frequent updates. Hence this fifth edi- tion. This edition follows the same chapter sequence as the previous edi- tions. Hopefully, this will assist instructors in upgrading their course curriculums. Fortunately, the basics of semiconductor device operation and wafer processing remain the same and will be found in this edi- tion. My thanks go to Steve Chapman, my editor at McGraw-Hill. His guidance and patience with my writing schedule are appreciated. Many thanks to Anne Miller and Michael Heynes of Semiconductor Services for their consultation and input. Alex Braun, of Semiconduc- tor International, and Nikki Wood, of Future Fab International, were most helpful with securing permission to reproduce material from their fine publications. Jeff Eckert, of J. K. Eckert & Co., did a fine job on organizing the over 600 figures and editing the manuscript. Mark Hall, Mark Hall Design, and David Wellner did yeoman’s work trans- forming my hand drawings into understandable illustrations. Last, but not least, thanks to my wife Mary Dewitt for enduring my 5:30 A.M. writing sessions and her unending support. xiii
About the Author Peter Van Zant is an internationally known semiconductor profes- sional with an extensive background in process engineering, training, consulting, and writing. Principal of Peter Van Zant Associates, a firm that supplies writing, training, and consulting services to business and industry, he is the author of Semiconductor Technology Glossary, Third Edition; Integrated Circuits Text; Safety First Manual; and Chip Packaging Manual. His books and training materials are used by chip manufacturers, industry suppliers, colleges, and universities. Peter Van Zant Associates’ customers include Intel, National Semiconductor, Applied Materials, Air Products and Chemicals, SCP Global Inc., and a number of educational institutions. Mr. Van Zant is also the elected District 1 Supervisor in his home county of Nevada in California. xiv
Contents Preface xiii Chapter 1. The Semiconductor Industry Overview Objectives Birth of an Industry The Solid-State Era Integrated Circuits (ICs) Process and Product Trends Industry Organization Stages of Manufacturing The Junction Transistor Five Decades of Industry Development The Nano Era Review Questions References Chapter 2. Properties of Semiconductor Materials and Chemicals Overview Objectives Atomic Structure The Periodic Table of the Elements Electrical Conduction Dielectrics and Capacitors Intrinsic Semiconductors Doped Semiconductors Electron and Hole Conduction Semiconductor Production Materials Semiconducting Compounds Silicon Germanium Engineered Substrates Ferroelectric Materials Diamond Semiconductors Process Chemicals States of Matter 1 1 1 1 3 4 5 13 14 17 19 21 23 24 25 25 25 26 27 29 30 31 32 33 37 37 39 39 40 40 40 42 vii
viii Contents Properties of Matter Pressure and Vacuum Acids, Alkalis, and Solvents Chemical Purity and Cleanliness Review Questions References Chapter 3. Crystal Growth and Silicon Wafer Preparation Overview Objectives Introduction Semiconductor Silicon Preparation Crystalline Materials Crystal Orientation Crystal Growth Crystal and Wafer Quality Wafer Preparation Wafer Slicing Wafer Marking Rough Polish Chemical Mechanical Polishing (CMP) Backside Processing Double-Sided Polishing Edge Grinding and Polishing Wafer Evaluation Oxidation Packaging Engineered Wafers (Substrates) Review Questions References Chapter 4. Overview of Wafer Fabrication Overview Objectives Goal of Wafer Fabrication Wafer Terminology Basic Wafer-Fabrication Operations Example Fabrication Process Chip Terminology Wafer Sort Packaging Summary Review Questions References Chapter 5. Contamination Control Overview Objectives Introduction Contamination Sources Cleanroom Construction Cleanroom Materials and Supplies 43 45 46 48 48 49 51 51 51 52 52 53 55 56 59 62 64 65 65 67 67 68 68 68 69 69 69 69 70 71 71 71 72 72 73 83 87 87 89 89 90 90 91 91 91 92 96 106 119
Contents ix Cleanroom Maintenance Wafer Surface Cleaning Review Questions References Chapter 6. Productivity and Process Yields Overview Objectives Yield Measurement Points Accumulative Wafer-Fabrication Yield Wafer-Fabrication Yield Limiters Assembly and Final Test Yields Overall Process Yields Review Questions References Chapter 7. Oxidation Overview Objectives Silicon Dioxide Layer Uses Thermal Oxidation Mechanisms Oxidation Processes Postoxidation Evaluation Review Questions References Chapter 8. The Ten-Step Patterning Process—Surface Preparation to Exposure Overview Objectives Introduction Overview of the Photomasking Process Ten-Step Process Basic Photoresist Chemistry Photoresist Performance Factors Physical Properties of Photoresists Photomasking Processes Surface Preparation Photoresist Application (Spinning) Soft Bake Alignment and Exposure Advanced Lithography Review Questions References Chapter 9. The Ten-Step Patterning Process—Developing to Final Inspection Overview Objectives Hard Bake Integrated Image Processing 119 120 135 136 139 139 139 140 140 142 155 155 157 157 159 159 159 160 163 191 193 195 195 197 197 197 198 199 201 202 207 214 217 218 221 227 231 243 243 244 245 245 245 252 254
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