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Revision History
Table of Contents
List of Figures
List of Tables
About This Document
Purpose and Audience
Acronyms and Abbreviations
Document Conventions
References
Technical Support
Section 1: Introduction
Overview
Ethernet Switch Controller
ARM Cortex-A9 Processor
Section 2: Common Interfaces
System Reset
Power Sequencing
JTAG
Section 3: Ethernet Switch Controller Features Description
Architecture
Feature Overview
Memory
Address Management
Class of Service
Strict Priority-Based Scheduling
Weighted Round Robin Scheduling
Deficit Round Robin Scheduling
Backpressure Handling
Per Port Packet Rate (Storm) Control
Mirroring
Spanning Tree Support
IEEE 802.1D Support
Port Filtering Mode A
Port Filtering Mode B
Port Filtering Mode C
IEEE 802.1Q Support
Link Aggregation
Double-Tagging
Forwarding Control Block Mask
ContentAware Processing
Ingress Filter Processor (IFP)
Network Management Support
Energy Efficient Ethernet
Section 4: Ethernet Switch Controller System Interfaces
Overview
MII Management
Broadcom Serial Interface (BSC)
LED Interfaces
Serial LED Mode
PHY-Driven Parallel LED Mode
Serial to Parallel LED Mode
Section 5: Gigabit Ethernet Transceiver
Copper Interface
Encoder
Decoder
Link Monitor
Digital Adaptive Equalizer
Echo Canceler
Crosstalk Canceler
Analog-to-Digital Converter
Clock Recovery/Generator
Baseline Wander Correction
Multimode TX Digital-to-Analog Converter
Stream Cipher
Wire Map and Pair Skew Correction
Automatic MDI Crossover
1000BASE-T Operation
10/100BASE-TX Operation (Auto-Negotiation Enabled)
10/100BASE-TX Operation (Forced Mode)
Full-Duplex Mode
Master/Slave Configuration
Next Page Exchange
Auto-Negotiation
Ethernet@Wirespeed
Ethernet@Wirespeed Example
Enabling/Disabling Ethernet@Wirespeed
Removing Ethernet@Wirespeed Downgrade
Changing the Number of Failed Link Attempts
Monitoring Ethernet@Wirespeed
Super Isolate Mode
Software Enable/Disable
Standby Power-Down Mode
Auto Power-Down (APD) Mode
ADP Mode Enable (Auto-Negotiation Enabled)
Sleep Cycle Settings
Wake Cycle Settings
Section 6: ARM Cortex-A9 Processor Subsystem Functional Description
Cortex-A9
NOR Serial Flash Interface
MIIM/UART/GPIO Interfaces
SPI interface
Section 7: Pin List Description
Signal Name Descriptions
Pin List by Pin Name
Pin List by Signal Name
Section 8: Electrical Specifications
Absolute Maximum Ratings
DC Characteristics
Operating Conditions
Power-Up and Power-Down Specifications
Power Supply Current
Standard 3.3V Signals
BSC Signals
MIIM (MDIO) Signals
AC Characteristics
AC Timing for Reset
BSC AC Characteristics
SPI AC Characteristics
MDIO AC Characteristics
JTAG AC Specifications
QSPI Flash Interface Timing
LED Controller Interface
XTAL Clock Requirements
LC_PLL0_REFCLK Clock Requirements
AC-JTAG
Section 9: Thermal Characteristics
Section 10: Mechanical Information
Section 11: Ordering Information
Appendix A: Acronyms and Abbreviations
Data Sheet BCM53333 16-Port GbE Unmanaged Switch with Copper PHYs FEATURES • Highly integrated 2416-port 10/100/1000 Mbps • Embedded 16 integrated copper 10/100/1000 • Two integrated QSGMII/1GbE interfaces • Non-blocking architecture, line rate for all packet Ethernet switch SoC. EEE PHYs. sizes. Intelligent Memory Management Unit (MMU) optimized for handling bursty data traffic. IPv4/IPv6 support. • Fully integrated 512 KB packet buffer • • • Flexible Access Control List (ACL). • Enhanced DoS attack statistics gathering. • Low-power Energy Efficient Ethernet (EEE) support with Burst and Batch control policy. • AVB support. • Support for Industrial Temperature. • 40 nm CMOS process. GENERAL DESCRIPTION The Broadcom® BCM53333 System-on-a-Chip (SoC) switch family offers industry-leading integration and performance in a small footprint. The device offers up to 2416 multilayer GbE ports in a 23 mm x 23 mm package. Offering the industry's highest level of integration, the BCM53333 has embedded 16 GPHYs and a powerful 125 MHz ARM Cortex-A9 single-core processor. The BCM53333 is ideal for cost-sensitive edge connectivity applications, such as unmanaged and WebSmart™-lite WebSmart™ switches for Small Medium Business. The BCM53333 device offers multiple I/O configurations that address key segments of edge connectivity. A single BCM53333 device supports the popular 2416x GbE switch designs. Furthermore, the BCM53333 device I/O is optimized for board layout. When used with the Broadcom QSGMII PHY, the BCM53333 device can be connected to the PHYs without any trace crossovers. The optimized I/O map reduces system design effort and enables low-cost PCB design. The BCM53333 device offers many advanced features, such as IEEE 802.1Q VLAN, enhanced Denial of Service (DoS) protection, IPv4 and IPv6 support, advanced ContentAware™ Engine, IEEE 802.1p Quality of Service (QoS), Energy Efficient Ethernet™ (EEE) BENEFITS • Based on industry-leading and market-proven StrataXGS® IV architecture. • Single-chip switch SoC optimized for unmanaged and WebSmart™-lite connectivity applications for SMB networks. • Enhanced memory technology delivers optimum usage of packet-buffer resources. • Eight flexible Class of Service (CoS) queues per port assure the lowest latency to high-priority traffic. IPv6 support provides future-proofing. • • Optimized ball pattern for low-cost PCB design and single-system clock source. • Low-power 40 nm CMOS technology. 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 53333-DS06-R December 19, 2014 Broadcom Confidential
Figure 1: BCM53333 Functional Block Diagram 16 GbE . . . 8 x GPHY 8 x GPHY 8 x 1G MAC 8 x 1G MAC Ingress Pipeline (IP) Ethernet Switch Controller Egress Pipeline (EP) MMU Admission Control Flow Control Queueing 512 KB Packet Buffer (4K x 128B) Scheduling Cortex-A9 125 MHz I$ = 32K / D$ = 32K L2$ = 128 KB 8 Reset I2C/ BSC LED Serial LED Parallel GPIO JTAG MDIO SPI Serial Flash RS-232 Broadcom Corporation 5300 California Avenue Irvine, CA 92617 © 2014 by Broadcom Corporation All rights reserved Printed in the U.S.A. Broadcom®, the pulse logo, Connecting everything®, the Connecting everything logo, BroadScale®, ContentAware™, Ethernet@Wirespeed™, and StrataXGS® IV are among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective owners. This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed, intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations, pollution control, hazardous substances management, or other high-risk application. BROADCOM PROVIDES THIS DATA SHEET “AS-IS,” WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON- Broadcom Confidential
BCM53333 Data Sheet Revision History Revision 53333-DS06-R Date 12/19/14 53333-DS05-R 07/18/14 Revision History Change Description Updated: • Table 34: “Ordering Information for RoHS6 Devices with Exemption 15 (Eutectic Bumps Internally Between Die and Substrate),” on page 93 Added: • Table 33: “Ordering Information for RoHS6 Devices (Contact Broadcom for Availability),” on page 93 Updated: • Change Advanced Data Sheet to Data Sheet. • “Power Supply Current” on page 79 - Added power column to Power Supply Current Tables. Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 3 Broadcom Confidential
BCM53333 Data Sheet Revision History Revision 53333-DS04-R Date 04/23/14 Change Description Updated: • Changed AVS0 pin description to ‘Reserved’ in Table 8: “BCM5333X Hardware • • • • • • • • • • Signals,” on page 54 Table 12: “Operating Conditions,” on page 77 - Remove 0.97V option and change 1.2V to ±3%. Table 17: “BSC Signals,” on page 81 – Input Low Voltage from 1.08V to 0.3*VDDO. – Input High Voltage from 2.1V to 0.7*VDDO. Table 23: “SPI Slave Fast Mode Timing,” on page 86 - Change t_hold from 0 to 4 ns. Table 24: “MDC/MDIO Timing,” on page 87 – MDC Cycle Time from 74 to 80 ns. – MDIO Setup Time from 10 to 20 ns. – MDIO hold time from 0 to 10 ns. Table 26: “QSPI BSPI Mode Master Interface Timing Specifications,” on page 89 – TWH from ½TCK-3 to 0.4*TCK and max. 0.6*TCK. – TWL from ½TCK-3 to 0.4*TCK and max. 0.6*TCK. – Updated footnote a. Table 27: “QSPI MSPI Mode Master Interface Timing Specifications,” on page 90 – TWH from ½TCK-3 to 0.4*TCK and max. 0.6*TCK. – TWL from 1/0.6FCLK to 0.4*TCK and max. 0.6*TCK. – Updated footnote a. Table 29: “XTALP/XTALN Input Requirements,” on page 92 – Change VIN Min. from 500 to 800 mVpp diff . – Change "Internal 100Ω termination" to "External 100Ω termination required. Table 30: “LC_PLL0_REFCLK Input Requirements,” on page 93 – Remove Min/Max Intput Voltage VIL and VIH – Change VIN Min. from 500 to 700 mVpp diff Table 31: “EXT_QS2_CLKP/N Output Specifications,” on page 94 – Change VODIFF Min from 500 to 300 mVpp diff and Max from 2000 to 500 – Remove Min/Max Output Voltage VOL and VOH – Change EXT_QS2_CLK Rise/Fall time from 1.0 to 0.22 ns Max. – Change EXT_QS2_CLK jitter from 0.5 to 2 ps Max. – Remove Note: Internal 100Ω termination. – Measured with 50Ω termination as recommended in the Hardware Design Table 35: “AC-JTAG Transmit Setting (Driver Bias Current),” on page 98 - the Transmit Amplitude of the entire table. “Power Supply Current” on page 79 mVpp diff. Guide. • • Section 9: “Thermal Characteristics,” on page 99 Removed: • Hardware strapping pin description to enable Super Isolate Mode. • MII Interface Timing. Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 4 Broadcom Confidential
BCM53333 Data Sheet Revision History Revision 53333-DS03-R Date 07/03/13 Change Description Updated: • For power sequencing add requirement to power up the core VDDC at the same time or before GP-AVDDL SUPPLY. • Update Parallel LED Interface. • Table 1: “5615X_5333X_5334XCT SoC Port Configurations,” on page 14 - Remove DSCP • Table 2: “Switch Features,” on page 29 - Adjust table sizes. • Table 3: “Switch Internal Memory Table,” on page 35 - Remove DSCP • Table 15: “5615X_5333X_5334XCT Hardware Signals,” on page 83 - Add PU/PD 53333-DS02-R 04/05/13 53333-DS01-R 53333-DS00-R 12/21/12 09/26/12 • Section 7: “Pin List Description” - Add PU/PD Updated: • Update entire document. • • Updated entire document. Initial release “Pin List by Signal Name” on page 143 “AC Characteristics” on page 192 Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 5 Broadcom Confidential
BCM53333 Data Sheet Table of Contents Table of Contents About This Document ................................................................................................................................ 13 Purpose and Audience.......................................................................................................................... 13 Acronyms and Abbreviations................................................................................................................. 13 Document Conventions......................................................................................................................... 13 References............................................................................................................................................ 14 Technical Support ...................................................................................................................................... 14 Section 1: Introduction ..................................................................................................... 15 Overview...................................................................................................................................................... 15 Ethernet Switch Controller ........................................................................................................................ 16 ARM Cortex-A9 Processor......................................................................................................................... 17 Section 2: Common Interfaces......................................................................................... 18 System Reset.............................................................................................................................................. 18 Power Sequencing ..................................................................................................................................... 19 JTAG............................................................................................................................................................ 19 Section 3: Ethernet Switch Controller Features Description ........................................ 21 Architecture ................................................................................................................................................ 21 Feature Overview........................................................................................................................................ 22 Memory........................................................................................................................................................ 26 Address Management ................................................................................................................................ 26 Class of Service.......................................................................................................................................... 27 Strict Priority-Based Scheduling............................................................................................................ 27 Weighted Round Robin Scheduling ...................................................................................................... 27 Deficit Round Robin Scheduling............................................................................................................ 27 Backpressure Handling ............................................................................................................................. 28 Per Port Packet Rate (Storm) Control....................................................................................................... 28 Mirroring...................................................................................................................................................... 28 Spanning Tree Support.............................................................................................................................. 29 IEEE 802.1D Support.................................................................................................................................. 29 Port Filtering Mode A............................................................................................................................. 29 Port Filtering Mode B............................................................................................................................. 29 Port Filtering Mode C ............................................................................................................................ 30 IEEE 802.1Q Support.................................................................................................................................. 30 Link Aggregation........................................................................................................................................ 30 Double-Tagging .......................................................................................................................................... 30 Forwarding Control Block Mask ............................................................................................................... 31 ContentAware Processing......................................................................................................................... 31 Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 6 Broadcom Confidential
BCM53333 Data Sheet Table of Contents Ingress Filter Processor (IFP) ............................................................................................................... 31 Network Management Support.................................................................................................................. 32 Energy Efficient Ethernet........................................................................................................................... 32 Section 4: Ethernet Switch Controller System Interfaces ............................................. 33 Overview...................................................................................................................................................... 33 MII Management.......................................................................................................................................... 34 Broadcom Serial Interface (BSC).............................................................................................................. 35 LED Interfaces ............................................................................................................................................ 36 Serial LED Mode ................................................................................................................................... 36 PHY-Driven Parallel LED Mode ............................................................................................................ 36 Serial to Parallel LED Mode .................................................................................................................. 37 Section 5: Gigabit Ethernet Transceiver ......................................................................... 38 Copper Interface......................................................................................................................................... 38 Encoder................................................................................................................................................. 38 Decoder................................................................................................................................................. 38 Link Monitor........................................................................................................................................... 39 Digital Adaptive Equalizer ..................................................................................................................... 40 Echo Canceler....................................................................................................................................... 40 Crosstalk Canceler................................................................................................................................ 40 Analog-to-Digital Converter................................................................................................................... 40 Clock Recovery/Generator.................................................................................................................... 40 Baseline Wander Correction ................................................................................................................. 41 Multimode TX Digital-to-Analog Converter............................................................................................ 41 Stream Cipher ....................................................................................................................................... 41 Wire Map and Pair Skew Correction ..................................................................................................... 42 Automatic MDI Crossover ..................................................................................................................... 42 1000BASE-T Operation ................................................................................................................. 43 10/100BASE-TX Operation (Auto-Negotiation Enabled)................................................................ 43 10/100BASE-TX Operation (Forced Mode) ................................................................................... 43 Full-Duplex Mode .................................................................................................................................. 43 Master/Slave Configuration................................................................................................................... 44 Next Page Exchange............................................................................................................................. 44 Auto-Negotiation.................................................................................................................................... 44 Ethernet@Wirespeed............................................................................................................................ 45 Ethernet@Wirespeed Example...................................................................................................... 45 Enabling/Disabling Ethernet@Wirespeed...................................................................................... 45 Removing Ethernet@Wirespeed Downgrade ................................................................................ 46 Changing the Number of Failed Link Attempts .............................................................................. 46 Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 7 Broadcom Confidential
BCM53333 Data Sheet Table of Contents Monitoring Ethernet@Wirespeed................................................................................................... 46 Super Isolate Mode ............................................................................................................................... 47 Software Enable/Disable................................................................................................................ 47 Standby Power-Down Mode.................................................................................................................. 47 Auto Power-Down (APD) Mode............................................................................................................. 47 ADP Mode Enable (Auto-Negotiation Enabled) ............................................................................. 47 Sleep Cycle Settings...................................................................................................................... 48 Wake Cycle Settings...................................................................................................................... 48 Section 6: ARM Cortex-A9 Processor Subsystem Functional Description ................. 49 Cortex-A9 .................................................................................................................................................... 49 NOR Serial Flash Interface ........................................................................................................................ 49 MIIM/UART/GPIO Interfaces....................................................................................................................... 49 SPI interface................................................................................................................................................ 50 Section 7: Pin List Description......................................................................................... 52 Signal Name Descriptions ......................................................................................................................... 52 Pin List by Pin Name.................................................................................................................................. 62 Pin List by Signal Name............................................................................................................................. 67 Section 8: Electrical Specifications ................................................................................. 72 Absolute Maximum Ratings ...................................................................................................................... 72 DC Characteristics ..................................................................................................................................... 73 Operating Conditions............................................................................................................................. 73 Power-Up and Power-Down Specifications........................................................................................... 74 Power Supply Current ........................................................................................................................... 75 Standard 3.3V Signals........................................................................................................................... 76 BSC Signals .......................................................................................................................................... 77 MIIM (MDIO) Signals............................................................................................................................. 78 AC Characteristics ..................................................................................................................................... 79 AC Timing for Reset.............................................................................................................................. 79 BSC AC Characteristics ........................................................................................................................ 79 SPI AC Characteristics.......................................................................................................................... 80 MDIO AC Characteristics ...................................................................................................................... 83 JTAG AC Specifications........................................................................................................................ 84 QSPI Flash Interface Timing ................................................................................................................. 84 LED Controller Interface........................................................................................................................ 87 XTAL Clock Requirements.................................................................................................................... 88 LC_PLL0_REFCLK Clock Requirements.............................................................................................. 89 AC-JTAG............................................................................................................................................... 89 Broadcom® December 19, 2014 • 53333-DS06-R 16-Port GbE Unmanaged Switch with Copper PHYs Page 8 Broadcom Confidential
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