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一篇关于FPGA的外文翻译.doc
Building Programmable Automation Controllers with
Overview
Table of Contents
Introduction
NI RIO Hardware for PACs
Building PACs with LabVIEW and the LabVIEW FPGA Mo
FPGA Development Flow
Using NI SoftMotion to Create Custom Motion Contro
The NI SoftMotion Development Module for LabVIEW p
NI SoftMotion includes functions for trajectory ge
Applications
Conclusion
综述
目录
简介
为可编程自动化控制器的NI RIO 硬件
利用
FPGA开发流程
用NI SoftMotion控制器开发自定义运动控制器
应用
结论
Building Programmable Automation Controllers with LabVIEW
FPGA
Overview
Programmable Automation Controllers (PACs) are gaining acceptance within the
industrial control market as the ideal solution for applications that require highly integrated
analog and digital I/O, floating-point processing, and seamless connectivity to multiple
processing nodes. National Instruments offers a variety of PAC solutions powered by one
common software development environment, NI LabVIEW. With LabVIEW, you can build
custom I/O interfaces for industrial applications using add-on software, such as the NI
LabVIEW FPGA Module.
With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware,
National Instruments delivers an intuitive, accessible solution for incorporating the flexibility
and customizability of FPGA technology into industrial PAC systems. You can define the
logic embedded in FPGA chips across the family of RIO hardware targets without knowing
low-level hardware description languages (HDLs) or board-level hardware design details, as
well as quickly define hardware for ultrahigh-speed control, customized timing and
synchronization, low-level signal processing, and custom I/O with analog, digital, and
counters within a single device. You also can integrate your custom NI RIO hardware with
image acquisition and analysis, motion control, and industrial protocols, such as CAN and
RS232, to rapidly prototype and implement a complete PAC system.
Table of Contents
1.
2.
3.
4.
5.
6.
7.
Introduction
NI RIO Hardware for PACs
Building PACs with LabVIEW and the LabVIEW FPGA Module
FPGA Development Flow
Using NI SoftMotion to Create Custom Motion Controllers
Applications
Conclusion
Introduction
You can use graphical programming in LabVIEW and the LabVIEW FPGA Module to
configure the FPGA (field-programmable gate array) on NI RIO devices. RIO technology, the
merging of LabVIEW graphical programming with FPGAs on NI RIO hardware, provides a
flexible platform for creating sophisticated measurement and control systems that you could
previously create only with custom-designed hardware.
An FPGA is a chip that consists of many unconfigured logic gates. Unlike the fixed,
vendor-defined functionality of an ASIC (application-specific integrated circuit) chip, you can
configure and reconfigure the logic on FPGAs for your specific application. FPGAs are used
in applications where either the cost of developing and fabricating an ASIC is prohibitive, or
the hardware must be reconfigured after being placed into service. The flexible,
software-programmable architecture of FPGAs offer benefits such as high-performance
execution of custom algorithms, precise timing and synchronization, rapid decision making,
and simultaneous execution of parallel tasks. Today, FPGAs appear in such devices as
instruments, consumer electronics, automobiles, aircraft, copy machines, and
application-specific computer hardware. While FPGAs are often used in industrial control
products, FPGA functionality has not previously been made accessible to industrial control
engineers. Defining FPGAs has historically required expertise using HDL programming or
complex design tools used more by hardware design engineers than by control engineers.
With the LabVIEW FPGA Module and NI RIO hardware, you now can use LabVIEW, a
high-level graphical development environment designed specifically for measurement and
control applications, to create PACs that have the customization, flexibility, and
high-performance of FPGAs. Because the LabVIEW FPGA Module configures custom
circuitry in hardware, your system can process and generate synchronized analog and digital
signals rapidly and deterministically. Figure 1 illustrates many of the NI RIO devices that you
can configure using the LabVIEW FPGA Module.
Figure 1. LabVIEW FPGA VI Block Diagram and RIO Hardware Platforms
NI RIO Hardware for PACs
Historically, programming FPGAs has been limited to engineers who have in-depth
knowledge of VHDL or other low-level design tools, which require overcoming a very steep
learning curve. With the LabVIEW FPGA Module, NI has opened FPGA technology to a
broader set of engineers who can now define FPGA logic using LabVIEW graphical
development. Measurement and control engineers can focus primarily on their test and control
application, where their expertise lies, rather than the low-level semantics of transferring logic
into the cells of the chip. The LabVIEW FPGA Module model works because of the tight
integration between the LabVIEW FPGA Module and the commercial off-the-shelf (COTS)
hardware architecture of the FPGA and surrounding I/O components.
National Instruments PACs provide modular, off-the-shelf platforms for your industrial
control applications. With the implementation of RIO technology on PCI, PXI, and Compact
Vision System platforms and the introduction of RIO-based CompactRIO, engineers now
have the benefits of a COTS platform with the high-performance, flexibility, and
customization benefits of FPGAs at their disposal to build PACs. National Instruments PCI
and PXI R Series plug-in devices provide analog and digital data acquisition and control for
high-performance, user-configurable timing and synchronization, as well as onboard decision
making on a single device. Using these off-the-shelf devices, you can extend your NI PXI or
PCI industrial control system to include high-speed discrete and analog control, custom
sensor interfaces, and precise timing and control.
NI CompactRIO, a platform centered on RIO technology, provides a small, industrially
rugged, modular PAC platform that gives you high-performance I/O and unprecedented
flexibility in system timing. You can use NI CompactRIO to build an embedded system for
applications such as in-vehicle data acquisition, mobile NVH testing, and embedded machine
control systems. The rugged NI CompactRIO system is industrially rated and certified, and it
is designed for greater than 50 g of shock at a temperature range of -40 to 70 °C.
NI Compact Vision System is a rugged machine vision package that withstands the harsh
environments common in robotics, automated test, and industrial inspection systems. NI
CVS-145x devices offer unprecedented I/O capabilities and network connectivity for
distributed machine vision applications.NI CVS-145x systems use IEEE 1394 (FireWire)
technology, compatible with more than 40 cameras with a wide range of functionality,
performance, and price. NI CVS-1455 and NI CVS-1456 devices contain configurable
FPGAs so you can implement custom counters, timing, or motor control in your machine
vision application.
Building PACs with LabVIEW and the LabVIEW FPGA Module
With LabVIEW and the LabVIEW FPGA Module, you add significant flexibility and
customization to your industrial control hardware. Because many PACs are already
programmed using LabVIEW, programming FPGAs with LabVIEW is easy because it uses
the same LabVIEW development environment. When you target the FPGA on an NI RIO
device, LabVIEW displays only the functions that can be implemented in the FPGA, further
easing the use of LabVIEW to program FPGAs. The LabVIEW FPGA Module Functions
palette includes typical LabVIEW structures and functions, such as While Loops, For Loops,
Case Structures, and Sequence Structures as well as a dedicated set of LabVIEW
FPGA-specific functions for math, signal generation and analysis, linear and nonlinear control,
comparison logic, array and cluster manipulation, occurrences, analog and digital I/O, and
timing. You can use a combination of these functions to define logic and embed intelligence
onto your NI RIO device.
Figure 2 shows an FPGA application that implements a PID control algorithm on the NI
RIO hardware and a host application on a Windows machine or an RT target that
communicates with the NI RIO hardware. This application reads from analog input 0 (AI0),
performs the PID calculation, and outputs the resulting data on analog output 0 (AO0). While
the FPGA clock runs at 40 MHz the loop in this example runs much slower because each
component takes longer than one-clock cycle to execute. Analog control loops can run on an
FPGA at a rate of about 200 kHz. You can specify the clock rate at compile time. This
example shows only one PID loop; however, creating additional functionality on the NI RIO
device is merely a matter of adding another While Loop. Unlike traditional PC processors,
FPGAs are parallel processors. Adding additional loops to your application does not affect the
performance of your PID loop.
Figure 2. PID Control Using an Embedded LabVIEW FPGA VI with Corresponding LabVIEW Host
VI.
FPGA Development Flow
After you create the LabVIEW FPGA VI, you compile the code to run on the NI RIO
hardware. Depending on the complexity of your code and the specifications of your
development system, compile time for an FPGA VI can range from minutes to several hours.
To maximize development productivity, with the R Series RIO devices you can use a
bit-accurate emulation mode so you can verify the logic of your design before initiating the
compile process. When you target the FPGA Device Emulator, LabVIEW accesses I/O from
the device and executes the VI logic on the Windows development computer. In this mode,
you can use the same debugging tools available in LabVIEW for Windows, such as execution
highlighting, probes, and breakpoints.
Once the LabVIEW FPGA code is compiled, you create a LabVIEW host VI to integrate
your NI RIO hardware into the rest of your PAC system. Figure 3 illustrates the development
process for creating an FPGA application. The host VI uses controls and indicators on the
FPGA VI front panel to transfer data between the FPGA on the RIO device and the host
processing engine. These front panel objects are represented as data registers within the
FPGA. The host computer can be either a PC or PXI controller running Windows or a PC,
PXI controller, Compact Vision System, or CompactRIO controller running a real-time
operating system (RTOS). In the above example, we exchange the set point, PID gains, loop
rate, AI0, and AO0 data with the LabVIEW host VI.
Figure 3. LabVIEW FPGA Development Flow
The NI RIO device driver includes a set of functions to develop a communication
interface to the FPGA. The first step in building a host VI is to open a reference to the FPGA
VI and RIO device. The Open FPGA VI Reference function, as seen in Figure 2, also
downloads and runs the compiled FPGA code during execution. After opening the reference,
you read and write to the control and indicator registers on the FPGA using the Read/Write
Control function. Once you wire the FPGA reference into this function, you can simply select
which controls and indicators you want to read and write to. You can enclose the FPGA
Read/Write function within a While Loop to continuously read and write to the FPGA.
Finally, the last function within the LabVIEW host VI in Figure 2 is the Close FPGA VI
Reference function. The Close FPGA VI Reference function stops the FPGA VI and closes
the reference to the device. Now you can download other compiled FPGA VIs to the device to
change or modify its functionality.
The LabVIEW host VI can also be used to perform floating-point calculations, data
logging, networking, and any calculations that do not fit within the FPGA fabric. For added
determinism and reliability, you can run your host application on an RTOS with the
LabVIEW Real-Time Module. LabVIEW Real-Time systems provide deterministic
processing engines for functions performed synchronously or asynchronously to the FPGA.
For example, floating-point arithmetic, including FFTs, PID calculations, and custom control
algorithms, are often performed in the LabVIEW Real-Time environment. Relevant data can
be stored on a LabVIEW Real-Time system or transferred to a Windows host computer for
off-line analysis, data logging, or user interface displays. The architecture for this
configuration is shown in Figure 4. Each NI PAC platform that offers RIO hardware can run
LabVIEW Real-Time VIs.
Figure 4. Complete PAC Architecture Using LabVIEW FPGA, LabVIEW Real-Time and Host PC
Within each R Series and CompactRIO device, there is flash memory available to store a
compiled LabVIEW FPGA VI and run the application immediately upon power up of the
device. In this configuration, as long as the FPGA has power, it runs the FPGA VI, even if the
host computer crashes or is powered down. This is ideal for programming safety power down
and power up sequences when unexpected events occur.
Using NI SoftMotion to Create Custom Motion Controllers
The NI SoftMotion Development Module for LabVIEW provides VIs and functions to
help you build custom motion controllers as part of NI PAC hardware platforms that can
include NI RIO devices, DAQ devices, and Compact FieldPoint. NI SoftMotion provides all
of the functions that typically reside on a motion controller DSP. With it, you can handle path
planning, trajectory generation, and position and velocity loop control in the NI LabVIEW
environment and then deploy the code on LabVIEW Real-Time or LabVIEW FPGA-based
target hardware.
NI SoftMotion includes functions for trajectory generator and spline engine and
examples with complete source code for supervisory control, position, and velocity control
loop using the PID algorithm. Supervisory control and the trajectory generator run on a
LabVIEW Real-Time target and run at millisecond loop rates. The spline engine and the
control loop can run either on a LabVIEW Real-Time target at millisecond loop rates or on a
LabVIEW FPGA target at microsecond loop rates.
Applications
Because the LabVIEW FPGA Module can configure low-level hardware design of
FPGAs and use the FPGAs within in a modular system, it is ideal for industrial control
applications requiring custom hardware. These custom applications can include a custom mix
of analog, digital, and counter/timer I/O, analog control up to 125 kHz, digital control up to
20 MHz, and interfacing to custom digital protocols for the following:
In-vehicle data acquisition
Batch control
Discrete control
Motion control
Machine condition monitoring
Mobile/portable noise, vibration, and harshness (NVH) analysis
Rapid control prototyping (RCP)
Industrial control and acquisition
Distributed data acquisition and control
Conclusion
The LabVIEW FPGA Module brings the flexibility, performance, and customization of
FPGAs to PAC platforms. Using NI RIO devices and LabVIEW graphical programming, you
can build flexible and custom hardware using the COTS hardware often required in industrial
control applications. Because you are using LabVIEW, a programming language already used
in many industrial control applications, to define your NI RIO hardware, there is no need to
learn VHDL or other low-level hardware design tools to create custom hardware. Using the
LabVIEW FPGA Module and NI RIO hardware as part of your NI PAC adds significant
flexibility and functionality for applications requiring ultrahigh-speed control, interfaces to
custom digital protocols, or a custom I/O mix of analog, digital, and counters.
使用 LabVIEW FPGA（现场可编程门阵列）模块开发可编程自动化控
制器
综述
工业控制上的应用要求高度集成的模拟和数字输入输出、浮点运算和多重处理节点
的无缝连接。因为它对这些应用的理想解决方案，在工业控制市场上，可编程自动化控
制器（PAC）正逐渐被接受。通过一种普通的软件开发环境 NI LabVIEW，国家仪器公
司提供各种可编程自动化控制器的解决方案。有了 LabVIEW，你可以用像 NI LabVIEW
FPGA 模块一样的附加软件为工业应用开发自定义输入输出界面。
为将 FPGA 技术的灵活性和可定制性并入工业 PAC 系统，国家仪器公司利用
LabVIEW FPGA 模块和实时输入输出（RIO）硬件提供了一种直观、容易理解的解决方
法。无须了解低级的硬件描述语言（HDL）或广泛的硬件设计细节，你可以定义嵌入含
有 RIO 硬件对象家族的 FPGA 芯片里的逻辑，也可以快速地为超高速控制、定制的定时
和同步、低级的信号处理、用模拟或数字定制的输入输出、一个单独设备的计数器来定
义硬件。你也可以将得到的图像、分析、运动控制、比如 CAN 和 RS232 一样的工业协
议集成到你的定制 NI RIO（实时输入输出）硬件，这样就可以快速地事先并标准一个完
整的 PAC 系统。
目录
1. 简介
2. PAC（可编程自动化控制器）的 NI RIO（实时输入输出）硬件
3. 使用 LabVIEW 和 LabVIEW FPGA 模块开发 PAC（可编程自动化控制器）
4. FGPA 开发流程
5. 利用 NI SoftMotion 来开发自定义运动控制器
6. 应用
7. 结束
简介
你可以使用 LavVIEW 和 LavVIEW FPGA 模块的图形编程功能在 NI RIO 器件上配
置 FPGA（现场可编程门阵列）。将 LabVIEW 图形编程功能和 FPGA 融合在 NIRIO 硬
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