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AC6916D规格书V1.0.pdf

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AC6919A Datasheet AC6919A 芯片规格书 珠海市杰理科技股份有限公司 版本:V1.0 日期:2017.12.06 版权所有,未经许可,禁止外传
AC6919A Features AC6919A Datasheet High performance 32-bit RISC CPU RISC 32-bit CPU DC-160MHz operation Support DSP instructions 64Vectored interrupts 4 Levels interrupt priority Flexible I/O 3 GPIO pins All GPIO pins can be programmable as input or output individually All GPIO pins are internal pull-up/pull-down selectable individually CMOS/TTL level Schmitt triggered input External wake up/interrupt on all GPIOs Peripheral Feature One full speed USB 2.0 OTG controller Four multi-function 16-bit timers, support capture and PWM mode Three 16-bit PWM generator for motor driving One 16-bit active parallel port One full-duplex advanced UART One IIC interface supports host and device mode One Quadrate decoder Watchdog 1 Crystal Oscillator 16-bit Stereo DAC with headphone amplifier, SNR >= 92dB 1 channel MIC amplifier 3 channels 10-bit ADC 2 channels 4 levels Low Voltage Detector Power-on reset Embedded PMU support low power mode Build in Li battery charger Bluetooth Feature CMOS single-chip fully-integrated radio and baseband Compliant with Bluetooth V4.2+BR+EDR+BLE specification Bluetooth Piconet and Scatternet support Meet class2 and class3 transmitting power requirement Support GFSK and π/4 DQPSK all paket types Provides +2dbm transmitting power Support a2dp\avctp\avdtp\avrcp\hfp\spp\smp\att\gap\gatt\rfcomm\sdp\l2cap profile receiver with -89dBm sensitivity Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 1
AC6919A Datasheet Power Supply LDOIN is 4.5V to 5.5V VBAT is 2.2V to 5.5V VDDIO is 2.2V to 3.6V Packages SOP16 Temperature Operating temperature: -20℃ to +70℃ Storage temperature: -65℃ to +150℃ Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 2
一、引脚定义 1.1 引脚分配 AC6919A Datasheet 图 1-1 AC6919A_SOP16 引脚分配图 Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 3
1.2 引脚描述 AC6919A Datasheet 表 1-1 AC6919A_SOP16 引脚描述 PIN NO. Name I/O Type Drive (mA) Function Other Function 1 2 3 4 5 6 7 8 9 10 VDDIO VBAT LDOIN BTVDD RTCVDD PR2 BT_RF VSSIO BT_OSCI BT_OSCO P P P P P I/O P P I O / / / / / 16 / / / / 11 USBDM I/O 4 IO Power 3.3v LDO Power Charge Power 5v BT Power 1.3v RTC Power 3.3v RTCIO2 Ground OSC In OSC Out USB Negative Data USBDP I/O 4 USB Positive Data ADC13:ADC Input Channel 13; UART1RXD:Uart1 Data In(D); ISP_DI: SPI2DOB:SPI2 Data Out(B); IIC_SDA_A:IIC SDA(A); ADC11:ADC Input Channel 11; UART1TXD:Uart1 Data Out(D); ISP_CLK: SPI2CLKB:SPI2 Clock(B); IIC_SCL_A:IIC SCL(A); ADC10:ADC Input Channel 10; MIC: UART0RXB:Uart0 Data In(B); 12 13 14 15 16 PA0 DACR DACL DACVSS DACVDD I/O 24 GPIO O O P P / / / / DAC Right Channel DAC Left Channel Ground DAC Power Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 4
二、电气特性 2.1 PMU 电压、电流特性 表 2-1 符号 LDOIN VBAT V3.3 VDACVDD IL3.3 参数 Voltage Input Voltage Input Voltage output DAC Voltage Loading current 最小 典型 最大 单位 V 4.5 2.2 V V _ V _ _ mA 5.5 5.5 _ _ 150 5 3.7 3.3 3.1 _ AC6919A Datasheet 测试条件 _ LDO5V = 5V, 100mA loading LDO5V = 5V, 10mA loading LDO5V = 5V 2.2 IO 输入、输出高低逻辑特性 表 2-2 IO 输入特性 符号 参数 VIL VIH Low-Level Input Voltaget High-Level Input Voltage IO 输出特性 VOL VOH Low-Level Output Voltaget High-Level Output Voltaget 最小 -0.3 0.7* VDDIO _ 2.7 典型 最大 单位 测试条件 _ _ _ _ 0.3* VDDIO VDDIO+0.3 0.33 _ V V V V VDDIO = 3.3V VDDIO = 3.3V VDDIO = 3.3V VDDIO = 3.3V 2.3 IO 输出能力、上下拉电阻特性 表 2-3 Port 口 普通输出 强输出 上拉电阻 下拉电阻 备注 PR2 8mA 16mA 10K USBDM USBDP 4mA _ 1.5K 60K 15K 1、PR2 default pull up 2、USBDM & USBDP default pull down 3、内部上下拉阻抗因工艺波动差 异,可能存在±20%的偏差 Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 5
AC6919A Datasheet 表 2-4 典型 _ -78 95 -80 1 89 最大 20K _ _ _ _ 测试条件 1KHz/0dB 10Kohm loading With A-Weighted Filter 单位 Hz dB dB dB Vrms 1KHz/-60dB dB 10Kohm loading With A-Weighted Filter mW 32ohm loading 2.4 DAC 特性 参数 Frequency Response THD+N S/N Crosstalk Output Swing Dynamic Range 最小 20 _ _ _ DAC Output Power 11 2.5 ADC 特性 参数 Dynamic Range S/N THD+N Crosstalk 表 2-5 典型 最大 单位 85 90 -72 -80 _ _ _ dB dB dB dB 测试条件 1KHz/-60dB 10Kohm loading With A-Weighted Filter 1KHz/-60dB 10Kohm loading With A-Weighted Filter 最小 _ _ _ 2.6 BT 特性 表 2-6 参数 最小 典型 最大 Maximum Output Power RMS DEVM PEAK DEVM 99% DEVM EDR Relative Power BDR Sensitivity EDR Sensitivity _ _ _ _ _ _ _ 2 5.3 12 8 -1.4 -89 -89 _ _ _ _ _ _ _ 单位 dBm % % % dB dBm dBm 测试条件 _ Maximum output power BER=0.001 BER=0.0001 Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 6
三、封装 3.1 SOP16 AC6919A Datasheet 图 3-1 AC6919A_SOP16 封装图 Confidential The information contained herein is the exclusive property of JIELI and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of JIELI. 7
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