第1页 / 共108页
第2页 / 共108页
第3页 / 共108页
第4页 / 共108页
第5页 / 共108页
第6页 / 共108页
第7页 / 共108页
第8页 / 共108页
stm32f107vct6.pdf
1 Introduction
2 Description
2.1 Device overview
2.2 Full compatibility throughout the family
2.3 Overview
2.3.1 ARM Cortex-M3 core with embedded Flash and SRAM
2.3.2 Embedded Flash memory
2.3.3 CRC (cyclic redundancy check) calculation unit
2.3.4 Embedded SRAM
2.3.5 Nested vectored interrupt controller (NVIC)
2.3.6 External interrupt/event controller (EXTI)
2.3.7 Clocks and startup
2.3.8 Boot modes
2.3.9 Power supply schemes
2.3.10 Power supply supervisor
2.3.11 Voltage regulator
2.3.12 Low-power modes
2.3.13 DMA
2.3.14 RTC (real-time clock) and backup registers
2.3.15 Timers and watchdogs
2.3.16 I²C bus
2.3.17 Universal synchronous/asynchronous receiver transmitters (USARTs)
2.3.18 Serial peripheral interface (SPI)
2.3.19 Inter-integrated sound (I2S)
2.3.20 Ethernet MAC interface with dedicated DMA and IEEE 1588 support
2.3.21 Controller area network (CAN)
2.3.22 Universal serial bus on-the-go full-speed (USB OTG FS)
2.3.23 GPIOs (general-purpose inputs/outputs)
2.3.24 Remap capability
2.3.25 ADCs (analog-to-digital converters)
2.3.26 DAC (digital-to-analog converter)
2.3.27 Temperature sensor
2.3.28 Serial wire JTAG debug port (SWJ-DP)
2.3.29 Embedded Trace Macrocell™
3 Pinouts and pin description
4 Memory mapping
5 Electrical characteristics
5.1 Parameter conditions
5.1.1 Minimum and maximum values
5.1.2 Typical values
5.1.3 Typical curves
5.1.4 Loading capacitor
5.1.5 Pin input voltage
5.1.6 Power supply scheme
5.1.7 Current consumption measurement
5.2 Absolute maximum ratings
5.3 Operating conditions
5.3.1 General operating conditions
5.3.2 Operating conditions at power-up / power-down
5.3.3 Embedded reset and power control block characteristics
5.3.4 Embedded reference voltage
5.3.5 Supply current characteristics
5.3.6 External clock source characteristics
5.3.7 Internal clock source characteristics
5.3.8 PLL, PLL2 and PLL3 characteristics
5.3.9 Memory characteristics
5.3.10 EMC characteristics
5.3.11 Absolute maximum ratings (electrical sensitivity)
5.3.12 I/O current injection characteristics
5.3.13 I/O port characteristics
5.3.14 NRST pin characteristics
5.3.15 TIM timer characteristics
5.3.16 Communications interfaces
5.3.17 12-bit ADC characteristics
5.3.18 DAC electrical specifications
5.3.19 Temperature sensor characteristics
6 Package information
6.1 LFBGA100 package information
6.2 LQFP100 package information
6.3 LQFP64 package information
6.4 Thermal characteristics
6.4.1 Reference document
6.4.2 Selecting the product temperature range
7 Part numbering
Appendix A Application block diagrams
A.1 USB OTG FS interface solutions
A.2 Ethernet interface solutions
A.3 Complete audio player solutions
A.4 USB OTG FS interface + Ethernet/I2S interface solutions
8 Revision history
STM32F105xx
STM32F107xx
Connectivity line, ARM®-based 32-bit MCU with 64/256 KB Flash, USB
OTG, Ethernet, 10 timers, 2 CANs, 2 ADCs, 14 communication interfaces
Datasheet - production data
Features
• Core: ARM® 32-bit Cortex®-M3 CPU
– 72 MHz maximum frequency, 1.25
DMIPS/MHz (Dhrystone 2.1) performance
at 0 wait state memory access
– Single-cycle multiplication and hardware division
• Memories
– 64 to 256 Kbytes of Flash memory
– 64 Kbytes of general-purpose SRAM
• Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage
detector (PVD)
– 3-to-25 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC with calibration
– 32 kHz oscillator for RTC with calibration
• Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
• 2 × 12-bit, 1 µs A/D converters (16 channels)
– Conversion range: 0 to 3.6 V
– Sample and hold capability
– Temperature sensor
– up to 2 MSPS in interleaved mode
• 2 × 12-bit D/A converters
• DMA: 12-channel DMA controller
– Supported peripherals: timers, ADCs, DAC,
I2Ss, SPIs, I2Cs and USARTs
• Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex®-M3 Embedded Trace Macrocell™
• Up to 80 fast I/O ports
– 51/80 I/Os, all mappable on 16 external
interrupt vectors and almost all 5 V-tolerant
• CRC calculation unit, 96-bit unique ID
FBGA
LQFP100 14 × 14 mm
LQFP64 10 × 10 mm
LFBGA100 10 × 10 mm
• Up to 10 timers with pinout remap capability
– Up to four 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
– 1 × 16-bit motor control PWM timer with
dead-time generation and emergency stop
– 2 × watchdog timers (Independent and
Window)
– SysTick timer: a 24-bit downcounter
– 2 × 16-bit basic timers to drive the DAC
• Up to 14 communication interfaces with pinout
remap capability
– Up to 2 × I2C interfaces (SMBus/PMBus)
– Up to 5 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– Up to 3 SPIs (18 Mbit/s), 2 with a
multiplexed I2S interface that offers audio
class accuracy via advanced PLL schemes
– 2 × CAN interfaces (2.0B Active) with 512
bytes of dedicated SRAM
– USB 2.0 full-speed device/host/OTG controller
with on-chip PHY that supports HNP/SRP/ID
with 1.25 Kbytes of dedicated SRAM
– 10/100 Ethernet MAC with dedicated DMA
and SRAM (4 Kbytes): IEEE1588 hardware
support, MII/RMII available on all packages
Table 1. Device summary
Part number
Reference
STM32F105xx
STM32F107xx
STM32F105R8, STM32F105V8
STM32F105RB, STM32F105VB
STM32F105RC, STM32F105VC
STM32F107RB, STM32F107VB
STM32F107RC, STM32F107VC
March 2017
This is information on a product in full production.
DocID15274 Rev 10
1/108
www.st.com
Contents
Contents
STM32F105xx, STM32F107xx
1
2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1
Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2
2.3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ARM Cortex-M3 core with embedded Flash and SRAM . . . . . . . . . . . . 14
2.3.1
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.2
2.3.3
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 14
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3.4
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 14
2.3.5
2.3.6
External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 15
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.7
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.8
2.3.9
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.10
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.11
2.3.12
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.13
2.3.14
RTC (real-time clock) and backup registers . . . . . . . . . . . . . . . . . . . . . . 17
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.15
I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3.16
2.3.17
Universal synchronous/asynchronous receiver transmitters (USARTs) . 19
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.18
Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.3.19
2.3.20
Ethernet MAC interface with dedicated DMA and IEEE 1588 support . 20
Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2.3.21
2.3.22
Universal serial bus on-the-go full-speed (USB OTG FS) . . . . . . . . . . . 21
2.3.23 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 21
Remap capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.24
ADCs (analog-to-digital converters) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.3.25
2.3.26
DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2.3.27
2.3.28
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/108
DocID15274 Rev 10
STM32F105xx, STM32F107xx
Contents
3
4
5
2.3.29
Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.2
5.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1
5.1.1
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1.2
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1.3
5.1.4
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1.5
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.1.6
5.1.7
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.3.1
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 38
5.3.2
Embedded reset and power control block characteristics . . . . . . . . . . . 38
5.3.3
5.3.4
Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.3.5
5.3.6
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
5.3.7
PLL, PLL2 and PLL3 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
5.3.8
5.3.9
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
5.3.10
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 56
5.3.11
5.3.12
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
5.3.13
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
5.3.14
5.3.15
TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
5.3.16
12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
5.3.17
5.3.18
DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.3.19
DocID15274 Rev 10
3/108
4
Contents
STM32F105xx, STM32F107xx
6
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
LFBGA100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.1
6.2
LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
LQFP64 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
6.3
6.4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.4.1
6.4.2
Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . . 92
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Appendix A Application block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
USB OTG FS interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Ethernet interface solutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Complete audio player solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
USB OTG FS interface + Ethernet/I2S interface solutions . . . . . . . . . . . 100
A.1
A.2
A.3
A.4
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4/108
DocID15274 Rev 10
STM32F105xx, STM32F107xx
List of tables
List of tables
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1.
STM32F105xx and STM32F107xx features and peripheral counts . . . . . . . . . . . . . . . . . . 10
Table 2.
STM32F105xx and STM32F107xx family versus STM32F103xx family . . . . . . . . . . . . . . 12
Table 3.
Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4.
Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 5.
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 6.
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 7.
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 8.
Table 9.
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 10. Operating condition at power-up / power down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 11.
Table 12.
Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 13. Maximum current consumption in Run mode, code with data processing
running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 14. Maximum current consumption in Run mode, code with data processing
Table 18.
running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 41
Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 41
Table 16.
Typical current consumption in Run mode, code with data processing
Table 17.
running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical current consumption in Sleep mode, code running from Flash or
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 19.
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 20.
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 21.
HSE 3-25 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 22.
LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 23.
HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 24.
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 25.
Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 26.
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 27.
PLL2 and PLL3 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 28.
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 29.
Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 30.
EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 31.
EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 32.
ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 33.
Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 34.
I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 35.
Table 36.
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 37. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 38.
I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 39.
TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Table 40.
I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Table 41.
Table 42.
SCL frequency (fPCLK1= 36 MHz.,VDD = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Table 43.
I2S characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 44.
DocID15274 Rev 10
5/108
6
List of tables
STM32F105xx, STM32F107xx
Table 45.
Table 46.
Table 47.
Table 48.
Table 49.
Table 50.
Table 51.
Table 52.
Table 53.
Table 54.
Table 55.
Table 56.
Table 57.
Table 58.
Table 59.
USB OTG FS startup time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
USB OTG FS DC electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
USB OTG FS electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Ethernet DC electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Dynamic characteristics: Ethernet MAC signals for SMI. . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Dynamic characteristics: Ethernet MAC signals for RMII . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Dynamic characteristics: Ethernet MAC signals for MII . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
RAIN max for fADC = 14 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
ADC accuracy - limited test conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
LFBGA100 recommended PCB design rules (0.8 mm pitch BGA). . . . . . . . . . . . . . . . . . . 83
LQPF100 - 100-pin, 14 x 14 mm low-profile quad flat package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
LQFP64 – 10 x 10 mm 64 pin low-profile quad flat package mechanical data. . . . . . . . . . 88
Table 60.
Table 61.
Package thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 62. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
PLL configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 63.
Table 64.
Applicative current consumption in Run mode, code with data
processing running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Table 65.
6/108
DocID15274 Rev 10
STM32F105xx, STM32F107xx
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10. Typical current consumption on VBAT with RTC on vs. temperature at
STM32F105xx and STM32F107xx connectivity line block diagram . . . . . . . . . . . . . . . . . 13
STM32F105xx and STM32F107xx connectivity line BGA100 ballout top view . . . . . . . . . 24
STM32F105xx and STM32F107xx connectivity line LQFP100 pinout . . . . . . . . . . . . . . . . 25
STM32F105xx and STM32F107xx connectivity line LQFP64 pinout . . . . . . . . . . . . . . . . . 26
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
different VBAT values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 11. Typical current consumption in Stop mode with regulator in Run mode
versus temperature at different VDD values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 12. Typical current consumption in Stop mode with regulator in Low-power
mode versus temperature at different VDD values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 13. Typical current consumption in Standby mode versus temperature at
different VDD values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 14. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 15.
Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 16. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 17. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 18. Standard I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 19. Standard I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
5 V tolerant I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 20.
Figure 21.
5 V tolerant I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Figure 22.
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 23. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 24.
Figure 25. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 26. SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 27. SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 28.
I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 29.
Figure 30. USB OTG FS timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . 71
Figure 31. Ethernet SMI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 32. Ethernet RMII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 33. Ethernet MII timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 34. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 35. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Figure 36. Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 78
Figure 37. Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 78
Figure 38.
12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array package
Figure 39.
outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
LFBGA100 – 100-ball low profile fine pitch ball grid array, 10 x 10 mm,
0.8 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
LFBGA100 – 100-ball low profile fine pitch ball grid array, 10 x 10 mm,
0.8 mm pitch, package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 40.
Figure 41.
DocID15274 Rev 10
7/108
8
List of figures
STM32F105xx, STM32F107xx
Figure 42.
Figure 43.
Figure 44.
LFBGA100 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
LQFP100 – 14 x 14 mm 100 pin low-profile quad flat package outline . . . . . . . . . . . . . . . 85
LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat
recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
LQFP100 marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Figure 45.
LQFP64 – 10 x 10 mm 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 88
Figure 46.
LQFP64 - 64-pin, 10 x 10 mm low-profile quad flat recommended footprint . . . . . . . . . . . 89
Figure 47.
LQFP64 marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 48.
Figure 49.
LQFP100 PD max vs. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 50. USB OTG FS device mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Figure 51. Host connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Figure 52. OTG connection (any protocol). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 53. MII mode using a 25 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 54. RMII with a 50 MHz oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Figure 55. RMII with a 25 MHz crystal and PHY with PLL. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 56. RMII with a 25 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Figure 57. Complete audio player solution 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 58. Complete audio player solution 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 59. USB O44TG FS + Ethernet solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Figure 60. USB OTG FS + I2S (Audio) solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
8/108
DocID15274 Rev 10
相关推荐
2023年江西萍乡中考道德与法治真题及答案.doc
2012年重庆南川中考生物真题及答案.doc
2013年江西师范大学地理学综合及文艺理论基础考研真题.doc
2020年四川甘孜小升初语文真题及答案I卷.doc
2020年注册岩土工程师专业基础考试真题及答案.doc
2023-2024学年福建省厦门市九年级上学期数学月考试题及答案.doc
2021-2022学年辽宁省沈阳市大东区九年级上学期语文期末试题及答案.doc
2022-2023学年北京东城区初三第一学期物理期末试卷及答案.doc
2018上半年江西教师资格初中地理学科知识与教学能力真题及答案.doc
2012年河北国家公务员申论考试真题及答案-省级.doc
2020-2021学年江苏省扬州市江都区邵樊片九年级上学期数学第一次质量检测试题及答案.doc
2022下半年黑龙江教师资格证中学综合素质真题及答案.doc
