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ADC0832/ADC0834数据手册.pdf
ADC0831/ADC0832/ADC0834/ADC0838
General Description
Features
Key Specifications
Typical Application
Connection Diagrams
Ordering Information
Absolute Maximum Ratings
Operating Ratings (Notes 1, 2)
Converter and Multiplexer Electrical Characteristics
AC Characteristics
Typical Performance Characteristics
Leakage Current Test Circuit
TRI-STATE Test Circuits and Waveforms
Timing Diagrams
ADC0838 Functional Block Diagram
Functional Description
1.0 multiplexer Addressing
TABLE 1. Multiplexer/Package Options
TABLE 2. MUX Addressing: ADC0838
TABLE 3. MUX Addressing: ADC0838
TABLE 4. MUX Addressing: ADC0834
TABLE 5. MUX Addressing: ADC0834
TABLE 6. MUX Addressing: ADC0832
TABLE 7. MUX Addressing: ADC0832
2.0 THE DIGITAL INTERFACE
FIGURE 1. Analog Input Multiplexer Options for the ADC0838
3.0 Reference Considerations
FIGURE 2. Reference Examples
4.0 The Analog Inputs
5.0 Optional Adjustments
5.1 Zero Error
5.2 Full-Scale
5.3 Adjusting for an Arbitrary Analog Input Voltage Range
6.0 Power Supply
FIGURE 3. An On-Chip Shunt Regulator Diode
Applications
FIGURE 4. Operating with a Temperature Compensated Reference
FIGURE 5. Using the A/D as the System Supply Regulator
FIGURE 6. Generating VCC from the Converter Clock
FIGURE 7. Remote Sensing- Clock and Power on 1 Wire
Cop Coding Example
8048 CODING EXAMPLE
Physical Dimensions
July 2002
ADC0831/ADC0832/ADC0834/ADC0838
8-Bit Serial I/O A/D Converters with Multiplexer Options
General Description
The ADC0831 series are 8-bit successive approximation A/D
converters with a serial I/O and configurable input multiplex-
ers with up to 8 channels. The serial I/O is configured to
comply with the NSC MICROWIRE™ serial data exchange
standard for easy interface to the COPS™ family of proces-
sors, and can interface with standard shift registers or µPs.
The 2-, 4- or 8-channel multiplexers are software configured
for single-ended or differential
inputs as well as channel
assignment.
The differential analog voltage input allows increasing the
common-mode rejection and offsetting the analog zero input
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
n 0V to 5V input range with single 5V power supply
n Remote operation with serial digital data link
n TTL/MOS input/output compatible
n 0.3" standard width, 8-, 14- or 20-pin DIP package
n 20 Pin Molded Chip Carrier Package (ADC0838 only)
n Surface-Mount Package
n Operates ratiometrically or with 5 VDC voltage reference
n No zero or full-scale adjust required
n 2-, 4- or 8-channel multiplexer options with address logic
n Shunt regulator allows operation with high voltage
supplies
Key Specifications
n Resolution
n Total Unadjusted Error
n Single Supply
n Low Power
n Conversion Time
8 Bits
±1⁄2 LSB and ±1 LSB
5 VDC
15 mW
32 µs
Features
n NSC MICROWIRE compatible — direct interface to
COPS family processors
n Easy interface to all microprocessors, or operates
“stand-alone”
Typical Application
00558301
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
COPS™ and MICROWIRE™ are trademarks of National Semiconductor Corporation.
© 2002 National Semiconductor Corporation
DS005583
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Connection Diagrams
ADC0838 8-Channel Mux
Small Outline/Dual-In-Line Package (WM and N)
ADC0832 2-Channel MUX
Small Outline Package (WM)
Top View
00558341
ADC0831 Single
Differential Input
Dual-In-Line Package (N)
Top View
00558332
ADC0831 Single Differential Input
Small Outline Package (WM)
Top View
00558342
ADC0838 8-Channel MUX
Molded Chip Carrier (PCC) Package (V)
00558333
Top View
00558308
ADC0834 4-Channel MUX
Small Outline/Dual-In-Line Package (WM and N)
COM internally connected to A GND
Top View
Top View
00558330
ADC0832 2-Channel MUX
Dual-In-Line Package (N)
COM internally connected to GND.
VREF internally connected to VCC.
Top View
Top View
00558331
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Ordering Information
Part Number
Analog Input
Channels
Total
Unadjusted Error
1
2
4
8
ADC0831CCN
ADC0831CCWM
ADC0832CIWM
ADC0832CCN
ADC0832CCWM
ADC0834BCN
ADC0834CCN
ADC0834CCWM
ADC0838BCV
ADC0838CCV
ADC0838CCN
ADC0838CIWM
ADC0838CCWM
±1
±1
±1⁄2
±1
±1⁄2
±1
See NS Package Number M14B, M20B, N08E, N14A,
N20A or V20A
Package
Molded (N)
SO(M)
SO(M)
Molded (N)
SO(M)
Molded (N)
Molded (N)
SO(M)
PCC (V)
PCC (V)
Molded (N)
SO(M)
SO(M)
Temperature
Range
0˚C to +70˚C
0˚C to +70˚C
−40˚C to +85˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
0˚C to +70˚C
−40˚C to +85˚C
0˚C to +70˚C
3
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Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Dual-In-Line Package (Plastic)
Molded Chip Carrier Package
Vapor Phase (60 sec.)
Infrared (15 sec.)
ESD Susceptibility (Note 5)
260˚C
215˚C
220˚C
2000V
Current into V+ (Note 3)
Supply Voltage, VCC (Note 3)
Voltage
Logic Inputs
Analog Inputs
Input Current per Pin (Note 4)
Package
Storage Temperature
Package Dissipation
at TA=25˚C (Board Mount)
Lead Temperature (Soldering 10
sec.)
15 mA
6.5V
−0.3V to VCC +
0.3V
−0.3V to VCC +
0.3V
±5 mA
±20 mA
−65˚C to +150˚C
0.8W
Operating Ratings (Notes 1, 2)
Supply Voltage, VCC
Temperature Range
ADC0832/8CIWM
ADC0834BCN,
ADC0838BCV,
ADC0831/2/4/8CCN,
ADC0838CCV,
ADC0831/2/4/8CCWM
4.5 VDC to 6.3 VDC
TMIN≤TA≤TMAX
−40˚C to +85˚C
0˚C to +70˚C
Converter and Multiplexer Electrical Characteristics The following specifications apply for
VCC = V+ = VREF = 5V, VREF ≤ VCC +0.1V, TA = Tj = 25˚C, and fCLK = 250 kHz unless otherwise specified. Boldface limits
apply from TMIN to TMAX.
Parameter
Conditions
CIWM Devices
BCV, CCV, CCWM, BCN
and CCN Devices
Typ
(Note 12)
Tested
Limit
Design
Limit
Typ
(Note 12)
Tested
Limit
Design
Limit
Units
(Note 13)
(Note 14)
(Note 13)
(Note 14)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
Total Unadjusted Error
VREF=5.00 V
(Note 6)
ADC0838BCV
ADC0834BCN
ADC0838CCV
ADC0831/2/4/8CCN
ADC0831/2/4/8CCWM
ADC0832/8CIWM
Minimum Reference
Input Resistance (Note 7)
Maximum Reference
Input Resistance (Note 7)
Maximum Common-Mode
Input Range (Note 8)
Minimum Common-Mode
Input Range (Note 8)
DC Common-Mode Error
Change in zero
error from VCC=5V
to internal zener
operation (Note 3)
VZ, internal
diode breakdown
(at V+) (Note 3)
www.national.com
±1⁄2
±1⁄2
±1
±1
±1
1.3
5.4
±1⁄2
±1⁄2
±1
±1
±1
1.3
5.9
3.5
3.5
VCC +0.05 VCC+0.05
GND −0.05 GND−0.05
LSB
(Max)
kΩ
kΩ
V
V
±1
1.3
5.9
3.5
3.5
VCC +0.05
GND −0.05
±1/16
±1⁄4
±1/16
±1⁄4
±1⁄4
LSB
15 mA into V+
VCC=N.C.
VREF=5V
MIN 15 mA into V+
MAX
1
6.3
8.5
4
1
6.3
8.5
1
6.3
8.5
LSB
V
Converter and Multiplexer Electrical Characteristics The following specifications apply for
VCC = V+ = VREF = 5V, VREF ≤ VCC +0.1V, TA = Tj = 25˚C, and fCLK = 250 kHz unless otherwise specified. Boldface limits
apply from TMIN to TMAX. (Continued)
Parameter
Conditions
CIWM Devices
BCV, CCV, CCWM, BCN
and CCN Devices
Typ
(Note 12)
Tested
Limit
Design
Limit
Typ
(Note 12)
Tested
Limit
Design
Limit
Units
(Note 13)
(Note 14)
(Note 13)
(Note 14)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
Power Supply Sensitivity
IOFF, Off Channel Leakage
±1/16
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Current (Note 9)
ION, On Channel Leakage
Current (Note 9)
VCC=5V±5%
On
Channel=5V,
Off
Channel=0V
On
Channel=0V,
Off
Channel=5V
On
Channel=0V,
Off
Channel=5V
On
Channel=5V,
Off
Channel=0V
VCC=5.25V
VCC=4.75V
VCC=4.75V
IOUT=−360 µA
IOUT=−10 µA
VCC=4.75V
IOUT=1.6 mA
VOUT=0V
VOUT=5V
VOUT=0V
VOUT=VCC
Includes
Ladder
Current
DIGITAL AND DC CHARACTERISTICS
VIN(1), Logical “1” Input
Voltage (Min)
VIN(0), Logical “0” Input
Voltage (Max)
IIN(1), Logical “1” Input
Current (Max)
IIN(0), Logical “0” Input
Current (Max)
VOUT(1), Logical “1” Output
Voltage (Min)
VIN=5.0V
VIN=0V
VOUT(0), Logical “0” Output
Voltage (Max)
IOUT, TRI-STATE Output
Current (Max)
ISOURCE, Output Source
Current (Min)
ISINK, Output Sink Current (Min)
ICC, Supply Current (Max)
ADC0831, ADC0834,
ADC0838
ADC0832
0.005
−0.005
−0.1
0.1
−14
16
0.9
2.3
±1⁄4
−0.2
−1
+0.2
+1
−0.2
−1
+0.2
+1
2.0
0.8
1
−1
2.4
4.5
0.4
−3
3
−6.5
8.0
2.5
6.5
±1⁄4
±1/16
±1⁄4
−0.2
±1⁄4
−1
LSB
µA
+0.2
+1
µA
−0.2
−1
µA
+0.2
+1
µA
2.0
0.8
1
−1
2.4
4.5
0.4
−3
+3
−7.5
9.0
2.5
6.5
0.005
−0.005
−0.1
0.1
−14
16
0.9
2.3
2.0
0.8
1
−1
2.4
4.5
0.4
−3
+3
−6.5
8.0
2.5
6.5
V
V
µA
µA
V
V
V
µA
µA
mA
mA
mA
mA
5
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AC Characteristics
The following specifications apply for VCC = 5V, tr = tf = 20 ns and 25˚C unless otherwise specified.
Parameter
Conditions
Typ
(Note 12)
Tested
Limit
Design
Limit
(Note 13)
(Note 14)
fCLK, Clock Frequency
tC, Conversion Time
Clock Duty Cycle
(Note 10)
tSET-UP, CS Falling Edge or
Data Input Valid to CLK
Rising Edge
tHOLD, Data Input Valid
after CLK Rising Edge
tpd1, tpd0 — CLK Falling
Edge to Output Data Valid
(Note 11)
t1H, t0H, — Rising Edge of
CS to Data Output and
SARS Hi–Z
CIN, Capacitance of Logic
Input
COUT, Capacitance of Logic
Outputs
Min
Max
Min
Max
Not including MUX Addressing Time
CL=100 pF
Data MSB First
Data LSB First
CL=10 pF, RL=10k
(see TRI-STATE® Test Circuits)
CL=100 pf, RL=2k
650
250
125
5
5
10
8
500
400
40
60
250
90
1500
600
250
Limit
Units
kHz
kHz
1/fCLK
%
%
ns
ns
ns
ns
ns
ns
pF
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to the ground plugs.
Note 3: Internal zener diodes (6.3 to 8.5V) are connected from V+ to GND and VCC to GND. The zener at V+ can operate as a shunt regulator and is connected
to VCC via a conventional diode. Since the zener voltage equals the A/D’s breakdown voltage, the diode insures that VCC will be below breakdown when the device
is powered from V+. Functionality is therefore guaranteed for V+ operation even though the resultant voltage at VCC may exceed the specified Absolute Max of 6.5V.
It is recommended that a resistor be used to limit the max current into V+. (See Figure 3 in Functional Description Section 6.0)
Note 4: When the input voltage (VIN) at any pin exceeds the power supply rails (VIN < V− or VIN > V+) the absolute value of current at that pin should be limited
to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries with a 5 mA current limit to four.
Note 5: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 6: Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
Note 7: Cannot be tested for ADC0832.
Note 8: For VIN(−)≥VIN(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward conduct
for analog input voltages one diode drop below ground or one diode drop greater than the VCC supply. Be careful, during testing at low VCC levels (4.5V), as high
level analog inputs (5V) can cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec
allows 50 mV forward bias of either diode. This means that as long as the analog VIN or VREF does not exceed the supply voltage by more than 50 mV, the output
code will be correct. To achieve an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature
variations, initial tolerance and loading.
Note 9: Leakage current is measured with the clock not switching.
Note 10: A 40% to 60% clock duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these
limits, the minimum, time the clock is high or the minimum time the clock is low must be at least 1 µs. The maximum time the clock can be high is 60 µs. The clock
can be stopped when low so long as the analog input voltage remains stable.
Note 11: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow
for comparator response time.
Note 12: Typicals are at 25˚C and represent most likely parametric norm.
Note 13: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 14: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing quality levels.
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Typical Performance Characteristics
Unadjusted Offset Error vs. VREF Voltage
Linearity Error vs. VREF
Voltage
Linearity Error vs. Temperature
Linearity Error vs. fCLK
00558343
00558344
Power Supply Current vs. Temperature (ADC0838,
ADC0831, ADC0834)
Output Current vs. Temperature
00558345
00558346
Note: For ADC0832 add IREF.
00558347
00558348
7
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Typical Performance Characteristics (Continued)
Power Supply Current vs. fCLK
Leakage Current Test Circuit
TRI-STATE Test Circuits and
Waveforms
t1H
t0H
00558349
00558350
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00558329
00558303
t1H
t0H
00558351
00558352
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