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VME总线规范1997版.pdf
ANSI/VITA 1.1-1997
Approved as an American National Standard by
American National Standard
for VME64 Extensions
Secretariat
VMEbus International Trade Association
Approved October 7, 1998
American National Standards Institute, Inc.
VMEbus INTERNATIONAL TRADE ASSOCIATION
7825 E. Gelding Drive, Suite 104, Scottsdale, AZ 85260-3415
PH: 602-951-8866, FAX: 602-951-0720
E-mail: info@vita.com, URL: http://www.vita.com
ANSI/VITA 1.1-1997
American National Standard
for VME64 Extensions
Secretariat
VMEbus International Trade Association
Approved October 7, 1998
American National Standards Institute, Inc.
Abstract
This standard is an extension of the ANSI/VITA 1-1994, VME64 Standard. It defines a set of
features that can be added to VME and VME64 boards, backplanes and subracks. These
features include a 160 pin connector, a P0 connector, geographical addressing, voltages pins for
3.3V, a test and maintenance bus, and EMI, ESD, and front panel keying per IEEE 1101.10.
American
National
Standard
Approval of an American National Standard requires verification
by ANSI that the requirements for due process, consensus, and
other criteria for approval have been met by the standards
developer.
Consensus is established when, in the judgment of the ANSI
Board of Standards Review, substantial agreement has been
reached by directly and materially affected interests. Substantial
agreement means much more than a simple majority, but not
necessarily unanimity. Consensus requires that all views and
objections be considered, and that a concerted effort be made
toward their resolution.
The use of American National Standards
is completely
voluntary; their existence does not in any respect preclude
anyone, whether he has approved the standards or not, from
manufacturing, marketing, purchasing, or using products,
processes, or procedures not conforming to the standards.
The American National Standards Institute does not develop
standards and will in no circumstances give an interpretation of
any American National Standard. Moreover, no person shall
have the right or authority to issue an interpretation of an
American National Standard in the name of the American
National Standard Institute. Requests for interpretations should
be addressed to the secretariat or sponsor whose name appears
on the title page of this standard.
CAUTION NOTICE: This American National Standard may be
revised or withdrawn at any time. The procedures of the
American National Standards Institute require that action be
taken periodically to reaffirm, revise, or withdraw this standard.
Purchases of American National Standards may receive current
information on all standard by calling or writing the American
National Standards Institute.
Published by
VMEbus International Trade Association
7825 E. Gelding Dr., Suite 104, Scottsdale, AZ 85260
Copyright ' 1998 by VMEbus International Trade Association
All rights reserved.
No part of this publication may be reproduced in any form, in an electronic retrieval system
or otherwise, without prior written permission of the publisher.
NOTE: The users attention is called to the possibility that compliance with this standard may
require use of one or more inventions covered by patent rights.
By publication of this standard, no position is taken with respect to the validity of such claims
or of any patent rights in connection therewith. The patent holders have, however, filed a
statement of willingness to grant a license under these rights on reasonable and non-
discriminatory terms and conditions to applicants desiring to obtain such a license for use of
this standard. Details may be obtained from the publisher.
Printed in the United States of America - R1.0
ISBN 1-885731-12-4
TABLE OF CONTENTS
Table of Contents
Foreword ..................................................................................................................................v
Chapter 1 .................................................................................................................................1
Introduction to the VME64 Extensions standard ...................................................................1
1.1 VME64 Extensions Objectives ........................................................................................1
1.1.1 9U Boards, Backplanes and Subracks ..................................................................2
1.2 Terminology ....................................................................................................................2
1.3 References .......................................................................................................................2
1.3.1 Connector Notes ...................................................................................................2
1.4 Standard Terminology ....................................................................................................3
Chapter 2 ................................................................................................................................5
VME64x Compliance ................................................................................................................5
2.1 Introduction ....................................................................................................................5
2.2 Requirements ..................................................................................................................5
2.2.1 6U VME64x Board’s Minimum Features ...............................................................5
2.2.2 3U VME64x Board’s Minimum Features ................................................................5
2.2.3 6U VME64x Backplane’s Minimum Features .........................................................5
2.2.4 3U VME64x Backplane’s Minimum Features .......................................................6
Chapter 3 ................................................................................................................................7
P1/J1 & P2/J2 160 Pin Connectors ........................................................................................7
3.1 Introduction ....................................................................................................................7
3.2 Requirements ..................................................................................................................7
3.2.1 160 Pin Connector Placement ..............................................................................7
3.2.2 P1/J1 & P2/J2 Connectors, Rows z & d Pin Assignments ..................................7
3.2.3 Geographical Address Pin Assignments ...............................................................9
3.2.4 +3.3V Power ........................................................................................................10
3.2.5 V1/V2 Auxiliary Power .......................................................................................11
3.2.6 VPC Power and Additional +5V Power ................................................................11
3.2.7 Reset and ACFail .................................................................................................12
3.2.8 Board Power Dissipation ....................................................................................12
3.2.9 Backplane Termination Network using +3.3V Supply .......................................12
3.2.10 Monolithic Backplanes .....................................................................................13
3.2.11 Geographical Address Implementation .............................................................13
3.2.12 Connector Pin Tail Lengths ...............................................................................14
3.2.13 Labels on 96-pin Plug Connectors ....................................................................14
3.2.14 Backplane Connectors with Keying Devices .....................................................14
Chapter 4 ...............................................................................................................................17
P0/J0 Connector Area and VME64x Backplane Dimensions ................................................17
4.1 Introduction ..................................................................................................................17
4.2 Requirements ................................................................................................................17
4.2.1 Connector Selection ...........................................................................................17
4.2.2 Custom Connectors ............................................................................................18
4.2.3 P0/J0 Pin Definitions .........................................................................................18
4.2.4 P0/J0 Connector Mounting ...............................................................................19
4.2.5 Pin Current Ratings ............................................................................................19
4.2.6 Backplane P0/J0 Keying .....................................................................................20
4.2.7 VME64x Backplane End Dimensions ..................................................................21
Chapter 5 ................................................................................................................................23
EMC Front Panels and Subracks ...........................................................................................23
5.1 Introduction ..................................................................................................................23
5.2 Requirements ................................................................................................................23
5.2.1 EMC Front Panels and Subracks ........................................................................23
i
ANSI/VITA 1.1-1997
Table of Contents
5.2.2 Solder Side Covers ..............................................................................................23
5.2.3 Front Panel Label Areas ......................................................................................23
Chapter 6 ...............................................................................................................................25
Injector/Extractor Handles .....................................................................................................25
6.1 Introduction ..................................................................................................................25
6.2 Requirements ................................................................................................................25
6.2.1 Handles ...............................................................................................................25
6.2.2 Subracks .............................................................................................................25
Chapter 7 ...............................................................................................................................27
Keying and Alignment Pin .....................................................................................................27
7.1 Introduction ..................................................................................................................27
7.2 Requirements ................................................................................................................27
7.2.1 Subrack Keying ...................................................................................................27
7.2.2 Board Keying .......................................................................................................27
7.2.3 Keying Number Identification .............................................................................28
7.2.4 User Defined and User Installed ..........................................................................28
7.2.5 Multifunctional Alignment Pin ...........................................................................28
Chapter 8 ...............................................................................................................................31
ESD and Front Panel Safety Ground Protection ..................................................................31
8.1 Introduction ..................................................................................................................31
8.2 Requirements ................................................................................................................31
8.2.1 ESD Strips on VME64 Boards .............................................................................31
8.2.2 ESD Clips in Card Guides and Subracks ............................................................31
8.2.3 Solder Side Covers with ESD Protection ............................................................32
8.2.4 Front Panel Design for ESD Protection ..............................................................32
8.2.5 Front Panel Safety Ground Protection ...............................................................32
Chapter 9 ...............................................................................................................................33
Rear I/O Transition Boards ..................................................................................................33
9.1 Introduction ..................................................................................................................33
9.2 Requirements ................................................................................................................33
9.2.1 Mechanical Dimensions .....................................................................................33
9.2.2 Mechanical Components ....................................................................................33
9.2.3 Board Layout Orientation ..................................................................................34
9.2.4 Slot Keying Codes ...............................................................................................34
9.2.5 Connector Pin Labeling ......................................................................................34
9.2.6 Increase in Backplane Height ..............................................................................35
9.2.7 Power to Rear I/O Transition Board ..................................................................36
Chapter 10 .............................................................................................................................37
Additions to CR/CSR Definition ...........................................................................................37
10.1 Introduction ..................................................................................................................37
10.2 Requirements ................................................................................................................39
10.2.1 The Defined CR Area ..........................................................................................39
10.2.1.1 CR/CSR Space Specification ID ....................................................................39
10.2.1.2 Module Characteristics Parameters ...............................................................39
10.2.1.3 Interrupt Capabilities .....................................................................................40
10.2.1.4 Address Space Relocation ..............................................................................41
10.2.1.4.1 Data Access Width ParameteRs (DAWPR) Definition .................................41
10.2.1.4.2 AM Capabilities Parameters (AMCAPs) .......................................................42
10.2.1.4.3 XAM Capabilities Parameters (XAMCAPs).....................................................42
10.2.1.4.4 Address Decoder Masks (ADEMs) ................................................................43
10.2.1.5 Master Addressing Capabilities ......................................................................44
10.2.2 The Defined CSR Area .......................................................................................45
10.2.2.1 Additions to the Bit Set and Bit Clear Registers ............................................45
10.2.2.2 Address Decoder compaRe (ADER) Registers .................................................47
10.2.3 The User CR Area ..............................................................................................48
ANSI/VITA 1.1-1997
ii
Table of Contents
10.2.4 The Configuration RAM (CRAM) Area ..............................................................49
10.2.5 The User CSR Area ............................................................................................50
10.2.6 Board Serial Number ..........................................................................................51
Chapter 11 .............................................................................................................................57
2eVME Protocol ......................................................................................................................57
11.1 Introduction ..................................................................................................................57
11.1.1 2 Edge Handshakes ...........................................................................................57
11.1.2 Address Phases .................................................................................................57
11.1.3 Remapping the LWORD* Line ..........................................................................57
11.1.4 Extended AM Codes ..........................................................................................57
11.1.5 Address Modes ..................................................................................................58
11.1.6 Known Length 2eVME Transfers ......................................................................58
11.1.7 Slave Terminated 2eVME Transfers .................................................................58
11.1.8 Slave Suspended 2eVME Transfers ..................................................................59
11.1.9 Slave Error States .............................................................................................59
11.1.10 Master Terminated 2eVME Transfers .............................................................59
11.1.11 2eBTO Bus Time Out Timer ...........................................................................59
11.2 Requirements ................................................................................................................59
11.2.1 Transceivers and Connectors ...........................................................................59
11.2.2 Extended AM Codes ..........................................................................................60
11.2.3 Data Size ...........................................................................................................60
11.2.4 Protocols - General ...........................................................................................60
11.2.5 Address Phase Protocol and Timing .................................................................61
11.2.6 Data Phase Protocol and Timing ......................................................................62
11.2.7 2eBTO(x) Bus Time Out Timer ........................................................................62
Appendix A .............................................................................................................................77
Glossary of Additional VME64x Terms ..................................................................................77
Appendix B .............................................................................................................................81
Additional VME64x Signal/Pin Descriptions ........................................................................81
Appendix C .............................................................................................................................83
VME64 and VME64x Function Mnemonics ...........................................................................83
Appendix D ............................................................................................................................85
IEEE 1101.2-1992 Background ................................................................................................85
Appendix E .............................................................................................................................87
IEEE 1101.x Mechanical Feature References .........................................................................87
List of Figures
Figure 3-1
Figure 4-1
Figure 4-2
Figure 4-3
Figure 5-1
Figure 5-2
Figure 7-1
Figure 9-1
Figure 10-1
Figure 11-1
Figure 11-2
Figure 11-3
Figure 11-4
Figure 11-5
Backplane Termination Network using +3.3V Power ....................................15
P0 Connector Layout Position on VME64x Boards .......................................20
J0 Connector Layout Position on VME64x Backplanes ...............................21
VME64x Backplane Left and Right End Dimensions .....................................22
Front Panel Label Areas .................................................................................24
Injector/Extractor Handle Label Area ...........................................................24
Keying Hole Positions and Associated Keying Codes ....................................29
Front and Rear Board Orientation & Connector Pin Labeling .....................35
Structure of CR/CSR Space ..........................................................................38
2eVME Address Broadcast .............................................................................65
2eVME Address Broadcast - Slave Suspend Response .................................66
2eVME Address Broadcast - Slave Stop/Error Response ..............................67
2eVME Address Broadcast - Slave Suspend/Stop/Error Response ..............68
2eVME Read Data Transfers - Master Termination ......................................69
iii
ANSI/VITA 1.1-1997
Table of Contents
2eVME Read Data Transfers - Slave Suspend ..............................................70
Figure 11-6
2eVME Read Data Transfers - Slave Stop/Error on Odd Beat .....................71
Figure 11-7
2eVME Read Data Transfers - Slave Stop/Error on Even Beat ....................72
Figure 11-8
Figure 11-9
2eVME Write Data Transfers - Master Termination ......................................73
Figure 11-10 2eVME Write Data Transfers - Slave Suspend ..............................................74
Figure 11-11 2eVME Write Data Transfers - Slave Stop/Error on Odd Beat .....................75
Figure 11-12 2eVME Write Data Transfers - Slave Stop/Error on Even Beat ....................76
List of Tables
P1/J1 & P2/J2 Rows z & d Pin Assignments .....................................................8
Table 3-1
Geographical Address Pin Assignments ...........................................................10
Table 3-2
Table 4-1
P0/J0/RJ0/RP0 Connector Contact Labeling .................................................19
Table 10-1 Slave Characteristics Parameter ......................................................................40
Table 10-2 Master Characteristics Parameter .....................................................................40
Table 10-3 Data Access Width Parameter (DAWPR) Definitions ........................................42
Table 10-4 Address Decoder Mask (ADEM) Definitions ......................................................43
Table 10-5 Address Relocation CR Examples .....................................................................44
Table 10-6 Bit Set Register Assignment ..............................................................................45
Table 10-7 Bit Clear Register Assignment ...........................................................................46
Table 10-8 Address Decoder compaRe (ADER) Register Definition .....................................47
Table 10-9 Address Relocation CR/CSR Examples ............................................................48
Table 10-10 CRAM_ACCESS_WIDTH Definition ..................................................................49
Table 10-11 Serial Number Example .....................................................................................51
Table 10-12 Defined Configuration ROM Assignments .......................................................53
Table 10-13 Defined Control/Status Register (CSR) Assignments ......................................55
Table 11-1 Extended Address Modifier Line Definition ......................................................57
Table 11-2 6U 2eVME Extended Address Modifier Codes ....................................................58
Table 11-3 3U 2eVME Extended Address Modifier Codes ....................................................58
Table 11-4 6U VME64x Signal Field Definition ..................................................................63
Table 11-5 3U VME64x Signal Field Definition ..................................................................63
Table 11-6 2eVME Specific Timing Parameters ..................................................................63
Table 11-7 VME64 Timing Parameters ................................................................................64
ANSI/VITA 1.1-1997
iv
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