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FT-2000四核CPU硬件设计指导手册-V1.5.pdf

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    版权所有©天津飞腾信息技术有限公司2019此文档用于指导用户的相关应用和开发工作。天津飞腾信息技术有限公司对此文档内容拥有版权，并受法律保护FT-2000/4硬件设计指导手册（V1.5）2020年1月天津飞腾信息技术有限公司www.phytium.com.cn
    FT-2000/4硬件设计指导手册当前版本版本历史版本修订时间修订人修订章节修订内容V1.02019.7.29V1.12019.9.23V1.22019.12.66章节修正电源参数V1.32019.12.242章节4章节5章节1.修正表5-7中DQ阻抗要求2.补充PCIE要求2.更改LPC表述V1.42020-01-192章节3.1章节1.修改图2.12.添加I2C_1接口RTC连接要求V1.52020-01-203.1章节1.I2C_0调整为I2C_1文件标识P-U-2004-002当前版本1.5作者SDG完成日期2020.01.19
    FT-2000/4硬件设计指导手册I目录1概要.......................................................................................................................................................12平台框图...............................................................................................................................................13低速IO接口.........................................................................................................................................13.1I2C接口...........................................................................................................................13.2QSPI布线要求...............................................................................................................33.3LPC布线要求.................................................................................................................33.4SPI信号布线要求...........................................................................................................33.5RGMII布线要求.............................................................................................................44PCIE接口............................................................................................................................................44.1拆分方式..........................................................................................................................44.2PCIE连接配置................................................................................................................54.3AC电容、校准电阻要求...............................................................................................54.4布线要求..........................................................................................................................64.4.1阻抗要求..................................................................................................................64.4.2耦合电容摆放要求..................................................................................................64.4.3走线间距要求..........................................................................................................64.4.4走线等长要求..........................................................................................................74.4.5信号过孔要求..........................................................................................................74.4.6走线参考要求..........................................................................................................75DDR4内存接口...................................................................................................................................8
    FT-2000/4硬件设计指导手册II5.1特性..................................................................................................................................85.2PCB布局.........................................................................................................................85.3布线参考..........................................................................................................................95.4阻抗要求........................................................................................................................105.4.1单端微带线...........................................................................................................105.4.2差分微带线...........................................................................................................115.4.3单端带状线...........................................................................................................115.4.4差分带状线...........................................................................................................125.5交换准则........................................................................................................................125.6内存布线长度约束........................................................................................................146电源.....................................................................................................................................................156.1电源参数........................................................................................................................156.2设计要点........................................................................................................................167配置EEPROM..................................................................................................................................17
    FT-2000/4硬件设计指导手册III图目录图2-1FT-2000/4硬件平台框图.................................................................................1图3-1I2C_0连接设备.................................................................................................2图3-2I2C_1连接RTC..................................................................................................2图3-3LPC连接方式.....................................................................................................3图4-1外部校准电阻....................................................................................................5图4-2芯片扇出线示意图............................................................................................6图4-3耦合电容摆放示意图........................................................................................6图4-4耦合电容摆放参考............................................................................................6图4-5等长绕线参考....................................................................................................7图4-6等长绕线参考....................................................................................................7图4-7回流孔摆放参考................................................................................................7图4-8跨平面参考处理................................................................................................8图5-1DDRBALLMAPTOPVIEW..................................................................................9图5-2内存槽芯片两侧布局........................................................................................9图5-3内存槽芯片一侧布局........................................................................................9图5-4内存两侧布线示意图（内存两层布线）......................................................10图5-5内存一侧布线示意图（内存四层布线）......................................................10图5-6单端微带线......................................................................................................11图5-7差分微带线......................................................................................................11图5-8单端带状线......................................................................................................11图5-9差分带状线......................................................................................................12图5-10DDR校准电阻.................................................................................................14图6-1PCIE电源连接方法.........................................................................................16图6-2AVDDCLK电源放置的电容位置.......................................................................16图6-3VAA电源连接方法...........................................................................................16图6-4电容放置方式..................................................................................................17
    FT-2000/4硬件设计指导手册V表目录表3-1I2C地址分配.....................................................................................................2表3-2QSPI接口布线建议...........................................................................................3表3-3SPI接口布线建议.............................................................................................4表3-4RGMII布线要求.................................................................................................4表4-1PCIE拆分模式表...............................................................................................4表4-2PCIE链路AC耦合电容.....................................................................................5表5-1FT-2000/4主板配置.........................................................................................8表5-2单端微带线......................................................................................................11表5-3差分微带线......................................................................................................11表5-4单端带状线......................................................................................................11表5-5差分带状线......................................................................................................12表5-6SLICE分组表...................................................................................................13表5-7布线长度约束..................................................................................................14表6-1电源参数..........................................................................................................15表7-1EEPROM从设备地址要求.................................................................................17表7-2初始化EEPROM数据格式................................................................................17表7-3IO复用功能选择.............................................................................................18表7-4IO内部上下拉使能.........................................................................................18表7-5GPIO在EEPROM中数据映射关系...................................................................18表7-6PCIE拆分模式配置.........................................................................................22
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