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GL3510 Datasheet_102.pdf

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CHAPTER 1 GENERAL DESCRIPTION
CHAPTER 2 FEATURES
CHAPTER 3 PIN ASSIGNMENT
3.1 Pin-out Diagram
3.2 Pin Descriptions
CHAPTER 4 FUNCTION DESCRIPTION
4.1 Functional Block
4.2 General Description
4.2.1 USB 2.0 USPORT Transceiver
4.2.2 USB 3.1 Gen 1 USPORT Transceiver
4.2.3 PLL (Phase Lock Loop)
4.2.4 Regulator
4.2.5 RAM/ROM/CPU
4.2.6 UTMI (USB 2.0 Transceiver Microcell Interface)
4.2.7 SIE (Serial Interface Engine)
4.2.8 Control/Status Register
4.2.9 Power Management Engine
4.2.10 Router/Aggregator Engine
4.2.11 REPEATER
4.2.12 TT
4.2.12.1 Connected to 1.1 Host/Hub
4.2.12.2 Connected to USB 2.0 Host/Hub
4.2.13 CDP Control Logic
4.2.14 USB 3.1 Gen 1/USB 2.0 DSPORT Transceiver
4.3 Configuration and I/O Settings
4.3.1 RESET Setting
4.3.2 SELF/BUS Power Setting
4.3.3 LED Connections
4.3.4 Power Switch Enable Polarity
4.3.5 Port Configuration
4.3.6 Non-removable Port Setting
CHAPTER 5 FAST CHARGING SUPPORT
5.1 Introduction to Battery Charging Specification Rev.1.2
5.2 Standard Downstream Port (SDP)
5.3 Charging Downstream Port (CDP)
5.4 Dedicated Charging Port (DCP)
5.5 ACA-Dock
5.6 Apple and Samsung Devices
CHAPTER 6 ELECTRICAL CHARACTERISTICS
6.1 Maximum Ratings
6.2 Operating Ranges
6.3 DC Characteristics
6.3.1 DC Characteristics except USB Signals
6.3.2 USB 2.0 Interface DC Characteristics
6.3.3 USB 3.1 Gen 1 Interface DC Characteristics
6.4 Power Consumption
6.5 On-Chip Power Regulator
2.
3.
4.
5.
6.
6.1.
6.2.
6.3.
6.4.
6.5.
6.5.1 5V to 3.3V Regulator
6.5.2 5V to 1.2V Regulator
6.6 External Clock
CHAPTER 7 PACKAGE DIMENSION
CHAPTER 8 ORDERING INFORMATION
Genesys Logic, Inc. GL3510 USB 3.1 Gen 1 Hub Controller Datasheet Revision 1.02 Jul. 12, 2018
GL3510 Datasheet Copyright Copyright © 2018 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Ownership and Title Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein. Genesys Logic, Inc. reserves all rights, including, but not limited to, all patent rights, trademarks, copyrights and any other propriety rights. No license is granted hereunder. Disclaimer All Materials are provided “as is”. Genesys Logic, Inc. makes no warranties, express, implied or otherwise, regarding their accuracy, merchantability, fitness for any particular purpose, and non-infringement of intellectual property. In no event shall Genesys Logic, Inc. be liable for any damages, including, without limitation, any direct, indirect, consequential, or incidental damages. The materials may contain errors or omissions. Genesys Logic, Inc. may make changes to the materials or to the products described herein at anytime without notice. Genesys Logic, Inc. 12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist. 231, New Taipei City, Taiwan Tel : (886-2) 8913-1888 Fax : (886-2) 6629-6168 http://www.genesyslogic.com © 2018 Genesys Logic, Inc. - All rights reserved. Page 2 GLI Confidential
GL3510 Datasheet Revision History Revision Date Description 1.00 09/28/2017 Formal release 1.01 10/11/2017 Modify V5 pin description, p.12 1.02 07/12/2018 Correct pin description of PWRENJ, p.11 © 2018 Genesys Logic, Inc. - All rights reserved. Page 3 GLI Confidential
GL3510 Datasheet Table of Contents CHAPTER 1 GENERAL DESCRIPTION ......................................................................... 8 CHAPTER 2 FEATURES .................................................................................................... 9 CHAPTER 3 PIN ASSIGNMENT..................................................................................... 10 3.1 Pin-out Diagram .......................................................................................................... 10 3.2 Pin Descriptions ........................................................................................................... 11 CHAPTER 4 FUNCTION DESCRIPTION ..................................................................... 14 4.1 Functional Block .......................................................................................................... 14 4.2 General Description ..................................................................................................... 15 4.2.1 USB 2.0 USPORT Transceiver ........................................................................... 15 4.2.2 USB 3.1 Gen 1 USPORT Transceiver ................................................................ 15 4.2.3 PLL (Phase Lock Loop) ...................................................................................... 15 4.2.4 Regulator .............................................................................................................. 15 4.2.5 RAM/ROM/CPU.................................................................................................. 15 4.2.6 UTMI (USB 2.0 Transceiver Microcell Interface) ............................................ 15 4.2.7 SIE (Serial Interface Engine) .............................................................................. 15 4.2.8 Control/Status Register ....................................................................................... 15 4.2.9 Power Management Engine ................................................................................ 15 4.2.10 Router/Aggregator Engine ................................................................................ 16 4.2.11 REPEATER ....................................................................................................... 16 4.2.12 TT ........................................................................................................................ 16 4.2.13 CDP Control Logic ............................................................................................ 17 4.2.14 USB 3.1 Gen 1/USB 2.0 DSPORT Transceiver ............................................... 17 4.3 Configuration and I/O Settings .................................................................................. 18 4.3.1 RESET Setting ..................................................................................................... 18 4.3.2 SELF/BUS Power Setting ................................................................................... 19 4.3.3 LED Connections ................................................................................................. 19 4.3.4 Power Switch Enable Polarity ............................................................................ 19 4.3.5 Port Configuration .............................................................................................. 19 4.3.6 Non-removable Port Setting ............................................................................... 19 © 2018 Genesys Logic, Inc. - All rights reserved. Page 4 GLI Confidential
GL3510 Datasheet CHAPTER 5 FAST CHARGING SUPPORT .................................................................. 20 5.1 Introduction to Battery Charging Specification Rev.1.2 ......................................... 20 5.2 Standard Downstream Port (SDP) ............................................................................. 20 5.3 Charging Downstream Port (CDP) ............................................................................ 20 5.4 Dedicated Charging Port (DCP) ................................................................................ 21 5.5 ACA-Dock .................................................................................................................... 21 5.6 Apple and Samsung Devices ....................................................................................... 21 CHAPTER 6 ELECTRICAL CHARACTERISTICS ..................................................... 22 6.1 Maximum Ratings ....................................................................................................... 22 6.2 Operating Ranges ........................................................................................................ 22 6.3 DC Characteristics ...................................................................................................... 23 6.3.1 DC Characteristics except USB Signals ............................................................. 23 6.3.2 USB 2.0 Interface DC Characteristics ............................................................... 23 6.3.3 USB 3.1 Gen 1 Interface DC Characteristics .................................................... 23 6.4 Power Consumption .................................................................................................... 24 6.5 On-Chip Power Regulator .......................................................................................... 25 6.5.1 5V to 3.3V Regulator ........................................................................................... 25 6.5.2 5V to 1.2V Regulator ........................................................................................... 26 6.6 External Clock ............................................................................................................. 26 CHAPTER 7 PACKAGE DIMENSION ........................................................................... 27 CHAPTER 8 ORDERING INFORMATION................................................................... 28 © 2018 Genesys Logic, Inc. - All rights reserved. Page 5 GLI Confidential
GL3510 Datasheet List of Figures Figure 3.1 - QFN 64 Pin-out Diagram .................................................................................. 10 Figure 4.1 – Architecture Diagram ....................................................................................... 14 Figure 4.2 - Operating in USB 1.1 Schemes ......................................................................... 16 Figure 4.3 - Operating in USB 2.0 Schemes ......................................................................... 17 Figure 4.4 - Power on Reset Diagram ................................................................................... 18 Figure 4.5 - Power on Sequence of GL3510 ......................................................................... 18 Figure 4.6 - SELF/BUS Power Setting ................................................................................. 19 Figure 6.1 - Vin(V5) vs Vout(V33)* ...................................................................................... 25 Figure 6.2 - Vin (V5) vs. Vout (V1.2) .................................................................................... 26 Figure 7.1 - QFN64 Package .................................................................................................. 27 © 2018 Genesys Logic, Inc. - All rights reserved. Page 6 GLI Confidential
GL3510 Datasheet List of Tables Table 4.1 - Configuration by Power Switch Type ............................................................... 19 Table 6.1 - Maximum Ratings ............................................................................................... 22 Table 6.2 - Operating Ranges ................................................................................................ 22 Table 6.3 - DC Characteristics except USB Signals ............................................................ 23 Table 8.1 - Ordering Information ......................................................................................... 28 © 2018 Genesys Logic, Inc. - All rights reserved. Page 7 GLI Confidential
GL3510 Datasheet CHAPTER 1 GENERAL DESCRIPTION Genesys GL3510 is a 4-port, low-power, and configurable hub controller. It is compliant with the USB 3.1 specification. GL3510 integrates Genesys Logic self-developed USB 3.1 Gen 1 Super Speed transmitter/receiver physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3510 has built-in 5V to 3.3V and 5V to 1.2V regulators, which saves customers’ BOM cost, and eases for PCB design. GL3510 features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows portable devices to draw up to 1.5A from GL3510 charging downstream ports (CDP1) or dedicated charging port (DCP2). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes. All available packages for GL3510 are listed as the following tables. Product Series Package Type Number of DFPs Power Mgmt. LED Support GL3510 QFN 64 4 Gang Mode PGANG LED *Note: TT (transaction translator) implements the control logic defined in Section 11.14 ~ 11.22 of USB specification revision 2.0. TT basically handles the unbalanced traffic speed between the USPORT (operating in HS) and DSPORTS (operating in FS/LS) of hub. 1 CDP, charging downstream port, the Battery Charging Rev.1.2-compliant USB port that does data communication and charges device up to 1.5A. 2 DCP, dedicated charging port, the Battery Charging Rev.1.2-compliant USB port that only charges devices up to 1.5A, similar to wall chargers. © 2018 Genesys Logic, Inc. - All rights reserved. Page 8 GLI Confidential
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