AVR100: Accessing the EEPROM
Features
• Random Read/Write
Sequential Read/Write
Runable Test/Example Program
Introduction
This application note contains routines for access of the EEPROM memory in the AVR
Microcontroller. Two types of Read/Write access has been implemented:
Random Read/Write: The user must set up both data and address before calling
the Read or Write routine.
Sequential Read/Write: The user needs only to set up the data to be
Read/Written. The current EEPROM address is automatically incremented prior to
access. The address has to be set prior to writing the first byte in a sequense.
The application note contains four routines which are described in detail in the follow-
ing sections. This application note contains routines for accessing the EEPROM in all
AVR devices.
Note: In the latest devices the EEWE bit in EECR is called EEPE, and the EEMWE is
called EEMPE. Also in the latest devices the EECR consist of two extra bits to set the
Programming Mode, EEPM0 and EEPM1. These two bits needs to be initialized
before EEPE is set.
EEdwr – Data to be written
EEawr – Address low byte to write
EEawrh – Address high byte to write
Random Write – Subroutine “EEWrite”
Three register variables must be set up prior to calling this routine:
The subroutine waits until the EEPROM is ready to be programmed by polling the
EEPROM Write Enable – EEWE bit in the EEPROM Control Register – EECR. When
EEWE is zero, the contents of EEdwr is transferred to the EEPROM Data Register –
EEDR, and the contents of EEawrh:EEawr is transferred to the EEPROM Address
Register – EEARH:EEARL. First the EEPROM Master Write Enable – EEMWE is set,
followed by the EEPROM write strobe EEWE in EECR. See Figure 1.
8-bit
Microcontroller
Application
Note
Rev. 0932C–AVR–09/05
1
Figure 1. “EEWrite” Flow Chart
EEWrite
EEWE = 0?
N
Y
EEARH:EEARL ! EEawh:EEawr
EEDR ! EEdwr
Global Interrupt
Disable
Set EEMWE
Set EEWE
Global Interrupt
Enable
RETURN
Random Read –
Subroutine “EERead”
Prior to calling this routine, two register variables must be set up:
EEard – Address of low byte to read from
EEardh – Address of high byte to read from
The subroutine waits until the EEPROM is ready to be accessed by polling the EEWE bit
in the EEPROM Control Register – EECR. When EEWE is zero, the subroutine and
transfers the contents of EEardh:EEard to the EEPROM Address Register –
EEARH:EEARL.
It then sets the EEPROM Read Strobe – EERE.
In the next instruction the content of the EEDR Register is tranferred to the register vari-
able EEdrd. See Figure 2.
2
AVR100
0932C–AVR–09/05
Figure 2. “EERead” Flow Chart
AVR100
EERead
EEWE = 0?
N
Y
EEARH:EEARL ! EEardh:EEard
SET EERE
EEdrd ! EEDR
RETURN
Sequential Write –
Subroutine
“EEWrite_seq”
Prior to calling this routine, one register variable must be set up:
EEdwr_s – Data to write
The subroutine waits until the EEPROM is ready to be programmed by polling the
EEWE bit in the EEPROM Control Register – EECR. When EEWE is zero and the con-
tents of the EEPROM Address Register – EEARH:EEARL are read into the register
variable EEWTMPH:EEWTMP. EEwtmp is incremented and written back to
EEARH:EEARL. This increments the current EEPROM address by one. The contents of
EEdwr is then transferred to the EEPROM Data Register – EEDR, before EEWE in
EECR is set, and then EEMWE is set. See Figure 3.
0932C–AVR–09/05
3
Figure 3. “EEWrite_seq” Flow Chart
EEWrite_seq
EEWE = 0?
N
Y
EEARH:EEARL ! EE ARH:EEARL +1
EEDR ! EEdwr
Disable Global
Interrupt
SET EEMWE
SET EEWE
Enable Global
Interrupt
RETURN
Sequential Read –
Subroutine
“EERead_seq”
The subroutine waits until the EEPROM is ready to be accessed by polling the EEWE bit
in the EEPROM Control Register – EECR. The subroutine then increments the current
EEPROM address by performing the following operation: Transfer EEAR to the register
variable EERTMPH:EERTMP, increments this register and writes the new address back
to EEARH:EEARL. The routine then sets the EEPROM Read Strobe – EERE twice.
Finally, the EEPROM data is transferred from EEDR to the register variable EEdrd_s.
See Figure 4.
4
AVR100
0932C–AVR–09/05
Figure 4. “EERead_seq” Flow Chart for 8515
AVR100
EERead_seq
EEWE = 0?
N
Y
EEARH:EEARL ! EEARH:EEARL +1
SET EERE
EEdrd ! EEDR
RETURN
Optimization for
different devices
Test Program
Not all the instructions are necessary for all devices. If the device has an EEPROM of
256 bytes or less, the high address of the EEPROM Address Register doesn’t need to
be changed. On the AT90S1200, the EEMWE bit in the EEGR doesn’t have to be set.
See the section EEPROM Read/Write in the datasheet for further information.
The application note assembly file contains a complete program which calls the four
subroutines as a test of operation, and also as an example of usage. The test program
is suitable for running in AVR Studio®.
The test programs contains comments on how to port the code to work on any AVR-
part.
Note:
If the code initiates a write to EEPROM shortly after Reset, keep in mind the following: If
EEPROM contents are programmed during the manufacturing process, the MCU might
change the code shortly after programming. When the programmer then verifies the
EEPROM contents, this might fail because the EEPROM contents have already been
modified by the MCU. Also notice that some In-System Programmers will allow the MCU
to execute a short time between each step in the programming and verification process.
Table 1. CPU and Memory Usage
Function
Code Size Cycles
Example
Register
Usage
Description
EEWrite
EERead
10 words
7 words
EEWrite_seq
13 words
EERead_seq
10 words
15
11
19
17
R16, R17, R18
EEPROM Random Location Write
R0, R17, R18
EEPROM Random Location Read
R24, R25, R18
R0, R24, R25
EEPROM Sequential Location
Write
EEPROM Sequential Location
Read
0932C–AVR–09/05
5
Table 1. CPU and Memory Usage (Continued)
Function
Code Size Cycles
Reset
Main
TOTAL
8 words
39 words
87 words
8
–
–
Example
Register
Usage
R16
Description
Example Initialisation
R16, R19, R20
Example Program
R0, R16, R17,
R18, R19, R20,
R24, R25
–
Table 2. Peripheral Usage
Peripheral
8 I/O Pins
1 I/O Pin
Description
LEDs (example only)
Button (example only)
10 bytes EEPROM
Target EEPROM Locations (example only)
Interrupts Enabled
–
–
–
6
AVR100
0932C–AVR–09/05
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