SD卡协议最新版（3.01）.pdf

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SD Specifications Part 1 Physical Layer Simplified Specification Version 3.01 May 18, 2010 SD Group Panasonic Corporation SanDisk Corporation Toshiba Corporation Technical Committee SD Card Association

©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Physical Layer Simplified Specification Version 3.01 Revision History Date April 3, 2006 Version 1.10 September 25, 2006 May 18, 2010 2.00 3.01 Changes compared to previous issue Physical Layer Simplified Specification Version 1.10 initial release. (Supplementary Notes Ver1.00 is applied.) Physical Layer Simplified Specification Version 2.00 Physical Layer Simplified Specification Version 3.01 To the extent this proposed specification, which is being submitted for review under the IP Policy, implements, incorporates by reference or refers to any portion of versions 1.0 or 1.01 of the SD Specifications (including Parts 1 through 4), adoption of the proposed specification shall require Members utilizing the adopted specification to obtain the appropriate licenses from the SD-3C, LLC, as required for the utilization of those portion(s) of versions 1.0 or 1.01 of the SD Specifications. For example, implementation of the SD Specifications in a host device under versions 1.0 or 1.01 and under the adopted specification requires the execution of a SD Host Ancillary License Agreement with the SD-3C, LLC; and implementation of the SD Specifications under versions 1.0 or 1.01 and under the proposed specification in a SD Card containing any memory storage capability (other than for storage of executable code for a controller or microprocessor within the SD Card) requires the execution of a SD Memory Card License Agreement with the SD-3C, LLC. i

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Conditions for publication Publisher: SD Card Association 2400 Camino Ramon, Suite 375 San Ramon, CA 94583 USA Telephone: +1 (925) 275-6615, Fax: +1 (925) 886-4870 E-mail: office@sdcard.org The SD Group Copyright Holders: Panasonic Corporation SanDisk Corporation Toshiba Corporation The SD Card Association Notes: The copyright of the previous versions (Version 1.00 and 1.01) and all corrections or non-material changes thereto are owned by SD Group. The copyright of material changes to the previous versions (Version 1.01) are owned by SD Card Association. Disclaimers: The information contained herein is presented only as a standard specification for SD Card and SD Host/Ancillary products. No responsibility is assumed by SD Card Association for any damages, any infringements of patents or other right of the third parties, which may result from its use. No license is granted by implication or otherwise under any patent or rights of SD Group and SD Card Association or others. ii

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Conventions Used in This Document Naming Conventions • Some terms are capitalized to distinguish their definition from their common English meaning. Words not capitalized have their common English meaning. Numbers and Number Bases • Hexadecimal numbers are written with a lower case "h" suffix, e.g., FFFFh and 80h. • Binary numbers are written with a lower case "b" suffix (e.g., 10b). • Binary numbers larger than four digits are written with a space dividing each group of four digits, as in 1000 0101 0010b. • All other numbers are decimal. Key Words • May: • Shall: Indicates flexibility of choice with no implied recommendation or requirement. Indicates a mandatory requirements to ensure interchangeability and to claim conformance with the specification. requirement. Designers shall implement such mandatory • Should: Indicates a strong recommendation but not a mandatory requirement. Designers should give strong consideration to such recommendations, but there is still a choice in implementation. Application Notes Some sections of this document provide guidance to the host implementers as follows: Application Note: This is an example of an application note. iii

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association Table of Contents 1. General Description............................................................................................................1 2. System Features .................................................................................................................3 3. SD Memory Card System Concept....................................................................................5 3.1 Read-Write Property......................................................................................................................5 3.2 Supply Voltage...............................................................................................................................5 3.3 Card Capacity................................................................................................................................5 3.3.1 User Area and Protected Area ................................................................................................5 3.3.2 Card Capacity Classification ...................................................................................................5 3.4 Speed Class ..................................................................................................................................6 3.5 Bus Topology .................................................................................................................................6 3.6 Bus Protocol ..................................................................................................................................7 3.6.1 SD Bus....................................................................................................................................7 3.6.2 SPI Bus .................................................................................................................................10 3.7 SD Memory Card–Pins and Registers......................................................................................... 11 3.8 ROM Card ................................................................................................................................... 11 3.8.1 Register Setting Requirements ............................................................................................. 11 3.8.2 Unsupported Commands ...................................................................................................... 11 3.8.3 Optional Commands ............................................................................................................. 11 3.8.4 WP Switch.............................................................................................................................12 3.9 Ultra High Speed Phase I (UHS-I) Card ......................................................................................13 3.9.1 UHS-I Operation Modes........................................................................................................13 3.9.2 UHS-I Card Types .................................................................................................................13 3.9.3 Host and Card Combination..................................................................................................14 3.9.4 Bus Speed Modes Selection Sequence................................................................................15 3.9.5 UHS System Block Diagram .................................................................................................16 3.9.6 Summary of Bus Speed Mode ..............................................................................................17 4. SD Memory Card Functional Description .......................................................................18 4.1 General........................................................................................................................................18 4.2 Card Identification Mode..............................................................................................................19 4.2.1 Card Reset............................................................................................................................19 4.2.2 Operating Condition Validation..............................................................................................19 4.2.3 Card Initialization and Identification Process ........................................................................21 4.2.3.1 Initialization Command (ACMD41)........................................................................................ 23 4.2.4 Bus Signal Voltage Switch Sequence ...................................................................................24 4.2.4.1 Initialization Sequence for UHS-I .......................................................................................... 24 4.2.4.2 Timing to Switch Signal Voltage............................................................................................ 25 4.2.4.3 Timing of Voltage Switch Error Detection.............................................................................. 25 4.2.4.4 Voltage Switch Command..................................................................................................... 25 4.2.4.5 Tuning Command ................................................................................................................. 25 4.2.4.6 An Example of UHS-I System Block Diagram....................................................................... 26 4.3 Data Transfer Mode.....................................................................................................................27 4.3.1 Wide Bus Selection/Deselection ...........................................................................................29 4.3.2 2 GByte Card ........................................................................................................................29 iv

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association 4.3.3 Data Read .............................................................................................................................29 4.3.4 Data Write .............................................................................................................................30 4.3.5 Erase.....................................................................................................................................32 4.3.6 Write Protect Management ...................................................................................................32 4.3.7 Card Lock/Unlock Operation.................................................................................................33 4.3.7.1 General................................................................................................................................. 33 4.3.7.2 Parameter and the Result of CMD42.................................................................................... 35 4.3.7.3 Forcing Erase ....................................................................................................................... 37 4.3.7.3.1 Force Erase Function to the Locked Card...................................................................... 37 4.3.7.4 Relation Between ACMD6 and Lock/Unlock State................................................................ 38 4.3.7.5 Commands Accepted for Locked Card ................................................................................. 38 4.3.7.6 Two Types of Lock/Unlock Card............................................................................................ 39 4.3.8 Content Protection ................................................................................................................39 4.3.9 Application-Specific Commands............................................................................................40 4.3.9.1 Application-Specific Command – APP_CMD (CMD55)......................................................... 40 4.3.9.2 General Command - GEN_CMD (CMD56)........................................................................... 40 4.3.10 Switch Function Command .................................................................................................41 4.3.10.1 General............................................................................................................................... 41 4.3.10.2 Mode 0 Operation - Check Function ................................................................................... 43 4.3.10.3 Mode 1 Operation - Set Function........................................................................................ 43 4.3.10.4 Switch Function Status........................................................................................................ 46 4.3.10.4.1 Busy Status Indication for Functions ............................................................................ 47 4.3.10.4.2 Data Structure Version ................................................................................................. 48 4.3.10.4.3 Function Table of Switch Command............................................................................. 48 4.3.10.5 Relationship between CMD6 data & other commands ....................................................... 49 4.3.10.6 Switch Function Flow Example ........................................................................................... 49 4.3.10.7 Example of Checking.......................................................................................................... 49 4.3.11 High-Speed Mode (25 MB/sec interface speed)..................................................................50 4.3.12 Command System...............................................................................................................50 4.3.13 Send Interface Condition Command (CMD8) .....................................................................51 4.3.14 Command Functional Difference in Card Capacity Types...................................................52 4.4 Clock Control...............................................................................................................................53 4.5 Cyclic Redundancy Code (CRC) .................................................................................................54 4.6 Error Conditions...........................................................................................................................56 4.6.1 CRC and Illegal Command ...................................................................................................56 4.6.2 Read, Write and Erase Timeout Conditions ..........................................................................56 4.6.2.1 Read ..................................................................................................................................... 56 4.6.2.2 Write ..................................................................................................................................... 56 4.6.2.3 Erase .................................................................................................................................... 57 4.7 Commands ..................................................................................................................................58 4.7.1 Command Types ...................................................................................................................58 4.7.2 Command Format .................................................................................................................58 4.7.3 Command Classes................................................................................................................58 4.7.4 Detailed Command Description ............................................................................................61 4.8 Card State Transition Table .........................................................................................................69 4.9 Responses...................................................................................................................................71 4.9.1 R1 (normal response command):..........................................................................................71 4.9.2 R1b........................................................................................................................................71 4.9.3 R2 (CID, CSD register) .........................................................................................................71 4.9.4 R3 (OCR register) .................................................................................................................72 4.9.5 R6 (Published RCA response) ..............................................................................................72 4.9.6 R7 (Card interface condition) ................................................................................................73 v

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association 4.10 Two Status Information of SD Memory Card .............................................................................74 4.10.1 Card Status .........................................................................................................................74 4.10.2 SD Status ............................................................................................................................78 4.11 Memory Array Partitioning .........................................................................................................82 4.12 Timings ......................................................................................................................................82 4.13 Speed Class Specification .........................................................................................................83 4.13.1 Speed Class Specification for SDSC and SDHC ................................................................83 4.13.1.1 Allocation Unit (AU)............................................................................................................. 83 4.13.1.2 Recording Unit (RU) ........................................................................................................... 83 4.13.1.3 Write Performance.............................................................................................................. 84 4.13.1.4 Read Performance.............................................................................................................. 84 4.13.1.5 Performance Curve Definition............................................................................................. 84 4.13.1.6 Speed Class Definition........................................................................................................ 84 4.13.1.7 Consideration for Inserting FAT Update during Recording.................................................. 85 4.13.1.8 Measurement Conditions and Requirements of the Speed Class....................................... 85 4.13.2 Speed Class Specification for SDXC...................................................................................86 4.13.2.1 Speed Class Parameters .................................................................................................... 86 4.13.2.1.1 AU ................................................................................................................................ 86 4.13.2.1.2 RU................................................................................................................................ 86 4.13.2.2 Write Performance.............................................................................................................. 86 4.13.2.3 Read Performance.............................................................................................................. 86 4.13.2.4 FAT Update......................................................................................................................... 86 4.13.2.5 CI (Continuous Information) Update ................................................................................... 86 4.13.2.6 Distinction of Data Type ...................................................................................................... 86 4.13.2.7 Measurement Conditions and Requirements of the Speed Class for SDXC....................... 86 4.13.2.8 Speed Class Control Command (CMD20) .......................................................................... 87 4.13.3 Speed Grade Specification for UHS-I..................................................................................87 4.13.4 Notes for Preparation Time of UHS-I Card..........................................................................87 4.14 Erase Timeout Calculation.........................................................................................................88 4.14.1 Erase Unit ...........................................................................................................................88 4.14.2 Case Analysis of Erase Time Characteristics......................................................................88 4.14.3 Method for Erase Large Areas ............................................................................................89 4.14.4 Calculation of Erase Timeout Value Using the Parameter Registers ..................................89 4.14.5 Set Block Count Command.................................................................................................90 5. Card Registers ..................................................................................................................91 5.1 OCR register................................................................................................................................92 5.2 CID register .................................................................................................................................93 5.3 CSD Register...............................................................................................................................95 5.3.1 CSD_STRUCTURE ..............................................................................................................95 5.3.2 CSD Register (CSD Version 1.0) ..........................................................................................96 5.3.3 CSD Register (CSD Version 2.0) ........................................................................................103 5.4 RCA register ..............................................................................................................................106 5.5 DSR register (Optional) .............................................................................................................106 5.6 SCR register..............................................................................................................................106 6. SD Memory Card Hardware Interface............................................................................110 6.1 Hot Insertion and Removal ........................................................................................................ 110 6.2 Card Detection (Insertion/Removal) .......................................................................................... 110 6.3 Power Protection (Insertion/Removal)....................................................................................... 110 6.4 Power Scheme .......................................................................................................................... 110 6.4.1 Power Up ............................................................................................................................ 110 vi

Physical Layer Simplified Specification Version 3.01 ©Copyright 2001-2010 SD Group (Panasonic, SanDisk, Toshiba) and SD Card Association 6.4.1.1 Power Up Time ....................................................................................................................111 6.4.1.2 Power On or Power Cycle....................................................................................................111 6.4.1.3 Power Supply Ramp Up.......................................................................................................111 6.4.2 Power Down and Power Cycle............................................................................................ 112 6.5 Programmable Card Output Driver (Optional) ........................................................................... 112 6.6 Bus Operating Conditions for 3.3V Signaling ............................................................................ 112 6.7 Driver Strength and Bus Timing for 1.8V Signaling ................................................................... 112 6.8 Electrical Static Discharge (ESD) Requirement......................................................................... 112 7. SPI Mode..........................................................................................................................113 7.1 Introduction................................................................................................................................ 113 7.2 SPI Bus Protocol ....................................................................................................................... 113 7.2.1 Mode Selection and Initialization......................................................................................... 114 7.2.2 Bus Transfer Protection....................................................................................................... 116 7.2.3 Data Read ........................................................................................................................... 116 7.2.4 Data Write ........................................................................................................................... 117 7.2.5 Erase & Write Protect Management.................................................................................... 118 7.2.6 Read CID/CSD Registers.................................................................................................... 119 7.2.7 Reset Sequence.................................................................................................................. 119 7.2.8 Error Conditions .................................................................................................................. 119 7.2.9 Memory Array Partitioning................................................................................................... 119 7.2.10 Card Lock/Unlock.............................................................................................................. 119 7.2.11 Application Specific Commands ........................................................................................ 119 7.2.12 Content Protection Command...........................................................................................120 7.2.13 Switch Function Command ...............................................................................................120 7.2.14 High Speed Mode..............................................................................................................120 7.2.15 Speed Class Specification.................................................................................................120 7.3 SPI Mode Transaction Packets .................................................................................................121 7.3.1 Command Tokens ...............................................................................................................121 7.3.1.1 Command Format............................................................................................................... 121 7.3.1.2 Command Classes ............................................................................................................. 121 7.3.1.3 Detailed Command Description .......................................................................................... 123 7.3.1.4 Card Operation for CMD8 in SPI mode .............................................................................. 128 7.3.2 Responses ..........................................................................................................................129 7.3.2.1 Format R1........................................................................................................................... 129 7.3.2.2 Format R1b......................................................................................................................... 129 7.3.2.3 Format R2........................................................................................................................... 130 7.3.2.4 Format R3........................................................................................................................... 131 7.3.2.5 Formats R4 & R5 ................................................................................................................ 131 7.3.2.6 Format R7........................................................................................................................... 131 7.3.3 Control Tokens ....................................................................................................................132 7.3.3.1 Data Response Token......................................................................................................... 132 7.3.3.2 Start Block Tokens and Stop Tran Token............................................................................. 132 7.3.3.3 Data Error Token................................................................................................................. 133 7.3.4 Clearing Status Bits.............................................................................................................133 7.4 Card Registers...........................................................................................................................134 7.5 SPI Bus Timing Diagrams..........................................................................................................134 7.6 SPI Electrical Interface ..............................................................................................................135 7.7 SPI Bus Operating Conditions...................................................................................................135 7.8 Bus Timing.................................................................................................................................135 Appendix A (Normative) : Reference.................................................................................136 vii

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