Lecture Notes in Electrical Engineering 558
Mauro Santos
Jorge Guilherme
Nuno Horta
Logarithmic
Voltage-to-Time
Converter for
Analog-to-Digital
Signal Conversion
Lecture Notes in Electrical Engineering
Volume 558
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Mauro Santos Jorge Guilherme Nuno Horta
Logarithmic
Voltage-to-Time Converter
for Analog-to-Digital Signal
Conversion
123
Mauro Santos
Synopsys Portugal Lda
Porto Salvo, Portugal
Nuno Horta
Instituto de Telecomunicações,
Instituto Superior Técnico
Lisbon, Portugal
Jorge Guilherme
Instituto de Telecomunicações,
Instituto Politecnico Tomar
Lisbon, Portugal
ISSN 1876-1100
Lecture Notes in Electrical Engineering
ISBN 978-3-030-15977-1
https://doi.org/10.1007/978-3-030-15978-8
ISBN 978-3-030-15978-8
(eBook)
ISSN 1876-1119
(electronic)
Library of Congress Control Number: 2019935487
© Springer Nature Switzerland AG 2019
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To my parents, Leonel and Ana,
and my wife Yu
To Paula, Inês and Patricia
To Carla, João and Tiago
Preface
Data converters are a fundamental building block for many systems and are used for
functions such as digitizing voice, image and wireless telecommunication signals
among others. This is due to the enormous potential of digital signal processing
nowadays, and without data converters, it would not be possible to have devices
such as digital audio and video broadcast, digital cameras and mobile phones.
Usually, the converters employed in those applications have a linear scale, and for
most applications that is the proper choice, however, for some applications, a
nonlinear conversion scale may be more appropriate.
The work presented in this book belongs to the scientific area of analog-to-digital
signal conversion and presents a novel logarithmic conversion architecture based on
cross-coupled inverter. An overview of the current state of the art of logarithmic
converters is given where most conventional logarithmic analog-to-digital converter
architectures are derived or adapted from linear analog-to-digital converter archi-
tectures; this implies the use of analog building blocks such as amplifiers. The use of
such blocks requires additional circuit area and increases the total power con-
sumption. It is also increasingly more difficult to implement these required analog
blocks in more advanced technologies due to the decrease of supply voltages, as
there is less voltage headroom, in short doing the required analog signal processing
in the voltage domain is becoming increasingly difficult. The conversion architecture
proposed in this dissertation differs from the conventional logarithmic architectures.
There is no requirement to use analog blocks such as amplifiers, and part of the
signal processing is done in the time domain. This part of the signal processing is not
affected by the reduction in supply voltages and benefits from the advances in
integrated circuit manufacturing technologies. The signal conversion from the
analog to the time domain is performed by a latched comparator or cross-coupled
inverters. While these circuits are usually seen as digital parts, where only obtaining
a decision within the allocation time matters, here the time required to reach a
decision is the important feature. The study of this voltage-to-time conversion ele-
ment
the required blocks to perform the
analog-to-digital conversion are almost digital blocks, and their speed and precision
should benefit from the advances of integrated circuit manufacturing technologies.
is presented in this document. All
vii
viii
Preface
A demonstrator prototype has been designed, simulated, integrated and tested.
To test the demonstrator prototype, a fully custom test platform comprising custom
test software and printed circuit boards has been developed. The demonstrator
prototype achieves a sampling rate of 81.5 MSPS with the full conversion archi-
tecture having an estimated figure of merit of 0.0426 pJ/conversion. The direction of
future research is also identified and includes work such as integration of calibration
in the voltage-to-time conversion element and work on an improved conversion
architecture derived from the architecture proposed in this book.
This work is organized into seven chapters. Chapter 1 presents a brief intro-
duction with the motivation and context to develop and propose new data converter
topology. Chapter 2 discusses the background and the state of the art of nonlinear
A/D converters. Chapter 3 presents and discusses the proposed logarithmic
analog-to-digital converter. Chapter 4 describes the design of the voltage-to-time
converter. In Chap. 5, the circuit designed and the layout are both validated.
Chapter 6 presents and discusses experimental results achieved from an imple-
mented prototype. Finally, in Chap. 7, the conclusions are drawn and possible
future research lines are outlined.
Porto Salvo, Portugal
Lisbon, Portugal
Lisbon, Portugal
Mauro Santos
Nuno Horta
Jorge Guilherme