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Effective Functional Verification.pdf

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    EFFECTIVE FUNCTIONAL VERIFICATION
    Effective Functional Verification Principles and Processes by SRIVATSA VASUDEVAN
    A C.I.P. Catalogue record for this book is available from the Library of Congress. ISBN-10 0-387-28601-2 (HB) ISBN-13 978-0-387-28601-3 (HB) ISBN-10 0-387-32620-0 ( e-book) ISBN-13 978-0-387-32620-7 (e-book) Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springer.com Printed on acid-free paper All Rights Reserved © 2006 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed in the Netherlands.
    This book is dedicated to: The Almighty, who gave me a variety of experiences and the inspiration to write this work. My family for putting up with me as I wrote this book. My colleagues who taught me what they knew and worked with me. My managers and mentors who encouraged me on this incredible journey.
    Contents Dedication List of Figures Foreword Preface Acknowledgments v xiii xvii xix xxiii Part I Starting the Verification Journey 1. An Introduction to IC Verification 3 . . . . . . . . . . . . . . . . . . . . . . . Importance of Verification 3 Overview of a Typical ASIC Design Process . . . . . . . . . . . . . . 6 Factors in Successful Verification . . . . . . . . . . . . . . . . . . . . 11 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2. Approaches to Verification 13 What is Functional Verification all About? . . . . . . . . . . . . . . . 14 Stimulating the design - A choice of approaches . . . . . . . . . . . . 16 Black Box Approach . . . . . . . . . . . . . . . . . . . . . . . . 16 White Box Approach . . . . . . . . . . . . . . . . . . . . . . . . 18 . . . . . . . . . . . . . . . . . . . . . . . . 18 Gray Box Approach . . . . . . . . . . . . . 19 Block Level Verification . . . . . . . . . . . . . . . . . . . . . . 20 Sub System Verification . . . . . . . . . . . . . . . . . . . . . . 23 Full Chip Verification . . . . . . . . . . . . . . . . . . . . . . . . 25 . . . . . . . . . . . . . . . . . . . . . 26 System Level Verification Instruction Driven Verification . . . . . . . . . . . . . . . . . . . . . 26 Random Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Verification Approaches Based on Integration vii
    viii Contents Pre-Post Processing Approach Assertion Based Verification Advantages of a Golden Model Disadvantages of using a Golden Model Coverage Driven Verification . . . . . . . . . . . . . . . . . . . . . . 30 Transaction Based Verification . . . . . . . . . . . . . . . . . . . . . 33 . . . . . . . . . . . . . . . . . . . . . . . . 37 Golden Model Approach . . . . . . . . . . . . . . . . . . 37 . . . . . . . . . . . . . . 38 . . . . . . . . . . . . . . . . . . . . . 39 . . . . . . . . . . . . . . . . . . . . . . 42 . . . . . . . . . . . . . 44 Assertions - Who writes them and when? Types of Assertions . . . . . . . . . . . . . . . . . . . . . . . . . 45 . . . . . . . . . 45 Advantages of an Assertion Based Methodology Challenges with an Assertion Based Methodology . . . . . . . . 48 . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 . . . . . . . . . . . . . . . . . . . . . . . . . . 51 . . . . . . . 52 Emulation and Acceleration . . . . . . . . . . . . . . . . . . . . . . . 54 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Model Checking A Comparison of Simulation and Formal approaches Formal Verification 3. Various Workflows Practiced in Verification An Overview of the Entire Verification Process The Planning Process 59 . . . . . . . . . . . . 59 . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Some Other Aspects of Verification Planning . . . . . . . . . . . 63 Verification Resource Planning . . . . . . . . . . . . . . . . . . . 64 The Regression Process . . . . . . . . . . . . . . . . . . . . . . . . . 65 Block Regressions . . . . . . . . . . . . . . . . . . . . . . . . . 67 Chip Level Regressions . . . . . . . . . . . . . . . . . . . . . . . 68 . . . . . . . . . . . . . . . . . . . . . 68 Coverage in Regressions. Maturing of the Design . . . . . . . . . . . . . . . . . . . . . . . . . 69 The Periodic Review Process . . . . . . . . . . . . . . . . . . . . . . 70 Regression Result Reviews . . . . . . . . . . . . . . . . . . . . . 71 . . . . . . . . . . . . . . . . . . . . 72 The Verification Signoff Process Part II Ingredients of Successful Verification 4. People make all the Difference Team Dynamics and Team Habits for Success 77 . . . . . . . . . . . . . 78 . . . . . . . . . . . 78 Habit 1: Begin With the Big Picture in Mind . . . . . . . . . . . . . . . . 80 Habit 2: Do it Right the First Time Habit 3: Be Object Oriented in your Approach . . . . . . . . . . 82 Habit 4: Reduce, Reuse and Recycle . . . . . . . . . . . . . . . . 82 Habit 5: Innovate . . . . . . . . . . . . . . . . . . . . . . . . . . 83 . . . . . . . . . . . . . . . . . . . . 84 Habit 6: Communicate . . . . . . . . . . . 86 Quality 1: The Ability to see the Full Picture . . . . . . . . . . . 87 Quality 2: Assumes Nothing . . . . . . . . . . . . . . . . . . . . 88 . . . . . . . . . . . . . . . . . . . . . . . . 88 Quality 3: Consistent The Six Qualities of Successful Verification Engineers
    Contents ix Quality 4: Organized . . . . . . . . . . . . . . . . . . . . . . . . 89 . . . . . . . . . . . . . . . . . . . . . . 89 Quality 5: Multi-skilled Quality 6: Empower Others . . . . . . . . . . . . . . . . . . . . 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 References 5. Case Studies from the Real World 93 . . . . . . 94 Block and System Level Tests use Unrelated Environments . . . . . . . . . 94 Not Implementing Monitors and Assertions Early on . . . . . . . . . . . . . . . . . . 95 Review Processes Not Done Timely Pure Random Testing Without Directed Tests . . . . . . . . . . . . . 96 Not Running a Smoke Test Before a Regression . . . . . . . . . . . . 97 Lint Policies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 Effective Use of a Source Control Strategy . . . . . . . . . . . . . . . 98 6. Tracking Results That Matter 101 Why Do We Ever Need any Verification Metrics? . . . . . . . . . . . 101 Metrics in a Regression . . . . . . . . . . . . . . . . . . . . . . . . . 102 . . . . . . . . . . . . . . . . . . . . . . . . 105 Commonly used Metrics . . . . . . . . . . . . . . . . . . . . . . 109 Functional Coverage Metrics Structural Coverage Metrics . . . . . . . . . . . . . . . . . . . . . . 110 Some Caveats on Structural Coverage . . . . . . . . . . . . . . . 111 . . . . . . . . . . . . . . . . . . . . . 111 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Assertion Verification Metrics References Part III Reducing work in Verification 7. Reducing Work in Verification 117 Considerations in a Verification Environment . . . . . . . . . . . . . 118 Tri-State Buses and Dealing with Them . . . . . . . . . . . . . . . . 119 . . . . . . . . . . . . . . . . . . . . . . 120 Dealing with Internal Signals . . . . . . . . . . . . . . . . . . . . . 122 Environmental Considerations Dealing with Register Programming . . . . . . . . . . . . . . . . . . 128 A Hybrid Approach to Register Programming . . . . . . . . . . . 131 Dealing with Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . 136 Driving the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Debugging the Design . . . . . . . . . . . . . . . . . . . . . . . . . . 138 . . . . . . . . . . . . . . . . . . . . . . . 141 Making Note of Errors Debug Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 . . . . . . . . . . . . . . 143 . . . . . . . . . . . . . . . . . . . . . . . . 145 Identify Failures Before You Run Again . . . . . . . . . . . . . . 149 Don’t Postpone Features to be Tested . . . . . . . . . . . . . . . 149 Compile your Code . . . . . . . . . . . . . . . . . . . . . . . . . 149 QC Processes to run a Clean Run . . . . . . . . . . . . . . . . . . . . 150 Using a Data Profile to Speed up Simulations . . . . . . . . . . . . . 150 Getting the Machine to Document for You . . . . . . . . . . . . . . . 154 Code Profiling to Keep the Inefficiency Out Regression Management
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