SK hynix e-NAND Product Family
eMMC5.1 Compatible - Automotive
Rev 1.2 / Jul. 2016 1
Revision History
Revision No.
History
Date
Remark
0.1
1.0
1.1
1.2
- Preliminary
- Official Release
- Modification of Temperature values (p.5) and Active Power value of SDP(p.11)
- Modification of PKG Ball Size Value
Apr. 20, 2016
Jun. 07, 2016
Jul. 07, 2016
Jul. 20, 2016
Rev 1.2 / Jul. 2016 2
Table of Contents
1. Introduction ................................................................................................................. 4
1.1 General Description ............................................................................................................................................................. 4
1.2 Product Line-up ................................................................................................................................................................. 4
1.3 Key Features ...................................................................................................................................................................... 5
2. Package Configurations ................................................................................................ 6
2.1 Pin connection .................................................................................................................................................................... 6
2.2 Package Mechanical Drawing ............................................................................................................................................... 8
3. e-NAND Characteristics ............................................................................................... 10
3.1 Performance ..................................................................................................................................................................... 10
3.2 Power .............................................................................................................................................................................. 11
4. e-NAND new features (eMMC5.0 and eMMC5.1).......................................................... 13
4.1 eMMC5.0 New features............................................................................................................................................ 13
4.1.1 HS400 mode .................................................................................................................................................................. 13
4.1.2 Field firmware update ..................................................................................................................................................... 20
4.1.3 Health(Smart) report ...................................................................................................................................................... 23
4.1.4 Production state awareness ............................................................................................................................................. 24
4.1.5 Sleep notification ............................................................................................................................................................ 26
4.1.6 Secure removal type ....................................................................................................................................................... 27
4.2 eMMC5.1 New features............................................................................................................................................ 28
4.2.1 Command queuing ......................................................................................................................................................... 28
4.2.2 Cache barrier ................................................................................................................................................................. 32
4.2.3 Cache Flushing report ..................................................................................................................................................... 34
4.2.4 Background operation(BKOP) control ............................................................................................................................... 34
4.2.5 Secure Write Protection .................................................................................................................................................. 35
4.2.6 Enhanced strobe ............................................................................................................................................................ 40
4.2.7 RPMB throughput improvement ....................................................................................................................................... 44
5. e-NAND general parameters ....................................................................................... 45
5.1 Timing ............................................................................................................................................................................. 45
5.2 Bus signal ......................................................................................................................................................................... 50
5.3 Power mode ..................................................................................................................................................................... 54
5.4 Connection guide .............................................................................................................................................................. 58
6. e-NAND basic operations ............................................................................................. 59
6.1 Partitioning ....................................................................................................................................................................... 59
6.2 Boot operation .................................................................................................................................................................. 62
7. Timeout ....................................................................................................................... 63
8. Register ....................................................................................................................... 65
8.1 Operation conditions register (OCR) .................................................................................................................................... 65
8.2 Card identification (CID) register ......................................................................................................................................... 66
8.3 Card specific data register(CSD) ......................................................................................................................................... 66
8.4 Extended CSD register ....................................................................................................................................................... 69
8.5 RCA (Relative Card Address) ............................................................................................................................................... 75
8.6 DSR (Driver Stage Register) .............................................................................................................................................. 75
Rev 1.2 / Jul. 2016 3
1. Introduction
1.1 General Description
SK hynix e-NAND consists of NAND flash and MMC controller.
e-NAND has the built-in intelligent controller which manages interface protocols, wear leveling, bad block management, garbage col-
lection, and ECC. e-NAND protects the data contents from the host sudden power off failure.
e-NAND is compatible with JEDEC standard eMMC5.1 specification.
1.2 Product Line-up
Device
Density
Part Number
NAND Stack
PKG Size (mm)
Package Type
AAT
AIT
IT
CT
8GB
16GB
32GB
64GB
8GB
16GB
32GB
64GB
8GB
16GB
32GB
64GB
8GB
16GB
32GB
64GB
H26M41208HPRQ
H26M52208FPRQ
H26M64208EMRQ
H26M78208CMRQ
H26M41208HPRA
H26M52208FPRA
H26M64208EMRA
H26M78208CMRA
H26M41208HPRI
H26M52208FPRI
H26M64208EMRI
H26M78208CMRI
H26M41208HPRN
H26M52208FPRN
H26M64208EMRN
H26M78208CMRN
64Gb x 1
64Gb x 2
64Gb x 4
64Gb x 8
64Gb x 1
64Gb x 2
64Gb x 4
64Gb x 8
64Gb x 1
64Gb x 2
64Gb x 4
64Gb x 8
64Gb x 1
64Gb x 2
64Gb x 4
64Gb x 8
AAT (-40ºC ~ 105ºC) : Automotive grade Automotive Temperature device
AIT (-40ºC ~ 85ºC) : Automotive grade Industrial Temperature device
IT (-40ºC ~ 85ºC) : Industrial Temperature device
CT (-25ºC ~ 85ºC) : Commercial Temperature device
11.5x13x0.8
11.5x13x0.8
11.5x13x1.0
11.5x13x1.0
11.5x13x0.8
11.5x13x0.8
11.5x13x1.0
11.5x13x1.0
11.5x13x0.8
11.5x13x0.8
11.5x13x1.0
11.5x13x1.0
11.5x13x0.8
11.5x13x0.8
11.5x13x1.0
11.5x13x1.0
153FBGA
Rev 1.2 / Jul. 2016 4
1.3 Key Features
• eMMC5.1 compatible
(Backward compatible to eMMC4.5&eMMC5.0)
• Bus mode
- Data bus width : 1bit(default), 4bits, 8bits
- Data transfer rate: up to 400MB/s (HS400)
- MMC I/F Clock frequency : 0~200MHz
- MMC I/F Boot frequency : 0~52MHz
• Operating Voltage Range
- Vcc (NAND) : 2.7V - 3.6V
- Vccq (Controller) : 1.7V - 1.95V / 2.7V ~ 3.6V
• Temperature
- AAT(Ta) : -40ºC ~105ºC, Tc MAX =107ºC
- AIT(Ta) : -40ºC ~ 85ºC, Tc MAX = 90ºC
- IT(Ta) : -40ºC ~ 85ºC, Tc MAX = 90ºC
- CT(Ta) : -25ºC ~ 85ºC, Tc MAX = 90ºC
* The values for Ta and Tc mentioned above are measured
from SK hynix’s test equipment.
• Others
- All products are compliance with the RoHS directive
- All products are compliance with TS16949
- AAT/AIT products are compliance with AEC-Q100
• Supported Features
- HS400, HS200
- HPI, BKOPS, BKOP operation control
- Packed CMD, CMD queuing
- Cache, Cache barrier, Cache flushing report
- Partitioning, RPMB, RPMB throughput improve
- Discard, Trim, Erase, Sanitize
- Write protect, Secure write protection
- Lock/Unlock
- PON, Sleep/Awake
- Reliable Write
- Boot feature, Boot partition
- HW/SW Reset
- Field Firmware Update
- Configurable driver strength
- Health(Smart) report
- Production state awareness
- Secure removal type
- Data Strobe pin, Enhanced data strobe
(Bold features are added in eMMC5.1)
- Do not support Extended Attribute scheme
Rev 1.2 / Jul. 2016 5
2. Package Configurations
2.1 Pin connection
1
2
3
4
5
6
7
8
9
10 11 12 13 14
NC
NC
DAT0 DAT1 DAT2
Vss
RFU
NC
NC
NC
NC
NC
NC
NC
NC
DAT3
DAT4 DAT5 DAT6 DAT7
NC
NC
NC
NC
NC
NC
NC
NC
NC
VDDi
NC
Vssq
NC
Vccq
NC
NC
NC
NC
NC
NC
NC
NC
NC
Index
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
RFU
NC
NC
NC
NC
NC
NC
NC
NC
RFU
Vcc
Vss
VSF
VSF
Vcc
Vss
DS
VSS
VSF
VSF
VSF
Vss
Vcc
RSTN
RFU RFU
Vss
Vcc
VSF
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Vccq
CMD CLK
NC
Vssq
NC
Vccq
Vssq
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Vccq Vssq
Vccq Vssq
NC
NC
NC
VSF
NC
NC
A
B
C
D
E
F
G
H
J
K
L
M
N
P
[Figure 1] FBGA153 Package Connection (Top view through Package)
Pin number
A3
A4
A5
A6
B2
B3
B4
B5
B6
C2
Name
DAT0
DAT1
DAT2
Vss
DAT3
DAT4
DAT5
DAT6
DAT7
VDDi
Pin number
C4
C6
E6
E7
E8
E9
E10
F5
F10
G5
Name
Vssq
Vccq
Vcc
Vss
VSF
VSF
VSF
Vcc
VSF
Vss
Pin number
G10
H5
H10
J5
J10
K5
K8
K9
K10
M4
Name
VSF
DS
Vss
Vss
Vcc
RSTN
Vss
Vcc
VSF
Vccq
Pin number
M5
M6
N2
N4
N5
P3
P4
P5
P6
P10
Name
CMD
CLK
Vssq
Vccq
Vssq
Vccq
Vssq
Vccq
Vssq
VSF
Rev 1.2 / Jul. 2016 6
Name
CLK
Type
Input
CMD
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Input
Supply
Supply
Supply
Supply
Out put
Supply
DAT0
DAT1
DAT2
DAT3
DAT4
DAT5
DAT6
DAT7
RSTN
Vcc
Vccq
Vss
Vssq
VDDi
DS
VSF
RFU
Ball No.
Description
M6
M5
A3
A4
A5
B2
B3
B4
B5
B6
K5
E6,F5,J10,K9
C6,M4,N4,P3,P5
A6,E7,G5,H10,J5,K8
C4,N2,N5,P4,P6
C2
H5
Clock: Each cycle directs a 1-bit transfer on the command and DAT lines.
Command:
A bidirectional channel used for device initialization and command transfers.
Command has two operating modes:
1) Open-drain for initialization.
2) Push-pull for fast command transfer.
Data I/O0: Bidirectional channel used for data transfer.
Data I/O1: Bidirectional channel used for data transfer.
Data I/O2: Bidirectional channel used for data transfer.
Data I/O3: Bidirectional channel used for data transfer.
Data I/O4: Bidirectional channel used for data transfer.
Data I/O5: Bidirectional channel used for data transfer.
Data I/O6: Bidirectional channel used for data transfer.
Data I/O7: Bidirectional channel used for data transfer.
Reset signal pin
Vcc: Flash memory I/F and Flash memory power supply.
Vccq: Memory controller core and MMC interface I/O power supply.
Vss: Flash memory I/F and Flash memory ground connection.
Vssq: Memory controller core and MMC I/F ground connection
VDDi: Connect 0.1uF capacitor from VDDi to ground.
DS: Data Strobe
E8,E9,E10,F10,
G10, K10, P10
VSF: Vendor Specific Function
SK hynix use E9, E10 Pin as VSF Pin
Reserved for future use
[Table 1] FBGA153 Ball Description
Rev 1.2 / Jul. 2016 7
2.2 Package Mechanical Drawing
2.2.1 11.5mm x13.0mm x0.8mm
Top view Bottom view
11.500±0.100
A1 INDEX MARK
0
0
1
.
0
±
0
0
7
.
0
0
5
0
.
0
±
0
0
2
.
0
B
A
0
0
1
.
0
±
0
0
0
.
3
1
SEATING PLANE
C
0.08 C
<11.500>
0.300
0
0
3
.
0
I
>
E
N
L
T
U
O
G
K
P
<
>
0
0
.
3
1
<
0
0
5
.
6
=
3
1
x
H
C
T
P
0
0
5
I
.
0
I
>
H
C
T
P
<
0
0
5
.
0
0
0
5
>
H
C
T
P
<
I
.
0
0
0
5
,
8
)
0
5
0
0
5
0
0.500
0.500
0.500 PITCH x 13 = 6.500
8,500
.
0
±
0
0
3
.
0
Ø
x
3
5
1
B
A
C
M
5
1
.
0
Ø
.
0
±
0
2
3
.
0
Ø
x
3
5
1
w
o
l
f
e
R
t
s
o
P
(
[Figure 2] 11.5mm x 13.0mm x 0.8mm Package dimension
Rev 1.2 / Jul. 2016 8