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龙芯DEV3210开发板原理图.pdf

发布时间：2022-06-09 发布人：admin 分类：说明书 资料大小：0.28M 资料格式：pdf 举报 版权申诉
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    D C B A 5 4 3 2 1 A[21:0] 3.3V R37 R37 R34 R34 R12 R12 10K 10K VINETIC_RST# 10K(NC) 10K(NC) NN_CLE 10K(NC) 10K(NC) EMI_OE# R32 R32 10K 10K NN_ALE R38 R38 R35 R35 10K(NC) 10K(NC) 10K 10K R13 R13 R33 R33 10K 10K NC NC 3.3V R15 R15 R18 R18 R20 R20 10K 10K A18 R16 R16 10K(NC) 10K(NC) A17 10K(NC) 10K(NC) R17 R17 A16 10K(NC) 10K(NC) R19 R19 10K 10K 10K 10K HPI_RST NN_CLE EMI_OE CPU时钟 下拉 下拉 下拉 不用 下拉 下拉 上拉 150MHz 下拉 上拉 下拉 160MHz 下拉 上拉 上拉 175MHz 上拉 下拉 下拉 200MHz 上拉 下拉 上拉 225MHz 上拉 上拉 下拉 250MHz 上拉 上拉 上拉 266MHz NN_ALE: Nor Flash 1:16bit 0:8bit A18 A17 A16 SYS时钟 下拉 下拉 下拉 不用 下拉 下拉 上拉 50MHz 下拉 上拉 下拉 66MHz 下拉 上拉 上拉 80MHz 上拉 下拉 下拉 100MHz 上拉 下拉 上拉 120MHz 上拉 上拉 下拉 133MHz 上拉 上拉 上拉 不用 R14 R14 NC NC DQM0 DQM1 DQM2 DQM3 RAS# CAS# SDRAM_CS# EMI_WE# NN_CS NN_CLE NN_ALE NN_RDY EMI_OE# NR_CS# SDRAM_CLK D[31:0] D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 IC4A IC4A 109 108 D0 106 D1 105 D2 104 D3 103 D4 102 D5 101 D6 D7 98 97 D8 96 D9 95 D10 94 D11 92 D12 89 D13 88 D14 D15 86 85 D16 83 D17 82 D18 81 D19 80 D20 79 D21 77 D22 D23 73 72 D24 71 D25 70 D26 68 D27 67 D28 66 D29 65 D30 D31 GC3210I GC3210I A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 115 116 117 120 121 123 124 125 126 127 128 129 131 132 133 134 135 137 152 153 154 155 156 157 159 0_DQM 100 1_DQM 87 2_DQM 74 3_DQM 64 112 111 RAS_ CAS_ SD_CS_ EMI_WE_ 114 110 164 NN_CS_ NN_CLE 166 NN_ALE 162 NN_RDY 163 160 EMI_OE_ 161 NR_CS_ SDCLK 63 GC3210I-QFP208 GC3210I-QFP208 NN_RDY R45 R45 10K 10K CKE# R133 R133 10K 10K 3.3V 3.3V ETH-PHY_TXD3 ETH-PHY_TXD2 ETH-PHY_TXD1 ETH-PHY_TXD0 ETH-PHY_TXCLK ETH-PHY_TXEN ETH-PHY_CRS ETH-PHY_TXD3 ETH-PHY_TXD2 ETH-PHY_TXD1 ETH-PHY_TXD0 ETH-PHY_TXCLK ETH-PHY_TXEN ETH-PHY_CRS ETH-PHY_RXD3 ETH-PHY_RXD2 ETH-PHY_RXD1 ETH-PHY_RXD0 ETH-PHY_RXCLK ETH-PHY_RXDV ETH-PHY_RXER ETH-PHY_COL ETH-PHY_RXD3 ETH-PHY_RXD2 ETH-PHY_RXD1 ETH-PHY_RXD0 ETH-PHY_RXCLK ETH-PHY_RXDV ETH-PHY_RXER ETH-PHY_COL IC4B IC4B 17 M0_TXD3 19 M0_TXD2 23 M0_TXD1 28 26 M0_TXD0 M0_TXCLK 178 176 M0_TXEN M0_CRS 181 M0_RXD3 183 M0_RXD2 140 138 M0_RXD1 M0_RXD0 180 M0_RXCLK 142 M0_RXDV 145 M0_RXERR 185 M0_COL1 (PAGE-4) (PAGE-4) ETH-MDC ETH-MDIO TAP_SEL TRST_N TMS TDI TDO TCK XTLI XTLO M_CLK M_DAT K_CLK K_DAT 3210_RST 33 31 51 45 49 48 47 50 38 39 58 203 202 M_CLK M_DAT 41 37 K_CLK K_DAT XI XO VCLK 13 VLINE 151 VFRAME 149 VM 146 192 191 189 188 187 198 197 196 195 194 15 14 11 8 7 5 4 3 VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 URT_TXD0 URT_RXD0 34 32 URT_TXD1 URT_RXD1 59 60 SS 42 MISO 43 35 MOSI SCLK 44 SDATA_IN 1 208 SYNC_O 207 RESET_O 206 204 BIT_CLK_I SDATA_OUT GC3210I GC3210I M0_DC M0_DIO TAP_SEL JRST_ JTMS JTDI JTDO JTCK VCLK VLINE VFRAME VM VCLK VLINE VFRAME VM VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 VD0 VD1 VD2 VD3 VD4 VD5 VD6 VD7 VD8 VD9 VD10 VD11 VD12 VD13 VD14 VD15 VD16 VD17 UART_TXD0 UART_RXD0 UART_TXD1 UART_RXD1 SPI_SS SPI_MISO SPI_MOSI SPI_SCLK UART_TXD0 UART_RXD0 UART_TXD1 UART_RXD1 AC97_DIN AC97_DOUT AC97_SYNC AC97_RST AC97_BITCLK TRST_N TRST_N TDI TDO TMS TCK TDI TDO TMS TCK TAP_SEL TAP_SEL USB-INT USB-INT REMOTE INT2 INT3 INT3为SPI WiFi硬件中断， 挂于SD卡座上保留给SD卡形状的WiFi板 CAN1_RX CAN1_TX CAN0_RX LCD_EN/CAN0_TX LCD_RS LCD_R/W LCD_EN LCD_SCL LCD_SDA KEY_EN KEY_DATA KEY_SCL 170 171 174 175 18 22 24 29 30 139 141 144 177 179 182 184 IC4D IC4D INT0-HPI INT1 INT2 INT3 GC3210I GC3210I GPIO11/CAN1_RX GPIO10/CAN1_TX GPIO9/CAN0_RX GPIO8/CAN0_TX GPIO7 GPIO4 GPIO5 GPIO6 GPIO3 GPIO2 GPIO1 GPIO0 GC3210I-QFP208 GC3210I-QFP208 169 HPI_RST_ 167 HPI_CS_ HPI_RDY 168 I2C_SDA 200 201 I2C_SCL VINETIC_RST# VINETIC_CS# VINETIC_RDY# I2C_DATA I2C_CLK R36 R36 2 0R 0R 1 SYS_RST_ GC3210I-QFP208 GC3210I-QFP208 INT3 CAN1_RX CAN1_TX CAN0_RX LCD_EN/CAN0_TX C104 C104 0.1uF 0.1uF C73 C73 0.1uF 0.1uF C89 C89 0.1uF 0.1uF 3.3V C106 C106 0.1uF 0.1uF C93 C93 0.1uF 0.1uF C100 C100 0.1uF 0.1uF C107 C107 0.1uF 0.1uF C90 C90 0.1uF 0.1uF C70 C70 0.1uF 0.1uF C86 C86 0.1uF 0.1uF C69 C69 0.1uF 0.1uF C68 C68 0.1uF 0.1uF C72 C72 0.1uF 0.1uF C76 C76 0.1uF 0.1uF C75 C75 0.1uF 0.1uF C88 C88 0.1uF 0.1uF C91 C91 0.1uF 0.1uF C102 C102 0.1uF 0.1uF C103 C103 0.1uF 0.1uF C71 C71 0.1uF 0.1uF C67 C67 0.1uF 0.1uF C94 C94 0.1uF 0.1uF C105 C105 0.1uF 0.1uF 3.3V 3.3V 3.3V 1.8V 1.8V 1.8V 1 + CE15 1 + CE15 2 2 47UF/10V,B 47UF/10V,B 2 12 25 27 69 84 40 99 113 165 130 143 190 199 6 16 46 78 93 107 122 136 150 158 205 IC4C IC4C VCCIO_7 VCCIO_5 VCCIO_3 VCCIO_2 VCCIO_16 VCCIO_18 VCCIO_0 VCCIO_20 VCCIO_22 VCCIO_15 VCCIO_24 VCCIO_26 VCCIO_11 VCCIO_9 1.8V 1.8V core core 3.3V 3.3V IO电源 IO电源 1.8V 10 21 36 61 75 90 118 147 173 193 VCCINST_5 VCCINST_3 VCCINST_1 VCCINST_12 VCCINST_14 VCCINST_16 VCCINST_18 VCCINST_22 VCCINST_11 VCCINST_7 AVDD_5AP 55 1.8V-PLL_5AP AGND_5AP AGND_PLL AGND_PLL 1.8V-PLL 1.8V-PLL AVSS_5AP 54 52 AVDD18_0 1.8V 1.8V 模拟电源 模拟电源 AVSS18_0 AVDD18_2 AVSS18_2 VSSINST_5 VSSINST_3 VSSINST_8 VSSINST_10 VSSINST_12 VSSINST_14 VSSINST_18 VSSINST_20 VSSINST_7 53 56 57 9 20 62 76 91 119 148 172 186 GC3210I GC3210I VSSIO_6 VSSIO_5 VSSIO_1 VSSIO_15 VSSIO_17 VSSIO_19 VSSIO_21 VSSIO_23 VSSIO_25 VSSIO_12 VSSIO_7 GC3210I-QFP208 GC3210I-QFP208 1.8V FB20 FB20 1.8V-PLL 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A FB22 FB22 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A C101 C101 0.1uF 0.1uF AGND_PLL AGND_PLL C95 C95 0.1uF 0.1uF 1.8V FB21 FB21 1.8V-PLL_5AP 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A FB23 FB23 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A C96 C96 0.1uF 0.1uF AGND_5AP C111 C111 27PF 27PF C110 C110 27PF 27PF Y3 Y3 5MHZ 5MHZ XTLI R136 R136 1.00M 1.00M XTLO 与原20pin插座的pin1脚对齐--> 5V DC12V-IN VCC +12V VCC_LCD LCD_SCL SPI_SS R169 0R R169 0R 1 2 R170 0R R170 0R 1 2 DC3.3V C131 C131 DC3.3V C133 C133 0.1uF 0.1uF + + CE17 CE17 10UF 10UF C132 C132 NC,22pF NC,22pF SPI_MOSI C134 C134 NC,22pF NC,22pF SPI_SCLK 5 4 3 2 NC,22pF NC,22pF C135 C135 SPI_MISO NC,22pF NC,22pF D C B A XP3 XP3 6x2/SM 6x2/SM XP1 XP1 1 3 5 7 9 11 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 TP_SDA TP_SCL UART_TXD1 UART_RXD1 TXD_1 RXD_1 3.3V INT2 I2C_DATA I2C_CLK R137 NC 1 R137 NC 2 R138 NC R138 NC 1 2 R144 NC R144 NC 1 2 R146 NC R146 NC 1 2 R145 0R R145 0R 1 2 R147 0R R147 0R 1 2 LCD_SCL LCD_R/W SPI_MISO SPI_MOSI DC3.3V GND REMOTE LCD_SDA KEY_EN KEY_DATA I2C_CLK VM VD17 VD15 VD13 VD10 VD8 VD6 VD5 VD3 VD1 VFRAME VCC_LCD LCD_EN SPI_SCLK SPI_SS LCD_RS INT2 GND GND KEY_SCL I2C_DATA VD16 VD14 VD12 VD11 VD9 VD7 VD4 VD2 VD0 VLINE VCLK 25x2/SM 25x2/SM SUB BOARD INTERFACE DC3.3V 10K R157 R157 10K SPI_MISO SPI_MOSI 调试SD卡时注意将DATA1所在脚置为输入 10K R156 R156 10K INT3 SPI_MISO GND SPI_SCLK DC3.3V GND SPI_MOSI U4 U4 8 DATA1 7 6 Data Out 5 VSS2 4 CLK 3 VDD 2 VSS1 1 Data In RSV/CS 9 DATA2 2 S 1 S MMC/SD MMC/SD 2 S 1 S Title Title Title Size Size Size C C C Date: Date: Date: <Title> <Title> Document Number Document Number Document Number <Doc> <Doc> <Doc> Rev Rev Rev <RevCode> <RevCode> <RevCode> Thursday, December 11, 2008 Thursday, December 11, 2008 Thursday, December 11, 2008 1 Sheet Sheet Sheet 1 1 1 of of of 12 12 12 </div><div id='PreviewText_2' class='preview-text'>4 DC3.3V DC5VA 3 IC8 IC8 2 1 1 1 2 2 1 1 2 2 C118 C118 22PF_C0603 22PF_C0603 R142 R142 R141 R141 1 2 1 2 22R,R0603,5% 22R,R0603,5% 1 2 1 2 22R,R0603,5% 22R,R0603,5% 1 2C114 1 2C114 1UF,C0603 1UF,C0603 Beep C115 C115 100PF,C0603 100PF,C0603 JD1 C121 C121 0.1UF,C0603 0.1UF,C0603 MIC_IN_2 MIC_IN_1 VREFOUT 1 + 1 + 2 2 10UF,16V,DC 10UF,16V,DC CE6 CE6 1 1 2 C128 2 C128 100PF,C0603 100PF,C0603 AUDIO_AGND ALC203E ALC203E 25 38 AVDD1 AVDD2 1 9 DVDD1 DVDD2 6 5 BIT_CLK SDATA_OUT 8 SDATA_IN 10 SYNC 11 RESET# 12 13 14 15 16 17 18 19 20 22 21 23 24 PC_BEEP PHONE AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_GND CD_R MIC2 MIC1 LINE_IN_L LINE_IN_R AVss1 AVss2 26 42 4 DVss1 7 DVss2 XTL_IN 2 3 XTL_OUT MONO_OUT 37 35 LINE_OUT_L LINE_OUT_R 36 NC 40 39 HP_OUT_L HP_OUT_R 41 (BPCFG)VRAD 31 (FLT3D)VRDA 32 33 34 FLTI(NC) FLTO(NC) 43 JD/SDIN1 44 TEST1 45 ID0# 46 ID1# EPAD 47 48 S/PDIF ALC203E MICPHONE IN R162 R162 1 2 1 2 8.2K,R0603,5%,NC 8.2K,R0603,5%,NC 1 + 1 + 2 2 CE7 CE7 10UF,16V,DC 10UF,16V,DC 27 28 29 30 REFFLT Vrefout AFLT1 AFLT2 1 1 2 C126 2 C126 1000PF,C0603 1000PF,C0603 C116 C116 0.1UF 0.1UF 1 1 2 2 FB26 60R,1.5A,0805 FB26 60R,1.5A,0805 MIC_IN_1 FB25 60R,1.5A,0805 FB25 60R,1.5A,0805 MIC_IN_2 C122 C122 1UF1 2 1UF 1 2 C123 C123 1UF1 2 1UF 1 2 R153 R153 0R,5% 0R,5% 1 2 1 2 1 2 1 2 R154 R154 0R,5% 0R,5% AUDIO_AGND VREFOUT R161 R161 4.7K,5% 4.7K,5% 1 1 2 2 600OHM/100MHz-500mA 600OHM/100MHz-500mA 600OHM/100MHz-500mA 600OHM/100MHz-500mA 1 1 R160 R160 22K,5% 22K,5% FB28 FB28 FB29 FB29 1 1 R166 R166 22K,5% 22K,5% 2 2 1 1 2 2 2 2 C143 C143 100PF 100PF 1 1 2 2 1 1 2 2 R163 R163 4.7K,5% 4.7K,5% AC97_MIC_IN_1 AC97_MIC_IN_2 C140 C140 100PF 100PF 5 3.3V 5V DC3.3V DC5V GND AC97_BITCLK AC97_DOUT AC97_DIN AC97_SYNC AC97_RST R139 R139 1 2 1 2 10K,R0603,5% 10K,R0603,5% 1 1 FP_SPEAK DC5V FP_SPEAK1 FP_SPEAK1 1 3 1X3 1X3 2 FP_SPEAK DC3.3V R140 R140 1K,R0603,5% 1K,R0603,5% 2 2 1 1 2 C120 2 C120 1UF,C0603 1UF,C0603 1 1 2 2 1 1 2 C119 2 C119 0.1UF,C0603 0.1UF,C0603 1 1 2 C117 2 C117 0.1UF,C0603 0.1UF,C0603 1 + 1 + 2 2 10UF,16V,DC 10UF,16V,DC CE16 CE16 DC5VA DC5V FB11 FB11 1 1 2 C127 2 C127 0.1UF,C0603 0.1UF,C0603 1 1 2 C35 2 C35 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A 1 + 1 + 2 2 10UF,16V,DC 10UF,16V,DC CE5 CE5 0.1UF,C0603 0.1UF,C0603 AUDIO_AGND D C B A AUDIO_AGND 1 1 2 2 R143 R143 1M,5% 1M,5% C113 22pF 22pF C113 1 OSC_1 OSC_1 24,576MHz 24,576MHz 2 C112 C112 22pF 22pF LINE_OUT_L LINE_OUT_R HP_OUT_L HP_OUT_R C129 C129 C130 C130 1uF 1uF 1uF 1uF 100uF+C124 +C124 100uF FB32 FB32 + + C125 C125 FB33 FB33 100uF 100uF 1 1 1 1 R155 R155 0,5% 0,5% AUDIO_AGND DC5VA DC3.3V 45 6 3 2 7 1 8 RA2 10K 10K RA2 5*7 DIP 100UP JD1 JD0 GIO0 5678 1234 10K/NC 10K/NC RA3 RA3 HEADPHONE OUT 600OHM/100MHz-500mA 600OHM/100MHz-500mA 600OHM/100MHz-500mA 600OHM/100MHz-500mA C142 C142 C141 C141 0.1nF 0.1nF 0.1nF 0.1nF R151 R151 R149 R149 0,5% 0,5% 0,5% 0,5% JD0 XTLSEL GIO1 R152 R152 GIO0 100K,5% 100K,5% R150 R150 100K,5% 100K,5% R148 R148 0,5%(NC) 0,5%(NC) DC3.3V AUDIO_AGND AC97_HP_OUT_L AC97_HP_OUT_R 1 1# 2 3 3X 7 8 1 1# 2 3 3X 7 8 1 1# 2 3 3X 7 8 MIC_IN MIC_IN 1 1# 2 3 3X 1 1 7 8 2 2 3 3 XS4 XS4 MIC_IN MIC_IN 1 1# 2 3 3X 1 1 7 8 2 2 3 3 XS3 XS3 MIC_IN MIC_IN 1 1# 2 3 3X 1 1 7 8 XS2 XS2 2 2 3 3 AC97_MIC_IN_1 AC97_MIC_IN_2 AC97_LINE_OUT_R AC97_LINE_OUT_L AC97_HP_OUT_R AC97_HP_OUT_L LINE_OUT_L 600OHM/100MHz-500mA 600OHM/100MHz-500mA FB30 FB30 FB31 FB31 1 1 1 1 600OHM/100MHz-500mA 600OHM/100MHz-500mA AUDIO_AGND 1 2C144 1 2C144 1UF 1UF AC97_LINE_OUT_L LINE_OUT_R 1 2C145 1 2C145 1UF 1UF AC97_LINE_OUT_R AUDIO_AGND C136 C136 C137 C137 0.1nF 0.1nF 0.1nF 0.1nF LINE OUT R168 R168 22K,5% 22K,5% 2 2 R167 R167 22K,5% 22K,5% 1 1 2 2 1 1 AUDIO_AGND Title Title Title Size Size Size A4 A4 A4 Date: Date: Date: Document Number Document Number Document Number ALC203 ALC203 ALC203 Thursday, December 25, 2008 Thursday, December 25, 2008 Thursday, December 25, 2008 Sheet Sheet Sheet 2 2 2 of of of 12 12 12 A Rev Rev Rev 01 01 01 </div><div id='PreviewText_3' class='preview-text'>5 4 3 2 1 D C B A 3.3V R47 R47 10K 10K EMI_WE# NN_ALE NN_CLE 3.3V 3.3V NN_CS EMI_OE# NN_RDY C31 C31 0.1uF 0.1uF C25 C25 0.1uF 0.1uF D[31:0] D0 D1 D2 D3 3.3V D4 D5 D6 D7 29 30 31 32 36 37 41 42 43 44 1 2 3 4 5 6 10 11 14 45 46 47 48 40 IC3 IC3 IO0 IO1 IO2 IO3 VSS VCC IO4 IO5 IO6 IO7 1 2 3 4 5 6 10 11 14 45 46 47 48 40 WP 19 WE 18 ALE 17 CLE 16 VSS 13 VCC 12 CE 9 RE 8 RDY/B 7 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 15 20 21 22 23 24 25 26 27 28 33 34 35 38 39 K9F2G08 K9F2G08 D C B A 5 4 3 Title Title Title Size Size Size A A A Date: Date: Date: <Title> <Title> <Title> Document Number Document Number Document Number <Doc> <Doc> <Doc> Rev Rev Rev <RevCode> <RevCode> <RevCode> Sunday, November 18, 2007 Sunday, November 18, 2007 Sunday, November 18, 2007 2 Sheet Sheet Sheet 3 3 3 1 of of of 12 12 12 </div><div id='PreviewText_4' class='preview-text'>5 4 3 2 1 A[21:0] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 R135 10K R135 10K 3.3V EMI_OE# EMI_WE# NR_CS# D[31:0] D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 R43 R43 R44 R44 A21 A20 0,5% 0,5% 0,5% 0,5% 3.3V IC2 IC2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 BYTE RST OE WE CE 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 9 47 12 28 11 26 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15/A-1 RY/BY 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 15 13 NC1 14 NC2 10 NC3/A20 VCC 37 GND 46 GND 27 AM29LV160B/TSOP AM29LV160B/TSOP D C B A D C B A 5 4 3 2 Title Title Title Size Size Size B B B Date: Date: Date: Document Number Document Number Document Number <Doc> <Doc> <Doc> Rev Rev Rev 1.0 1.0 1.0 Sunday, November 18, 2007 Sunday, November 18, 2007 Sunday, November 18, 2007 Sheet Sheet Sheet 1 4 4 4 of of of 12 12 12 </div><div id='PreviewText_5' class='preview-text'>5 4 3 2 1 D C B A 3V3-ETH R76 R76 R71 R71 4.7K 4.7K 4.7K 4.7K (PAGE-4) (PAGE-4) ETH-MDC ETH-MDIO ETH-PHY_TXCLK ETH-PHY_RXDV R101 R101 ETH-PHY_TXD0 ETH-PHY_TXD1 ETH-PHY_TXD2 ETH-PHY_TXD3 ETH-PHY_TXEN 33 33 ETH-PHY_RXD0 ETH-PHY_RXD1 ETH-PHY_RXD2 ETH-PHY_RXD3 33 33 ETH-PHY_RXCLK R86 R86 ETH-PHY_COL ETH-PHY_CRS ETH-PHY_RXER ETH-LNK ETH-FULL-DX ETH-LNK10-ACT ETH-LNK100-ACT LED-ETH-COLn change to atctive low 3V3-ETH 3V3-ETH R102 R102 R103 R103 R104 R104 R94 R94 R90 R90 10K 10K 10K 10K [D26-1] [D27-1, R124-1] [R125-1] 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K NOTE 23 NOTE 23 NOTE 23 ETHERNET CRYSTAL C55 C55 20PF 20PF ETH-XTALI Y1 Y1 25MHz 25MHz C54 C54 20PF 20PF ETH-XTALO NOTE 22 NOTE 22 NOTE 22 NOTE 19 NOTE 19 NOTE 19 3V3-ETH U6 PIN # 14 48 C56 C56 0.1UF 0.1UF C53 C53 0.1UF 0.1UF U6 PIN # FB6 FB6 1 1 36 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A AVDD1-ETH C45 C45 0.1UF 0.1UF NOTE 15 NOTE 15 NOTE 15 FB5 FB5 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A C46 C46 0.1UF 0.1UF CE8 CE8 10UF/A 10UF/A PWFBOUT AVDD1-ETH 2 3 6 3 1 D D V A T U O B F W P 8 4 4 1 8 2 D D V D 1 D D V D I N B F W P RTL8201BL RTL8201BL C59 C59 0.1UF 0.1UF PWFBIN 3V3-ETH U6 U6 MDC MDIO TXD0 TXD1 TXD2 TXD3 TXEN TXC RXDV RXD0 RXD1 RXD2 RXD3 RXC COL CRS RXER X1 X2 25 26 6 5 4 3 2 7 22 21 20 19 18 16 1 23 24 46 47 9 10 12 13 15 LED0/PHYA0 LED1/PHYA1 LED2/PHYA2 LED3/PHYA3 LED4/PHYA4 D N G D D N G D D N G D 1 1 7 1 5 4 NC 27 TPTX+ TPTX- TPRX+ TPRX- 34 33 31 30 RTSET 28 ISOLATE 43 40 REPT SPEED 39 DUPLEX 38 ANE 37 LDPS 41 MII/SNIB 44 RESETB 42 RESETn D N G A D N G A 5 3 9 2 R81 R81 R82 R82 49.9 49.9 49.9 49.9 C48 C48 0.1UF 0.1UF C49 C49 0.1UF 0.1UF R79 R79 R80 R80 49.9 49.9 49.9 49.9 MII-ISO 8201_TXP 8201_TXN 8201_RXP 8201_RXN R70 R70 R84 R84 R78 R78 R77 R77 R75 R75 R69 R69 R83 R83 R85 R85 5.90K 5.90K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 10.0K 3V3-ETH 3V3-ETH LED_2 LED3 LED3 R68 R68 2 1K,5% 1K,5%1 ETH-LNK LED_3 2 R74 R74 1 1K,5% 1K,5% ETH-FULL-DX 3V3-ETH 8201_RXP 8201_RXN 8201_TXP 8201_TXN RJ1 RJ1 D1+ TD+ TD- RD+ CT0 CT1 RD- NC GND D2+ 9 1 2 3 4 5 6 7 8 12 RJ45-Fliter RJ45-Fliter SH2 D1- 14 10 R64 R64 2 2 R62 R62 1K(NC) 1K(NC)1 ETH-LNK ETH-FULL-DX 1 1K(NC) 1K(NC) D2- SH1 11 13 FB19 FB19 1 1 60OHM/100MHz-1.5A 60OHM/100MHz-1.5A 1K(NC) 1K(NC) 1K(NC) 1K(NC) R63 R63 ETH-LNK100-ACT R65 R65 ETH-LNK10-ACT ETH-PHY_TXD0 ETH-PHY_TXD1 ETH-PHY_TXD2 ETH-PHY_TXD3 ETH-PHY_TXEN ETH-PHY_TXD0 ETH-PHY_TXD1 ETH-PHY_TXD2 ETH-PHY_TXD3 ETH-PHY_TXEN PHY Signal For MII port test ETH-PHY_TXCLK ETH-PHY_RXCLK ETH-PHY_RXDV ETH-PHY_RXD0 ETH-PHY_RXD1 ETH-PHY_RXD2 ETH-PHY_RXD3 ETH-PHY_COL ETH-PHY_CRS ETH-PHY_RXER ETH-PHY_TXCLK ETH-PHY_RXCLK ETH-PHY_RXDV ETH-PHY_RXD0 ETH-PHY_RXD1 ETH-PHY_RXD2 ETH-PHY_RXD3 ETH-PHY_COL ETH-PHY_CRS ETH-PHY_RXER 3210_RST 3.3V RESETn 3V3-ETH 3.3V GND [U6-13, D27-1] ETH-LNK100-ACT GREEN/5MM/DIP(NC) GREEN/5MM/DIP(NC) R72 R72 1K 1K LED-R LED-R [ETH 10/100 BT] ETH-LNK10-ACT R67 R67 1K(NC) 1K(NC) LED-R LED-R 3.3V R73 R73 1K 1K LED_0 LED_1 LED1 LED1 GREEN/5MM/DIP(NC) GREEN/5MM/DIP(NC) LED2 LED2 LED_4 GREEN/5MM/DIP(NC) GREEN/5MM/DIP(NC) LED_0 LED_1 LED_2 LED_3 LED_4 1 2 3 4 5 6 J2 J2 1 2 3 4 5 6 SIP6 SIP6 5 4 3 2 Title Title Title Size Size Size C C C Date: Date: Date: <Title> <Title> <Title> Document Number Document Number Document Number <Doc> <Doc> <Doc> Rev Rev Rev <RevCode> <RevCode> <RevCode> Saturday, December 08, 2007 Saturday, December 08, 2007 Saturday, December 08, 2007 1 Sheet Sheet Sheet 5 5 5 of of of 12 12 12 D C B A </div><div id='PreviewText_6' class='preview-text'>D C B A 5 4 3 2 1 12VSB_DCJACK CE14 CE14 1 + 1 + 2 47UF/16V,E2 47UF/16V,E C84 C84 R25 R25 100K,5% 100K,5% 0.1UF 0.1UF C24 C24 0.1UF 0.1UF R26 R26 3K,5% 3K,5% 12VSB_DCJACK CE13 CE13 1 + 1 + 2 47UF/16V,E2 47UF/16V,E C61 C61 R41 R41 100K,5% 100K,5% 0.1UF 0.1UF C29 C29 0.1UF 0.1UF R42 R42 3K,5% 3K,5% PU1 PU1 VCC EN OCSET FB AP1513 AP1513 OUTPUT1 OUTPUT2 VSS1 VSS2 PU2 PU2 VCC EN OCSET FB AP1513 AP1513 OUTPUT1 OUTPUT2 VSS1 VSS2 4 2 3 1 4 2 3 1 6 5 8 7 6 5 8 7 1 2 1 1 2 1 L1 L1 33uH/2A 33uH/2A 5V 2 33uH/2A 33uH/2A D8 D8 1N5819 1N5819 + CE1 + CE1 220UF/6.3V,E 220UF/6.3V,E CT7343_19 CT7343_19 C23 C23 0.1UF 0.1UF L2 L2 33uH/2A 33uH/2A 3.3V 2 27uH/2A 27uH/2A D11 D11 1N5819 1N5819 + CE4 + CE4 220UF/6.3V,E 220UF/6.3V,E CT7343_19 CT7343_19 C28 C28 0.1UF 0.1UF R23 R23 6.8K,1% 6.8K,1% R11 R11 1.3K,1% 1.3K,1% R40 R40 6.8K,1% 6.8K,1% R39 R39 2.2K,1% 2.2K,1% 5v R28 R28 1k 1k 5V 5V LED4 LED4 5V C52 C52 0.1UF 0.1UF 1 1 2 2 1 + CE10 1 + CE10 2 2 47UF/10V,B 47UF/10V,B IC5 IC5 Vin 3 AMS117-1.8v AMS117-1.8v 2 D 4 N G Vout 4 1 1.8V C47 C47 0.1UF 0.1UF 1 1 2 2 1 + CE9 1 + CE9 2 2 47UF/10V,B 47UF/10V,B D 3.3V TDI R50 R50 10K 10K R49 R49 10K(NC) 10K(NC) TRST_N TDI TDO TMS TCK 3210_RST TAP_SEL 1 3 5 7 9 11 13 1 3 5 7 9 11 13 XP2 XP2 JTAG JTAG 2 4 6 8 10 12 14 2 4 6 8 10 12 14 3.3V 3.3V 3.3V 3.3V 3.3V TRST_N R48 R48 10K 10K R46 R46 10K(NC) 10K(NC) TCK R54 R54 10K 10K R53 R53 10K(NC) 10K(NC) TMS R51 R51 10K 10K TAP_SEL R52 R52 10K(NC) 10K(NC) R56 R56 10K 10K R55 R55 10K(NC) 10K(NC) C TRST_N TDI TDO TMS TCK TAP_SEL TRST_N TDI TDO TMS TCK TAP_SEL PF1 PF1 5A 5A FUSE6127_27 FUSE6127_27 2 1 D12 D12 D1 D1 1N5819 1N5819 1N5819 1N5819 1 1 1 1 GND_DCJK_D POWER3P1 POWER3P1 +12V 1 2 GND0 3 GND1 POWER POWER FB7 FB7 1 1 80OHM/100MHz-3A 80OHM/100MHz-3A DC12V-IN 12VSB_DCJACK 123 I I N N I I N N O O U U T POW_SW1 T POW_SW1 FB4 FB4 1 1 80OHM/100MHz-3A 80OHM/100MHz-3A FAN FAN SW_5PINS SW_5PINS 4 5 C1 C1 1UF 1UF R1 R1 R2 R2 R3 R3 0,5% 0,5% 0,5% 0,5% 0,5% 0,5% GND_DCJK_D SW1SW1 1 3 1 3 Reset 2 4 2 4 R5 R5 1 2 0, 5% 0, 5% 3.3V R4 R4 10.0K 10.0K DNE DNE C7 C7 0.1UF 0.1UF DNE DNE 4 U1 U1 RST 2 C C V D N G 1 MAX811 MAX811 DNE DNE 3 MR C15 C15 0.1UF 0.1UF DNE DNE TH2 TH2 TH1 TH1 TH4 TH4 TH3 TH3 3210_RST (PAGE-3,4,5,6) 1 HOLE HOLE TH_3MM3 TH_3MM3 ns ns 1 HOLE HOLE TH_3MM3 TH_3MM3 ns ns 1 HOLE HOLE TH_3MM3 TH_3MM3 ns ns 1 HOLE HOLE TH_3MM3 TH_3MM3 ns ns B A 5 4 3 2 Title Title Title Size Size Size C C C Date: Date: Date: <Title> <Title> <Title> Document Number Document Number Document Number <Doc> <Doc> <Doc> Rev Rev Rev <RevCode> <RevCode> <RevCode> Wednesday, December 05, 2007 Wednesday, December 05, 2007 Wednesday, December 05, 2007 1 Sheet Sheet Sheet 6 6 6 of of of 12 12 12 </div><div id='PreviewText_7' class='preview-text'>D C B A 5 4 3 2 1 3.3V 5678 1234 RA1 RA1 10K 10K 5V FU1 1.6A FU1 1.6A 1 2 FB12 60R,1.5A FB12 60R,1.5A CON1 CON1 GND CLK PAD3 NC2 VCC PS/2-MOUSE PS/2-MOUSE 7 PAD1 DATA 1 2 NC1 8 PAD2 CON2 CON2 7 PAD1 DATA 1 2 NC1 8 PAD2 GND CLK PAD3 NC2 VCC 3 5 9 6 4 3 5 9 6 4 C40 C40 C41 C41 C43 C43 C44 C44 C39 C39 C42 C42 470pF 470pF 470pF 470pF 470pF 470pF 0.1uF 0.1uF 470pF 470pF 0.1uF 0.1uF PS/2-KEY PS/2-KEY FB17 FB17 60R,1.5A 60R,1.5A FB18 FB18 60R,1.5A 60R,1.5A M_DAT M_CLK K_DAT K_CLK FB13 FB13 60R,1.5A 60R,1.5A FB14 FB14 60R,1.5A 60R,1.5A FB15 FB15 60R,1.5A 60R,1.5A FB16 FB16 60R,1.5A 60R,1.5A PS/2 Title Title Title Size Size Size A4 A4 A4 Date: Date: Date: Document Number Document Number Document Number PS2_SD_SIM PS2_SD_SIM PS2_SD_SIM Thursday, December 25, 2008 Thursday, December 25, 2008 Thursday, December 25, 2008 Sheet Sheet Sheet 7 7 7 of of of 12 12 12 A Rev Rev Rev 01 01 01 </div><div id='PreviewText_8' class='preview-text'>5 4 3 2 1 3.3V 3.3V 3.3V D15 D14 D13 D12 D11 D10 D9 D8 EMI_WE# RAS# CAS# SDRAM_CS# A14 A15 EMI_WE# RAS# CAS# SDRAM_CS# A14 A15 D[31:0] 3.3V D0 D1 D2 D3 D4 D5 D6 D7 DQM0 EMI_WE# CAS# RAS# SDRAM_CS# A14 A15 A10 A0 A1 A2 A3 DQM0 A[19:0] IC6 IC6 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD DQML WE_N CAS_N RAS_N CS_N BA0 BA1 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 VSS 53 DQ15 VSSQ 52 51 DQ14 50 DQ13 VDDQ 49 48 DQ12 47 DQ11 VSSQ 46 45 DQ10 44 DQ9 VDDQ 43 42 DQ8 41 VSS NC 40 DQMH 39 38 CLK 37 CKE 36 A12 35 A11 34 A9 33 A8 32 A7 31 A6 30 A5 29 A4 28 VSS SDRAM 512Mb SDRAM 512Mb D C B A Place a 0.01uF cap by each power pin. Place a 4.7uF cap for each bank. C79 C79 0.01uF 0.01uF C66 C66 0.01uF 0.01uF C99 C99 0.01uF 0.01uF C64 C64 0.01uF 0.01uF C62 C62 0.01uF 0.01uF C81 C81 0.01uF 0.01uF C77 C77 0.01uF 0.01uF C98 C98 0.01uF 0.01uF C87 C87 0.01uF 0.01uF C78 C78 0.01uF 0.01uF C80 C80 0.01uF 0.01uF C82 C82 0.01uF 0.01uF C65 C65 0.01uF 0.01uF C63 C63 0.01uF 0.01uF C60 C60 4.7uF 4.7uF C109 C109 4.7uF 4.7uF D C D16 D17 D18 D19 D20 D21 D22 D23 DQM2 EMI_WE# CAS# RAS# SDRAM_CS# A14 A15 A10 A0 A1 A2 A3 3.3V IC7 IC7 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD DQML WE_N CAS_N RAS_N CS_N BA0 BA1 A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 VSS 53 DQ15 VSSQ 52 51 DQ14 50 DQ13 VDDQ 49 48 DQ12 47 DQ11 VSSQ 46 45 DQ10 44 DQ9 VDDQ 43 42 DQ8 41 VSS NC 40 DQMH 39 38 CLK 37 CKE 36 A12 35 A11 34 A9 33 A8 32 A7 31 A6 30 A5 29 A4 28 VSS SDRAM 512Mb SDRAM 512Mb 3.3V D31 D30 D29 D28 D27 D26 D25 D24 DQM3 CKE# DQM3 SDM_CLK_B1 CKE# A12 A11 A9 A8 A7 A6 A5 A4 SDRAM_CLK B R134 R134 330_DNP 330_DNP C97 C97 100pF_DNP 100pF_DNP DQM1 CKE# DQM1 SDM_CLK_B0 CKE# A12 A11 A9 A8 A7 A6 A5 A4 DQM2 SDRAM_CLK R132 R132 330_DNP 330_DNP C83 C83 100pF_DNP 100pF_DNP BANK0 5 4 3 2 Title Title Title Size Size Size B B B Date: Date: Date: Document Number Document Number Document Number <Doc> <Doc> <Doc> Thursday, December 25, 2008 Thursday, December 25, 2008 Thursday, December 25, 2008 Sheet Sheet Sheet 1 8 8 8 of of of 12 12 12 A Rev Rev Rev 1.0 1.0 1.0 </div> </div> </div> </div> </div> </div> <div class="article-actions clearfix"> <div class="shares"> <strong>分享到：</strong> <a href="javascript:;" data-url="https://www.ziliaoku.com/res/info_7538733acbd445a6870ca885ebda7bab.html" class="share-weixin" title="分享到微信"><i class="fa"></i><span class="share-popover"><span class="share-popover-inner" id="weixin-qrcode"><canvas width="80" height="80"></canvas></span></span></a> <a etap="share" data-share="weibo" class="share-tsina" title="分享到微博"><i class="fa"></i></a> <a etap="share" data-share="tqq" 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