CSR8645 数据手册 datasheet pdf.pdf

发布时间：2022-05-31 发布人：admin 分类：说明书资料大小：1.81M 资料格式：pdf 举报版权申诉

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BlueCore® CSR8645™ BGA

Ordering Information

Contacts

CSR8645 Stereo ROM Solution with aptX Development Kit Ordering Information

Device Details

CSR8645 Stereo ROM Solution with aptX Details

Functional Block Diagram

Document History

Status Information

Contents

List of Figures

List of Tables

List of Equations

1 Package Information

1.1 Pinout Diagram

1.2 Device Terminal Functions

1.3 Package Dimensions

1.4 PCB Design and Assembly Considerations

1.5 Typical Solder Reflow Profile

2 Bluetooth Modem

2.1 RF Ports

2.1.1 BT_RF

2.2 RF Receiver

2.2.1 Low Noise Amplifier

2.2.2 RSSI Analogue to Digital Converter

2.3 RF Transmitter

2.3.1 IQ Modulator

2.3.2 Power Amplifier

2.4 Bluetooth Radio Synthesiser

2.5 Baseband

2.5.1 Burst Mode Controller

2.5.2 Physical Layer Hardware Engine

3 Clock Generation

3.1 Clock Architecture

3.2 Input Frequencies and PS Key Settings

3.3 Crystal Oscillator: XTAL_IN and XTAL_OUT

3.3.1 Crystal Calibration

4 Bluetooth Stack Microcontroller

4.1 VM Accelerator

5 Kalimba DSP

6 Memory Interface and Management

6.1 Memory Management Unit

6.2 System RAM

6.3 Kalimba DSP RAM

6.4 Internal ROM

6.5 Serial Flash Interface

7 Serial Interfaces

7.1 USB Interface

7.2 UART Interface

7.3 Programming and Debug Interface

7.3.1 Multi-slave Operation

7.4 I²C EEPROM Interface

8 Interfaces

8.1 Programmable I/O Ports, PIO

8.2 Analogue I/O Ports, AIO

8.3 LED Drivers

9 Audio Interface

9.1 Audio Input and Output

9.2 Audio Codec Interface

9.2.1 Audio Codec Block Diagram

9.2.2 ADC

9.2.3 ADC Sample Rate Selection

9.2.4 ADC Audio Input Gain

9.2.5 ADC Pre-amplifier and ADC Analogue Gain

9.2.6 ADC Digital Gain

9.2.7 ADC Digital IIR Filter

9.2.8 DAC

9.2.9 DAC Sample Rate Selection

9.2.10 DAC Digital Gain

9.2.11 DAC Analogue Gain

9.2.12 DAC Digital FIR Filter

9.2.13 Microphone Input

9.2.14 Digital Microphone Inputs

9.2.15 Line Input

9.2.16 Output Stage

9.2.17 Mono Operation

9.2.18 Side Tone

9.2.19 Integrated Digital IIR Filter

9.3 PCM1 Interface

9.3.1 PCM Interface Master/Slave

9.3.2 Long Frame Sync

9.3.3 Short Frame Sync

9.3.4 Multi-slot Operation

9.3.5 GCI Interface

9.3.6 Slots and Sample Formats

9.3.7 Additional Features

9.3.8 PCM Timing Information

9.3.9 PCM_CLK and PCM_SYNC Generation

9.3.10 PCM Configuration

9.4 Digital Audio Interface (I²S)

10 Power Control and Regulation

10.1 1.8V Switch-mode Regulator

10.2 1.35V Switch-mode Regulator

10.3 1.8V and 1.35V Switch-mode Regulators Combined

10.4 Bypass LDO Linear Regulator

10.5 Low-voltage VDD_DIG Linear Regulator

10.6 Low-voltage VDD_AUX Linear Regulator

10.7 Low-voltage VDD_ANA Linear Regulator

10.8 Voltage Regulator Enable

10.9 External Regulators and Power Sequencing

10.10 Reset, RST#

10.10.1 Digital Pin States on Reset

10.10.2 Status After Reset

10.11 Automatic Reset Protection

11 Battery Charger

11.1 Battery Charger Hardware Operating Modes

11.1.1 Disabled Mode

11.1.2 Trickle Charge Mode

11.1.3 Fast Charge Mode

11.1.4 Standby Mode

11.1.5 Error Mode

11.2 Battery Charger Trimming and Calibration

11.3 VM Battery Charger Control

11.4 Battery Charger Firmware and PS Keys

11.5 External Mode

12 Example Application Schematic

13 Example Application Using Different Power Supply Configurations

14 Electrical Characteristics

14.1 Absolute Maximum Ratings

14.2 Recommended Operating Conditions

14.3 Input/Output Terminal Characteristics

14.3.1 Regulators: Available For External Use

14.3.1.1 1.8V Switch-mode Regulator

14.3.1.2 Combined 1.8V and 1.35V Switch-mode Regulator

14.3.1.3 Bypass LDO Regulator

14.3.2 Regulators: For Internal Use Only

14.3.2.1 1.35V Switch-mode Regulator

14.3.2.2 Low-voltage VDD_DIG Linear Regulator

14.3.2.3 Low-voltage VDD_AUX Linear Regulator

14.3.2.4 Low-voltage VDD_ANA Linear Regulator

14.3.3 Regulator Enable

14.3.4 Battery Charger

14.3.5 USB

14.3.6 Clocks

14.3.7 Stereo Codec: Analogue to Digital Converter

14.3.8 Stereo Codec: Digital to Analogue Converter

14.3.9 Digital

14.3.10 LED Driver Pads

14.3.11 Auxiliary ADC

14.3.12 Auxiliary DAC

14.4 ESD Protection

14.4.1 USB Electrostatic Discharge Immunity

15 Power Consumption

16 CSR Green Semiconductor Products and RoHS Compliance

17 Software

17.1 CSR8645 Stereo ROM Solution with aptX

17.1.1 Advanced Multipoint Support

17.1.2 A2DP Multipoint Support

17.1.3 Wired Audio Mode

17.1.4 USB Modes Including USB Audio Mode

17.1.5 Smartphone Applications (Apps)

17.1.6 Programmable Audio Prompts

17.1.7 CSR’s Intelligent Power Management

17.1.8 Proximity Pairing

17.1.9 Proximity Connection

17.2 6th Generation 2-mic CVC Audio Enhancements

17.2.1 Wind Noise Reduction

17.2.2 Dual-microphone Signal Separation

17.2.3 Noise Suppression

17.2.4 Acoustic Echo Cancellation

17.2.5 Comfort Noise Generator

17.2.6 Equalisation

17.2.7 Automatic Gain Control

17.2.8 Packet Loss Concealment

17.2.9 Adaptive Equalisation

17.2.10 Auxiliary Stream Mix

17.2.11 Clipper

17.2.12 Noise Dependent Volume Control

17.2.13 Fixed Gains

17.2.14 Frequency Enhanced Speech Intelligibility

17.3 Music Enhancements

17.3.1 Audio Decoders

17.3.2 aptX Decoder

17.3.3 Configurable EQ

17.3.4 Stereo Widening (S3D)

17.3.5 Volume Boost

17.4 CSR8645 Stereo ROM Solution with aptX Development Kit

18 Tape and Reel Information

18.1 Tape Orientation

18.2 Tape Dimensions

18.3 Reel Information

18.4 Moisture Sensitivity Level

19 Document References

Terms and Definitions

BlueCore® CSR8645™ BGA CSR8645 Stereo ROM Solution with aptX™ 2-mic CVC Audio Enhancement Fully Qualified Single-chip Bluetooth® v4.0 System Production Information CSR8645A04 Issue 6 Features ■ ■ 80MHz RISC MCU and 80MIPS Kalimba DSP Internal ROM, serial flash memory and EEPROM interfaces Stereo codec with 2 microphone inputs Radio includes integrated balun 5-band fully configurable EQ CSR's latest CVC technology for narrowband and wideband voice connections including wind noise reduction ■ ■ ■ ■ ■ ■ ■ ■ ■ Wideband speech supported by HFP v1.6 profile ■ Multipoint HFP connection to 2 phones for voice ■ Multipoint A2DP connection enables a headset and mSBC codec Voice recognition support for answering a call, enables true hands-free use (A2DP) connection to 2 A2DP source devices for music playback Secure simple pairing, CSR's proximity pairing and CSR's proximity connection Audio interfaces: I²S and PCM Serial interfaces: UART, USB 2.0 (full-speed), I²C and SPI aptX, SBC, MP3 and AAC decoder support Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 ■ ■ Wired audio support (USB and analogue) Support for smartphone/tablet applications ■ Integrated dual switch-mode regulators, linear ■ regulators and battery charger External crystal load capacitors not required for typical crystals 3 LED outputs ■ 68‑ball VFBGA 5.5 x 5.5 x 1mm 0.5mm pitch ■ ■ Green (RoHS compliant and no antimony or halogenated flame retardants) 2.4GHz Radio + Balun Baseband I/O ROM RAM MCU Kalimba DSP BT_RF XTAL ■ SPI/I2C UART/USB PIO Audio In /Out Debug SPI Serial Flash / EEPROM C S R 8 6 4 5 B G A D a t a S h e e t General Description BlueCore® CSR8645™ BGA is a product from CSR's Connectivity Centre. It is a single-chip radio and baseband IC for Bluetooth 2.4GHz systems including basic rate, EDR to 3Mbps and Bluetooth low energy. The integrated peripherals reduce the number of external components required, including no requirement for external codec, battery charger, SMPS, LDOs, balun or external program memory, ensuring minimum production costs. The battery charger architecture enables the CSR8645 BGA to independently operate from the charger supply, ensuring dependable operation for all battery conditions. Portable stereo speakers Applications Stereo headsets ■ ■ Wired stereo headsets and headphones ■ The enhanced Kalimba DSP coprocessor with 80MIPS supports enhanced audio and DSP applications. The integrated audio codec supports 2 channels of ADC, 2 digital microphone inputs and stereo output, as well as a variety of audio standards. See CSR Glossary at www.csrsupport.com. Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 1 of 114 CS-218182-DSP6 www.csr.com

Ordering Information Device Type Package Size Shipment Method Order Number CSR8645 Stereo ROM Solution with aptX Note: Contacts General information Information on this product Customer support for this product Details of compliance and standards Help with this document Information Description CSR8645 Stereo ROM Solution with aptX Development Kit Ordering CSR8645A04‑IBBC‑R CSR8645 BGA is a ROM-based device where the product code has the form CSR8645Axx. Axx is the specific ROM-variant, A04 is the ROM-variant for CSR8645 Stereo ROM Solution with aptX. Minimum order quantity is 2kpcs taped and reeled. Supply chain: CSR's manufacturing policy is to multisource volume products. For further details, contact your local sales account manager or representative. VFBGA‑68‑ball 5.5 x 5.5 x 1mm 0.5mm pitch (Pb free) Tape and reel Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 www.csr.com Sales@csr.com www.csrsupport.com Product.compliance@csr.com Comments@csr.com Order Number CSR8645 Stereo ROM Solution with aptX Audio Development Kit DK-8645-10064-1A C S R 8 6 4 5 B G A D a t a S h e e t Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 2 of 114 CS-218182-DSP6 www.csr.com

Device Details Bluetooth low energy ■ ■ Physical Interfaces ■ ■ ■ ■ ■ Bluetooth Receiver ■ No production trimming of external components Bluetooth v4.0 specification compliant Bluetooth Radio ■ On-chip balun (50Ω impedance) ■ ■ Bluetooth Transmitter ■ ■ 9dBm (typical) RF transmit power with level control Class 1, Class 2 and Class 3 support, no external PA or TX/RX switch required Dual-mode Bluetooth low energy radio Support for Bluetooth basic rate / EDR and low energy connections 3 Bluetooth low energy connections at the same time as basic rate A2DP -92dBm (typical) π/4 DQPSK receiver sensitivity and -82dBm (typical) 8DPSK receiver sensitivity Integrated channel filters Digital demodulator for improved sensitivity and co- channel rejection Real-time digitised RSSI available to application Fast AGC for enhanced dynamic range Channel classification for AFH Integrated Power Control and Regulation ■ ■ UART interface for debug USB 2.0 (full-speed) interface for audio and charger enumeration 1-bit SPI flash memory interface SPI interface for debug and programming I²C interface for EEPROM Up to 22 general purpose PIOs with 3 extra open- drain PIOs available when LED not used PCM and I²S interfaces 3 LED drivers (includes RGB) with PWM flasher independent of MCU Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 Automatic power switching to charger when present 2 high-efficiency switch-mode regulators with 1.8V and 1.35V outputs direct from battery supply 3.3V linear regulator for USB supply Low-voltage linear regulator for internal digital circuits Low-voltage linear regulator for internal analogue circuits Power-on-reset detects low supply voltage Power management includes digital shutdown and wake-up commands for ultra-low power modes Lithium ion / Lithium polymer battery charger Instant-on function automatically selects the power supply between battery and USB, which enables operation even if the battery is fully discharged Fast charging support up to 200mA with no external components Higher charge currents using external pass device Supports USB charger detection Support for thermistor protection of battery pack Support to enable end product design to PSE law: ■ ■ Design to JIS-C 8712/8714 (batteries) Testing based on IEEE 1725 ■ ■ ■ Enhanced Kalimba DSP coprocessor, 80MIPS, 24‑bit fixed point core 2 single-cycle MACs; 24 x 24-bit multiply and 56-bit accumulator 32-bit instruction word, dual 24-bit data memory 6K x 32-bit program RAM including 1K instruction cache for executing out of internal ROM 16K x 24-bit + 16K x 24-bit 2-bank data RAM ■ Audio Interfaces Audio codec with 2 high-quality dedicated ADCs ■ ■ Microphone bias generator and up to 2 analogue Fully integrated synthesiser requires no external VCO, varactor diode, resonator or loop filter Compatible with crystals 16MHz to 32MHz ■ ■ ■ Bluetooth Synthesiser ■ Battery Charger ■ ■ ■ Kalimba DSP ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ microphone inputs 2 digital microphone inputs (MEMS) Enhanced side-tone gain control Supported sample rates of 8, 11.025, 16, 22.05, 32, 44.1, 48 and 96kHz (DAC only) Auxiliary Features ■ Package Option ■ Crystal oscillator with built-in digital trimming 68‑ball VFBGA 5.5 x 5.5 x 1mm 0.5mm pitch Internal ROM Baseband and Software ■ ■ Memory protection unit supporting accelerated VM ■ 56KB internal RAM, enables full-speed data transfer, mixed voice/data and full piconet support Logic for forward error correction, header error control, access code correlation, CRC, demodulation, encryption bit stream generation, whitening and transmit pulse shaping Transcoders for A-law, µ-law and linear voice from host and A-law, µ-law and CVSD voice over air ■ ■ Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 3 of 114 CS-218182-DSP6 www.csr.com C S R 8 6 4 5 B G A D a t a S h e e t

CSR8645 Stereo ROM Solution with aptX Details ■ ■ ■ ■ ■ Wind noise reduction ■ ■ ■ Packet loss concealment Bit error concealment Automatic gain control and automatic volume control Frequency expansion for improved speech intelligibility Bluetooth v4.0 specification support HFP v1.6 wideband speech (HD voice ready) HSP v1.2 A2DP v1.2 AVRCP v1.4 Support for smartphone applications (apps) Bluetooth Profiles ■ ■ ■ ■ ■ ■ Improved Audio Quality CSR’s latest 2-mic CVC audio enhancements for narrowband and wideband connections including: ■ ■ 2-mic far-end audio enhancements Near-end audio enhancements (noise suppression and AEQ) CSR8600 ROM Series Configuration Tool Configures the CSR8645 stereo ROM solution with aptX software features: ■ ■ ■ ■ Bluetooth v4.0 specification features Reconnection policies, e.g. reconnect on power-on Audio features, including default volumes Button events: configuring button presses and durations for certain events, e.g. double press on PIO for last number redial LED indications for states, e.g. headset connected, and events, power on etc. Indication tones for events and ringtones HFP v1.6 supported features Battery divider ratios and thresholds, e.g. thresholds for battery low indication, full battery etc. Advanced Multipoint settings ■ CSR8645 Stereo ROM Solution with aptX Development Kit ■ Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 CSR8645 stereo ROM solution with aptX demonstrator board (DB-8645-10067-1A) Interface adapters and cables are available ■ ■ Works in conjunction with the CSR8600 ROM Series Configuration Tool and other supporting utilities ■ mSBC codec support for wideband speech Music Enhancements ■ Configurable 5-band EQ for music playback (rock, pop, classical, jazz, dance etc) aptX, SBC, MP3, AAC and Faststream decoder Stereo widening (S3D) Volume Boost Support for voice recognition Support for multi-language programmable audio prompts CSR's proximity pairing and CSR's proximity connection ■ ■ ■ Additional Functionality ■ ■ ■ Multipoint support for HFP connection to 2 handsets ■ ■ ■ ■ Multipoint support for A2DP connection to 2 A2DP for voice sources for music playback Talk-time extension C S R 8 6 4 5 B G A D a t a S h e e t Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 4 of 114 CS-218182-DSP6 www.csr.com

Functional Block Diagram I2C SPI_DEBUG PIO Serial Flash UART I2C/SPI Master /Slave Serial Flash Interface UART 4Mbps SPI (Debug) PIO Port DMA ports AUX ADC TX RX R G B USB XTAL AIO[0] Output 3.3V s t r o p A M D s t r o p A M D Bluetooth Modem Clock Generation USB v2.0 Full-speed Bluetooth Baseband LED PWM Control and Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 Low-voltage VDD_AUX Linear Regulator SENSE Low-voltage VDD_ANA Linear Regulator SENSE Low-voltage VDD_DIG Linear Regulator SENSE Voltage / Temperature 1.35V Switch- mode 1.8V Switch- mode and BIST Engine Digital Microphone PMU Interface VM Accelerator (MPU) High-quality DAC High-quality DAC 1.35V 1.35V High-quality ADC High-quality ADC PCM1 / I2S Inputs (MEMS) 0.85V to 1.2V Audio Interface PIO Port Monitor System RAM ROM PM DM1 DM2 Memory Management Unit 80MHz MCU 80MHz DSP Bluetooth Radio and Balun BT_RF C S R 8 6 4 5 B G A D a t a S h e e t MIC_AN MIC_AP MIC_BN MIC_BP SPKR_LN SPKR_LP SPKR_RN SPKR_RP VDD_AUDIO VDD_AUDIO_DRV MIC Bias MIC_BIAS Switch SENSE Li-ion Charger Bypass LDO VBAT VBAT_SENSE CHG_EXT VCHG Regulator Regulator SENSE SENSE 2 x D g i i t a l I M C s Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 D g i i t a l A u d o i I V R E G N _ D G I I V D D _ D G _ M E M V D D _ A N A _ R A D O I V D D _ A U X V D D _ A U X _ 1 V 8 L X L _ 1 V 8 S M P S _ 1 V 8 _ S E N S E L X _ 1 V 3 5 S M P S _ 1 V 3 5 _ S E N S E 3 V 3 _ U S B 3 . 4 . 0 4 4 7 0 0 0 - W T - G Page 5 of 114 CS-218182-DSP6 www.csr.com

Document History Revision Date Change Reason 1 2 3 4 5 6 24 AUG 11 13 SEP 11 Internal publication of this document. Original publication of this document. 28 SEP 11 17 JAN 12 Editorial updates. Production Information added. If you have any comments about this document, email comments@csr.com giving number, title and section with your feedback. 02 FEB 12 06 FEB 12 Internal release. Bluetooth v4.0 specfication added. Pre-production status. Power consumption figures added. Package Dimensions updated and pin configuration drawing removed. Editorial updates. Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 C S R 8 6 4 5 B G A D a t a S h e e t Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 6 of 114 CS-218182-DSP6 www.csr.com

Status Information The status of this Data Sheet is Production Information. CSR Product Data Sheets progress according to the following format: Advance Information Information for designers concerning CSR product in development. All values specified are the target values of the design. Minimum and maximum values specified are only given as guidance to the final specification limits and must not be considered as the final values. All detailed specifications including pinouts and electrical specifications may be changed by CSR without notice. Pre-production Information Pinout and mechanical dimension specifications finalised. All values specified are the target values of the design. Minimum and maximum values specified are only given as guidance to the final specification limits and must not be considered as the final values. All electrical specifications may be changed by CSR without notice. Production Information Final Data Sheet including the guaranteed minimum and maximum limits for the electrical specifications. Production Data Sheets supersede all previous document versions. Life Support Policy and Use in Safety-critical Applications CSR's products are not authorised for use in life-support or safety-critical applications. Use in such applications is done at the sole discretion of the customer. CSR will not warrant the use of its devices in such applications. CSR Green Semiconductor Products and RoHS Compliance CSR8645 BGA devices meet the requirements of Directive 2002/95/EC of the European Parliament and of the Council on the Restriction of Hazardous Substance (RoHS). CSR8645 BGA devices are also free from halogenated or antimony trioxide-based flame retardants and other hazardous chemicals. For more information, see CSR's Environmental Compliance Statement for CSR Green Semiconductor Products. Trademarks, Patents and Licences Unless otherwise stated, words and logos marked with ™ or ® are trademarks registered or owned by CSR plc or its affiliates. Bluetooth ® and the Bluetooth ® logos are trademarks owned by Bluetooth ® SIG, Inc. and licensed to CSR. Other products, services and names used in this document may have been trademarked by their respective owners. The publication of this information does not imply that any license is granted under any patent or other rights owned by CSR plc and/or its affiliates. CSR reserves the right to make technical changes to its products as part of its development programme. While every care has been taken to ensure the accuracy of the contents of this document, CSR cannot accept responsibility for any errors. Refer to www.csrsupport.com for compliance and conformance to standards information. Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 7 of 114 CS-218182-DSP6 www.csr.com C S R 8 6 4 5 B G A D a t a S h e e t

Contents 2.1.1 Prepared for Freddy Jensen - 3rdwave.dk - M onday, January 21, 2013 Ordering Information ....................................................................................................................................... 2 Contacts ................................................................................................................................................. 2 CSR8645 Stereo ROM Solution with aptX Development Kit Ordering Information ............................... 2 Device Details ................................................................................................................................................. 3 CSR8645 Stereo ROM Solution with aptX Details ......................................................................................... 4 Functional Block Diagram .............................................................................................................................. 5 Package Information ..................................................................................................................................... 14 1.1 Pinout Diagram .................................................................................................................................... 14 1.2 Device Terminal Functions .................................................................................................................. 15 1.3 Package Dimensions ........................................................................................................................... 21 1.4 PCB Design and Assembly Considerations ......................................................................................... 22 1.5 Typical Solder Reflow Profile ............................................................................................................... 22 Bluetooth Modem .......................................................................................................................................... 23 2.1 RF Ports ............................................................................................................................................... 23 BT_RF .................................................................................................................................... 23 2.2 RF Receiver ......................................................................................................................................... 23 Low Noise Amplifier ............................................................................................................... 23 RSSI Analogue to Digital Converter ....................................................................................... 23 2.3 RF Transmitter ..................................................................................................................................... 24 IQ Modulator .......................................................................................................................... 24 Power Amplifier ...................................................................................................................... 24 2.4 Bluetooth Radio Synthesiser ............................................................................................................... 24 2.5 Baseband ............................................................................................................................................. 24 Burst Mode Controller ............................................................................................................ 24 Physical Layer Hardware Engine ........................................................................................... 24 Clock Generation .......................................................................................................................................... 25 3.1 Clock Architecture ................................................................................................................................ 25 3.2 Input Frequencies and PS Key Settings .............................................................................................. 25 3.3 Crystal Oscillator: XTAL_IN and XTAL_OUT ....................................................................................... 25 Crystal Calibration .................................................................................................................. 25 Bluetooth Stack Microcontroller .................................................................................................................... 27 4.1 VM Accelerator .................................................................................................................................... 27 Kalimba DSP ................................................................................................................................................ 28 Memory Interface and Management ............................................................................................................. 29 6.1 Memory Management Unit .................................................................................................................. 29 6.2 System RAM ........................................................................................................................................ 29 6.3 Kalimba DSP RAM .............................................................................................................................. 29 6.4 Internal ROM ....................................................................................................................................... 29 6.5 Serial Flash Interface ........................................................................................................................... 29 Serial Interfaces ............................................................................................................................................ 30 7.1 USB Interface ...................................................................................................................................... 30 7.2 UART Interface .................................................................................................................................... 30 7.3 Programming and Debug Interface ...................................................................................................... 32 7.3.1 Multi-slave Operation ............................................................................................................. 32 2.5.1 2.5.2 2.2.1 2.2.2 2.3.1 2.3.2 3.3.1 1 2 3 4 5 6 7 Production Information This material is subject to CSR's non-disclosure agreement © Cambridge Silicon Radio Limited 2011-2012 Page 8 of 114 CS-218182-DSP6 www.csr.com C S R 8 6 4 5 B G A D a t a S h e e t

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