Front Matter
Preface
Table of Contents
1. Introduction and Background
1.1 Analog Integrated-Circuit Design
1.2 Notation, Symbology, and Terminology
1.3 Analog Signal Processing
1.4 Example of Analog VLSI Mixed-Signal Circuit Design
1.5 Summary
Problems
References
2. CMOS Technology
2.1 Basic MOS Semiconductor Fabrication Processes
2.1.1 Oxidation
2.1.2 Diffusion
2.1.3 Ion Implantation
2.1.4 Deposition
2.1.5 Etching
2.1.6 Chemical Mechanical Polishing
2.1.7 Photolithography
2.1.8 Twin-Well CMOS Fabrication Steps
2.2 The pn Junction
2.3 The MOS Transistor
2.4 Passive Components
2.4.1 Capacitors
2.4.2 Resistors
2.5 Other Considerations of CMOS Technology
2.6 Summary
Problems
References
3. CMOS Device Modeling
3.1 Simple MOS Large-Signal Model SPICE LEVEL 1
3.2 Other MOS Large-Signal Model Parameters
3.3 Small-Signal Model for the MOS Transistor
3.4 Computer Simulation Models
3.4.1 SPICE LEVEL 3 Model
3.4.1.1 Drain Current
3.4.1.2 Threshold Voltage
3.4.1.3 Saturation Voltage
3.4.1.4 Effective Mobility
3.4.1.5 Channel Length Modulation
3.4.2 BSIM 3v3 Model
3.5 Subthreshold MOS Model
3.6 SPICE Simulation of MOS Circuits
3.7 Summary
Problems
References
4. Analog CMOS Subcircuits
4.1 MOS Switch
4.2 MOS Diode/Active Resistor
4.3 Current Sinks and Sources
4.4 Current Mirrors
4.5 Current and Voltage References
4.6 Temperature-Independent References
4.6.1 Voltage References with Moderate Temperature Stability
4.6.2 Voltage References with Excellent Temperature Stability
4.7 Summary
4.8 Design Problems
Problems
References
5. CMOS Amplifiers
5.1 Inverters
5.1.1 Active Load Inverter
5.1.2 Current-Source Inverter
5.1.3 Push-Pull Inverter
5.1.4 Noise Analysis of Inverters
5.2 Differential Amplifiers
5.2.1 Large-Signal Analysis
5.2.2 Small-Signal Analysis
5.2.3 An Intuitive Method of Small-Signal Analysis
5.2.4 Slew Rate and Noise
5.2.5 Current-Source Load Differential Amplifier
5.2.6 Large-Signal Performance of the Differential Amplifier
5.2.7 Design of a CMOS Differential Amplifier with a Current-Mirror Load
5.3 Cascode Amplifiers
5.3.1 Large-Signal Characteristics
5.3.2 Small-Signal Characteristics
5.3.3 Frequency Response
5.3.4 Finding Roots by Inspection
5.3.5 Driving Amplifiers from a High-Resistance Source: The Miller Effect
5.3.6 Designing Cascode Amplifiers
5.4 Current Amplifiers
5.4.1 What is a Current Amplifier?
5.4.2 Single-Ended Input Current Amplifiers
5.4.3 Differential-Input Current Amplifiers
5.5 Output Amplifiers
5.5.1 Class A Amplifiers
5.5.2 Source Followers
5.5.3 Push-Pull Common-Source Amplifiers
5.6 Summary
Problems
References
6. CMOS Operational Amplifiers
6.1 Design of CMOS Op Amps
6.1.1 Ideal Op Amp
6.1.2 Characterization of Op Amps
6.1.3 Classification of Op Amps
6.1.4 Design of Op Amps
6.1.4.1 Decide on a Suitable Configuration
6.1.4.2 Determine the Type of Compensation Needed to Meet the Specifications
6.1.4.3 Design Device Sizes for Proper DC, AC, and Transient Performance
6.2 Compensation of Op Amps
6.2.1 Small-Signal Dynamics of a Two-Stage Op Amp
6.2.2 Miller Compensation of the Two-Stage Op Amp
6.2.3 Controlling the Right Half-Plane Zero
6.2.4 Feedforward Compensation
6.3 Design of the Two-Stage Op Amp
6.3.1 Design Procedure for the Two-Stage CMOS Op Amp
6.3.2 Nulling Resistor, Miller Compensation
6.3.3 Simulation of the Electrical Design
6.3.4 Physical Design of Analog Circuits
6.4 Power-Supply Rejection Ratio of Two-Stage Op Amps
6.4.1 Positive PSRR
6.4.2 Negative PSRR
6.5 Cascode Op Amps
6.5.1 Use of Cascoding in the First Stage
6.5.2 Use of Cascoding in the Second Stage
6.5.3 Folded-Cascode Op Amp
6.6 Simulation and Measurement of Op Amps
6.6.1 Simulation and Measurement Techniques
6.7 Summary
Problems
References
7. High-Performance CMOS Op Amps
7.1 Buffered Op Amps
7.1.1 Buffered Op Amps Using MOSFETs
7.1.2 Buffered Op Amp Using BJTs
7.2 High-Speed/Frequency CMOS Op Amps
7.2.1 Extending the Gain Bandwidth of the Conventional Op Amp
7.2.2 Switched Op Amps
7.2.3 Current Feedback Op Amps
7.2.4 Parallel Path Op Amps
7.3 Differential-Output Op Amps
7.3.1 Considerations of Differential Signal Processing
7.3.2 Differential-in, Differential-out Op Amp Topologies
7.3.3 Common-Mode Output Voltage Stabilization
7.4 Micropower Op Amps
7.4.1 Two-Stage Miller Op Amp Operating in Weak Inversion
7.4.2 Other Op Amps Operating in the Weak Inversion Region
7.4.3 Increasing the Output Current for Weak Inversion Operation
7.4.4 Increasing the Output Current for Strong Inversion Operation
7.5 Low-Noise Op Amps
7.5.1 Low-Noise Op Amps Using MOSFETs
7.5.2 Low-Noise Op Amps Using Both MOSFETs and Lateral BJTs
7.5.3 Chopper-Stabilized Op Amps
7.6 Low-Voltage Op Amps
7.6.1 Implications of Low-Voltage, Strong Inversion Operation
7.6.2 Low-Voltage Input Stages
7.6.3 Low-Voltage Bias and Load Circuits
7.6.4 Low-Voltage Op Amps
7.7 Summary
Problems
References
8. Comparators
8.1 Characterization of a Comparator
8.1.1 Static Characteristics
8.1.2 Dynamic Characteristics
8.2 Two-Stage, Open-Loop Comparators
8.2.1 Two-Stage, Open-Loop Comparator Performance
8.2.2 Initial Operating States for the Two-Stage, Open-Loop Comparator
8.2.3 Propagation Delay Time of a Slewing, Two-Stage, Open-Loop Comparator
8.2.4 Design of a Two-Stage, Open-Loop Comparator
8.3 Other Open-Loop Comparators
8.3.1 Push-Pull Output Comparators
8.3.2 Comparators That Can Drive Large Capacitive Loads
8.4 Improving the Performance of Open-Loop Comparators
8.4.1 Autozeroing Techniques
8.4.2 Comparator Using Hysteresis
8.5 Discrete-Time Comparators
8.5.1 Switched Capacitor Comparators
8.5.2 Regenerative Comparators
8.6 High-Speed Comparators
8.7 Summary
Problems
References
9. Digital-Analog and Analog-Digital Converters
9.1 Introduction and Characterization of Digital-Analog Converters
9.1.1 Static Characteristics of DACs
9.1.2 Dynamic Characteristics of DACs
9.1.3 Testing of DACs
9.2 Parallel Digital-Analog Converters
9.2.1 Current Scaling DACs
9.2.2 Voltage Scaling DACs
9.2.3 Charge Scaling DACs
9.3 Extending the Resolution of Parallel Digital-Analog Converters
9.3.1 Combination of Similar Scaled DACs
9.3.2 Combination of Differently Scaled DACs
9.4 Serial Digital-Analog Converters
9.4.1 Summary
9.5 Introduction and Characterization of Analog-Digital Converters
9.5.1 Introduction to ADCs
9.5.2 Static Characterization of ADCs
9.5.3 Dynamic Characteristics of ADCs
9.5.4 Sample-and-Hold Circuits
9.5.5 Testing of ADCs
9.5.6 Design of a Sample-and-Hold Circuit
9.6 Serial Analog-Digital Converters
9.7 Medium-Speed Analog-Digital Converters
9.7.1 Successive-Approximation ADCs
9.7.2 Pipeline Algorithmic ADC
9.7.3 Iterative Algorithmic ADC
9.7.4 Self-Calibrating ADCs
9.8 High-Speed Analog-Digital Converters
9.8.1 Parallel or Flash ADCs
9.8.2 Interpolating ADCs
9.8.3 Folding ADCs
9.8.4 Multiple-Bit Pipeline ADCs
9.8.5 Digital Error Correction
9.8.6 Time-Interleaved ADCs
9.9 Oversampling Converters
9.9.1 Delta-Sigma ADCs
9.9.1.1 Delta-Sigma Delta Sigma Modulators
9.9.1.2 Alternative Modulator Architectures
9.9.1.3 Decimation Filtering
9.9.1.4 Implementation of Delta-Sigma Modulators
9.9.2 Delta-Sigma DACs
9.9.3 Comparison of Delta-Sigma Data Converters
9.10 Summary
Problems
References
Homework Problem Answers
Appendices
Appendix A: Circuit Analysis for Analog Circuit Design
A.1 Analytic Techniques
Appendix B: Integrated Circuit Layout
B.1 Matching Concepts
B.2 MOS Transistor Layout
B.3 Resistor Layout
B.4 Capacitor Layout
B.5 Summary of Best Practices
B.6 Layout Rules
References
Appendix C: CMOS Device Characterization
C.1 Characterization of Simple Transistor Model
C.2 1/f Noise
C.3 Characterization of other Active Components
C.4 Characterization of Resistive Components
C.5 Characterization of Capacitance
References
Appendix D: Time and Frequency Domain Relationships for Second-Order Systems
D.1 General Second-Order System in the Frequency Domain
D.2 Low-Pass, Second-Order System in the Time Domain
D.3 Determination of Phase Margin and Crossover Frequency from zeta and omega_n
Appendix E: Switched Capacitor Circuits
E.1 Analysis Methods for Switched Capacitor Circuits
E.2 Switched Capacitor Amplifiers
E.2.1 Continuous Time Amplifiers
E.2.2 Charge Amplifiers
E.2.3 Switched Capacitor Amplifiers
E.2.4 Nonidealities of Switched Capacitor Circuits
E.3 Switched Capacitor Integrators
E.3.1 Continuous Time Integrators
E.3.2 Switched Capacitor Integrators
E.3.3 Nonideal Characteristics of Switched Capacitor Integrators
References
Index
#
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z