W25X10AL, W25X20AL, W25X40AL, W25X80AL
1M-BIT, 2M-BIT, 4M-BIT AND 8M-BIT
2.5V SERIAL FLASH MEMORY WITH
4KB SECTORS AND DUAL OUTPUT SPI
Publication Release Date: October 7 2009
- 1 - Revision D
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W25X10AL, W25X20AL, W25X40AL, W25X80AL
Table of Contents
Package Types
Chip Select (/CS)
Serial Data Output (DO)
Write Protect (/WP)
HOLD (/HOLD)
Serial Clock (CLK)
Serial Data Input / Output (DIO)
GENERAL DESCRIPTION
FEATURES
PIN CONFIGURATION SOIC 150-MIL
PIN CONFIGURATION SOIC 208-MIL
PIN CONFIGURATION PDIP 300-MIL
PAD CONFIGURATION WSON 6X5-MM
PIN DESCRIPTION
7.1
7.2
7.3
7.4
7.5
7.6
7.7
BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
9.1
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STATUS REGISTER
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.1.7
INSTRUCTIONS
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
BUSY
Write Enable Latch (WEL)
Block Protect Bits (BP2, BP1, BP0)
Top/Bottom Block Protect (TB)
Reserved Bits
Status Register Protect (SRP)
Status Register Memory Protection
Manufacturer and Device Identification
Instruction Set
Write Enable (06h)
Write Disable (04h)
Read Status Register (05h)
SPI Modes
Dual Output SPI
Hold Function
SPI OPERATIONS
9.1.1
9.1.2
9.1.3
WRITE PROTECTION
9.2.1
Write Protect Features
9.2
CONTROL AND STATUS REGISTERS
10.1
10.2
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W25X10AL, W25X20AL, W25X40AL, W25X80AL
Read Data (03h)
Fast Read (0Bh)
Fast Read Dual Output (3Bh)
Page Program (02h)
Sector Erase (20h)
Block Erase (D8h)
Chip Erase (C7h or 60h)
Power-down (B9h)
Release Power-down / Device ID (ABh)
Read Manufacturer / Device ID (90h)
JEDEC ID (9Fh)
10.2.6 Write Status Register (01h)
10.2.7
10.2.8
10.2.9
10.2.10
10.2.11
10.2.12
10.2.13
10.2.14
10.2.15
10.2.16
10.2.17
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ELECTRICAL CHARACTERISTICS
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11.1
Absolute Maximum Ratings
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11.2
Operating Ranges
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11.3
Endurance and Data Retention
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11.4
Power-up Timing and Write Inhibit Threshold
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11.5
DC Electrical Characteristics
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11.6
AC Measurement Conditions
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11.7
AC Electrical Characteristics
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11.8
AC Electrical Characteristics (cont’d)
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11.9
Serial Output Timing
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11.10
Input Timing
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11.11
Hold Timing
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PACKAGE SPECIFICATION
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12.1
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12.2
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12.3
12.4
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8-Pad WSON 6x5mm Cont’d. ................................................................................................... 42
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ORDERING INFORMATION
13.1
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REVISION HISTORY
8-Pin SOIC 150-mil (Package Code SN)
8-Pin SOIC 208-mil (Package Code SS)
8-Pin PDIP 300-mil (Package Code DA)
8-Contact 6x5mm WSON (Package Code ZP)
Valid Part Numbers and Top Side Marking
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Publication Release Date: October 7, 2009
- 3 - Revision D
W25X10AL, W25X20AL, W25X40AL, W25X80AL
1. GENERAL DESCRIPTION
The W25X10AL (1M-bit), W25X20AL (2M-bit), W25X40AL (4M-bit) and W25X80AL (8M-bit) Serial
Flash memories provide a storage solution for systems with limited space, pins and power. The 25X
series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for
code download applications as well as storing voice, text and data. The devices operate on a single
2.3V to 3.6V power supply with current consumption as low as 5mA active and 1µA for power-down.
All devices are offered in space-saving packages.
The W25X10AL/20AL/40AL/80AL array is organized into 512/1024/2048/4096 programmable pages
of 256-bytes each. Up to 256 bytes can be programmed at a time using the Page Program instruction.
Pages can be erased in groups of 16 (sector erase), groups of 256 (block erase) or the entire chip
(chip erase). The W25X10AL/20AL/40AL/80AL has 32/64/128/256 erasable sectors and 2/4/8/16
erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that
require data and parameter storage. (See figure 2.)
The W25X10AL/20AL/40AL/80AL supports the standard Serial Peripheral Interface (SPI), and a high
performance dual output SPI using four pins: Serial Clock, Chip Select, Serial Data I/O and Serial
Data Out. SPI clock frequencies of up to 50MHz are supported allowing equivalent clock rates of
100MHz when using the Fast Read Dual Output instruction. These transfer rates are comparable to
those of 8 and 16-bit Parallel Flash memories.
A Hold pin, Write Protect pin and programmable write protect, with top or bottom array control
features, provide further control flexibility. Additionally, the device supports JEDEC standard
manufacturer and device identification.
2. FEATURES
Family of Serial Flash Memories
– W25X10AL: 1M-bit / 128K-byte (131,072)
– W25X20AL: 2M-bit / 256K-byte (262,144)
– W25X40AL: 4M-bit / 512K-byte (524,288)
– W25X80AL: 8M-bit / 1M-byte (1,048,576)
– 256-bytes per programmable page
– Uniform 4K-byte Sectors / 64K-byte Blocks
SPI with Single or Dual Outputs
– Clock, Chip Select, Data I/O, Data Out
– Optional Hold function for SPI flexibility
Data Transfer up to 100M-bits / second
– Clock operation to 50MHz
– Fast Read Dual Output instruction
– Auto-increment Read capability
Flexible Architecture with 4KB sectors
– Sector Erase (4K-bytes)
– Block Erase (64K-byte)
– Page program up to 256 bytes <2ms
– Minimum 100,000 erase/write cycles
– 20-year retention
Low Power Consumption, Wide
Temperature Range
– Single 2.3 to 3.6V supply
– 5mA active current, 1µA Power-down (typ)
– -40° to +85°C operating range
Software and Hardware Write Protection
– Write-Protect all or portion of memory
– Enable/Disable protection with /WP pin
– Top or bottom array protection
Space Efficient Packaging
– 8-pin SOIC 150-mil(1)
– 8-pin SOIC 208-mil (W25X40AL/80AL)
– 8-pin PDIP 300-mil
– 8-pad WSON 6x5-mm
Note 1: See “Valid Part Number and Top Side Marking” Section, Note 2 for special ordering information.
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W25X10AL, W25X20AL, W25X40AL, W25X80AL
3. PIN CONFIGURATION SOIC 150-MIL
Figure 1a. W25X10AL, W25X20AL, W25X40AL and W25X80AL Pin Assignments, 8-pin SOIC (Package Code SN)
4. PIN CONFIGURATION SOIC 208-MIL
Figure 1b. W25X40AL and W25X80AL Pin Assignments, 8-pin SOIC (Package Code SS)
5. PIN CONFIGURATION PDIP 300-MIL
Figure 1c. W25X40AL and W25X80AL Pin Assignments, 8-pin PDIP (Package Code DA)
Publication Release Date: October 7, 2009
- 5 - Revision D
W25X10AL, W25X20AL, W25X40AL, W25X80AL
6. PAD CONFIGURATION WSON 6X5-MM
Figure 1d. W25X10AL, W25X20AL, W25X40AL and W25X80AL Pad Assignments, 8-pad WSON (Package Code ZP)
7. PIN DESCRIPTION
SOIC 150-mil, SOIC 208-mil, PDIP 300-mil, and WSON 6x5-mm
FUNCTION
PIN NAME
PIN NO.
1
2
3
4
5
6
7
8
/CS
DO
/WP
GND
DIO
CLK
/HOLD
VCC
I/O
I
O
I
I/O
I
I
Chip Select Input
Data Output
Write Protect Input
Ground
Data Input / Output
Serial Clock Input
Hold Input
Power Supply
- 6 -
W25X10AL, W25X20AL, W25X40AL, W25X80AL
7.1 Package Types
All parts are offered in an 8-pin plastic 150-mil width SOIC (package code SN)(1) as shown in figure 1a
and the 8-pad 6x5-mm WSON (package code ZP) as shown in figure 1c, and 1d respectively. The
W25X40AL and W25X80AL are offered in both the 8-pin plastic 208-mil width SOIC (package code
SS) as shown in figure 1b and the 8-pin 300-mil DIP (package code DA). Package diagrams and
dimensions are illustrated at the end of this datasheet.
7.2 Chip Select (/CS)
The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices
power consumption will be at standby levels unless an internal erase, program or status register cycle
is in progress. When /CS is brought low the device will be selected, power consumption will increase
to active levels and instructions can be written to and data read from the device. After power-up, /CS
must transition from high to low before a new instruction will be accepted. The /CS input must track
the VCC supply level at power-up (see “Write Protection” and figure 20). If needed a pull-up resister
on /CS can be used to accomplish this.
7.3 Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
7.4 Write Protect (/WP)
The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register
Protect (SRP) bit, a portion or the entire memory array can be hardware protected. The /WP pin is
active low.
7.5 HOLD (/HOLD)
The Hold (/HOLD) pin allows the device to be paused while it is actively selected. When /HOLD is
brought low, while /CS is low, the DO pin will be at high impedance and signals on the DIO and CLK
pins will be ignored (don’t care). When /HOLD is brought high, device operation can resume. The
/HOLD function can be useful when multiple devices are sharing the same SPI signals. (“See Hold
function”)
7.6 Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. (“See
SPI Operations”)
7.7 Serial Data Input / Output (DIO)
The SPI Serial Data Input/Output (DIO) pin provides a means for instructions, addresses and data to
be serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock
(CLK) input pin. The DIO pin is also used as an output when the Fast Read Dual Output instruction is
executed.
Note 1: See “Valid Part Number and Top Side Marking” Section, Note 2 for special ordering information.
Publication Release Date: October 7, 2009
- 7 - Revision D
W25X10AL, W25X20AL, W25X40AL, W25X80AL
8. BLOCK DIAGRAM
Figure 2. W25X10AL, W25X20AL, W25X40AL and W25X80AL Block Diagram
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