Using the Quartus® II
Software: Chip Planner
Online Training
© 2011 Altera Corporation—Confidential
Objectives
Perform design analysis
Work with Assignments
Perform Engineering Change Orders (ECOs)
© 2011 Altera Corporation—Confidential
2
Agenda
Chip Planner Overview
Design Analysis
Working with LogicLock Regions
Performing ECO Changes
© 2011 Altera Corporation—Confidential
3
Using the Quartus II
Software: Chip Planner
Overview
© 2011 Altera Corporation—Confidential
Chip Planner
Provides a visual display of device resources
Illustrates the arrangement of resource atoms in
the device architecture
Integrated platform
Design analysis
ECOs
© 2011 Altera Corporation—Confidential
5
Opening the Chip Planner
Quartus II Tools Menu
Chip Planner in Toolbar
© 2011 Altera Corporation—Confidential
6
Cross-Probing to Chip Planner
Cross-probing from
Project Navigator
Design files
Design Partition Planner
Compilation report
LogicLock Regions
Netlist Viewers
Message window
TimeQuest
Right-click Locate in Chip Planner
© 2011 Altera Corporation—Confidential
7
Chip Planner GUI
Editing mode
Chip View
Toolbar
Locate History
© 2011 Altera Corporation—Confidential
8
Layers
Settings
Selected
elements