Front-cover
Copyright
Prentice Hall Modern Semiconductor Design Series
Preface
About the Authors
Acknowledgments
Table of Contents
Chapter 1. Fundamentals of Digital Communications Systems
1.1. Introduction
1.2. System Architectures
1.3. Line Coding of Digital Signals
1.4. Electrical Signaling
1.5. Summary
1.6. References
Chapter 2. Jitter Basics
2.1. Definition of Jitter
2.2. Jitter as a Statistical Phenomenon
2.3. Total Jitter and Its Subcomponents
2.4. Analytical Solutions for Jitter Mixtures
2.5. The Dual Dirac Model
2.6. Summary
2.7. References
Chapter 3. Serial Communication Systems and Modulation Codes
3.1. Introduction
3.2. Encoders and Modulation Code Examples
3.3. Telephone System History and Evolution
3.4. SONET Design Requirements
3.5. Measuring the Band-Pass Response
3.6. Jitter
3.7. Measuring Power Supply Noise Immunity
3.8. Power Supply Distribution, Grounding, and Shielding
3.9. Measuring SONET Jitter
3.10. Modulation Codes for the Last Mile
3.11. Gigabit Ethernet
3.12. Summary
3.13. References
Chapter 4. Bit Error Ratio Testing
4.1. Basics of Bit Error Ratio Testing
4.2. Bit Error Ratio Statistics
4.3. Advanced BER Measurement Topics
4.4. Summary
4.5. References
Chapter 5. BERT Scan Measurements
5.1. Basics of BERT Scan Measurements
5.2. Sample Delay Scan
5.3. Sample Threshold Scan
5.4. Full Eye Scan
5.5. Spectral Jitter Decomposition
5.6. Summary
5.7. References
Chapter 6. Waveform Analysis—Real-Time Scopes
6.1. Principles of Operation of Real-Time Digital Oscilloscopes
6.2. Eye Diagram Analysis on Real-Time Instruments
6.3. Methods of Analyzing Individual Jitter Components
6.4. Analysis of Composite Jitter
6.5. Measurement Procedures
6.6. Interpreting Jitter Measurement Results
6.7. Summary
6.8. References
Chapter 7. Characterizing High-Speed Digital Communications Signals and Systems with the Equivalent-Time Sampling Oscilloscope
7.1. Sampling Oscilloscope Basics
7.2. Triggering the Oscilloscope
7.3. Oscilloscope Bandwidth and Sample Rate
7.4. Waveform Acquisition Process for the Sampling Oscilloscope
7.5. Sources of Instrumentation Noise
7.6. Parametric Analysis of Waveforms
7.7. The Effect of Oscilloscope Bandwidth on Waveform Results
7.8. Measurements of the Eye Diagram
7.9. Return-to-Zero Signals
7.10. Advanced Jitter Analysis
7.11. Summary
7.12. References
Chapter 8. High-Speed Waveform Analysis Using All-Optical Sampling
8.1. Introduction
8.2. Principles of Optical Sampling
8.3. Performance Measures of All-Optical Sampling Systems
8.4. Timebase Designs
8.5. Experimental Implementation and Key Building Blocks
8.6. Related Applications and Possible Future Directions
8.7. Summary
8.8. References
Chapter 9. Clock Synthesis, Phase Locked Loops, and Clock Recovery
9.1. Oscillators and Phase Noise
9.2. Phase Locked Loops and Clock Synthesis
9.3. Clock Data Recovery Circuits
9.4. PLL and Clock Recovery Dynamic Behavior
9.5. Measuring PLL Dynamics
9.6. Measuring Phase Noise and Jitter Spectrum
9.7. Summary
9.8. References
Chapter 10. Jitter Tolerance Testing
10.1. Introduction
10.2. Jitter Tolerance: Basic Measurement Method and Test Setup
10.3. Generation of Jitter Tolerance Test Signals
10.4. Jitter Tolerance Measurement Method and Test Setup
10.5. Summary
10.6. References
Chapter 11. Sensitivity Testing in Optical Digital Communications
11.1. Introduction: Optical Digital Receivers
11.2. The Basics of Optical Sensitivity Measurements
11.3. BER Calculations in Real Communications Systems
11.4. Summary
11.5. References
Chapter 12. Stress Tests in High-Speed Serial Links
12.1. The Need for High-Speed Serial Communication
12.2. Early High-Speed Optical Stressed-Eye Tests
12.3. BER versus OSNR
12.4. 10 Gigabit Ethernet: IEEE 802.3ae
12.5. The Advent of Electronic Dispersion Compensation
12.6. LRM Stress Testing (IEEE 802.3aq)
12.7. Future Standards
12.8. Summary
12.9. References
Chapter 13. Measurements on Interconnects
13.1. Measurements and Characterization of Interconnects
13.2. Modeling of System Performance from Measurements
13.3. Summary
13.4. References
Chapter 14. Frequency Domain Measurements
14.1. Introduction
14.2. Understanding Network Analyzer Hardware
14.3. Understanding S-Parameters
14.4. Error Correction and Calibration Methods
14.5. Graphical Representations
14.6. Example Devices
14.7. Summary
14.8. References
Chapter 15. Jitter and Signaling Testing for Chip-to-Chip Link Components and Systems
15.1. Introduction
15.2. Multiple Gigabit per Second Computer Chip-to-Chip I/O Link Architectures
15.3. Chip-to-Chip Link System BER and Signaling Tests
15.4. Testing Examples
15.5. Future Technology Trends for High-Speed Links
15.6. Summary
15.7. References
Appendix A. Pseudo-Random Binary Sequences
A.1. Introduction
A.2. Linear Feedback Shift Register Implementation
A.3. Properties of PRBS Sequences
A.4. PRBS-Based Test Patterns
A.5. Standardized PRBSs for Communication System Testing
A.6. Applications
A.7. References
Appendix B. Passive Elements for Test Setups
B.1. Introduction
B.2. Fixed Step Attenuators
B.3. Power Splitters and Dividers
B.4. Variable Delay Lines
B.5. Filters and Transition Time Converters
B.6. DC Blocks and Bias Ts
Appendix C. Coaxial Cables and Connectors
C.1. Electrical Properties of Coaxial Structures
C.2. Coaxial Cables
C.3. Coaxial Connectors
C.4. References
Appendix D. Supplemental Materials for Chapter 3
D.1. 8B10B Encoding Rules
D.2. Laser Power Controllers and Encoder Run Limits
D.3. AC Coupling Network Equations and Characteristics
D.4. Band-Pass Response of the Laser Transmitter
D.5. Characteristics of Power Supply Noise Test Systems
Index
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