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英飞凌xc166s v2指令集手册.pdf

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1 Introduction
2 Overviews
3 Summary
3.1 Data Addressing Modes
3.2 Branch Target Addressing Modes
3.3 Multiply and Divide Operations
3.4 Extension Operations
3.5 Branch Condition Codes
4 Encoding
5 Detailed Description
6 Addressing Modes
6.1 Short Addressing Modes
6.2 Long Addressing Mode
6.3 Indirect Addressing Modes
6.4 DPP Override Mechanism
6.5 Constants within Instructions
6.6 Instruction Range (#irang2)
6.7 Branch Target Addressing Modes
7 Instruction State Times
7.1 Time Unit Definitions
7.2 Minimum Execution Time
7.3 Additional State Times
8 Keyword Index
User’s Manual, V2.0, Mar. 2001 Instruction Set Manual for the C166 Family of Infineon 16-Bit Single-Chip Microcontrollers Microcontrollers N e v e r s t o p t h i n k i n g .
Edition 2001-03 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2001. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide. Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
User’s Manual, V2.0, Mar. 2001 Instruction Set Manual for the C166 Family of Infineon 16-Bit Single-Chip Microcontrollers Microcontrollers N e v e r s t o p t h i n k i n g .
C166 Family Microcontroller Instruction Set Manual Revision History: Previous Version: V2.0, 2001-03 Version 1.2, 12.97 Version 1.1, 09-95 03.94 Subjects (major changes since last revision) Converted to new company layout Overview- and summary-tables reformatted List of derivatives updated Description template added PSW image added Condition code table moved Note for MUL/DIV added Immediate data for byte instructions corrected to #data8 Note improved Description of operation corrected Description of division instructions improved Format description corrected Description improved Description of multiplication instructions improved Description of flags corrected “bitoff” for ESFRs added Section moved Target address for “rel” corrected General description improved Timing examples converted to 25 MHz Branch execution times corrected Keyword index introduced Page all 4 … 30 2 31 34 38 40 42ff 52f 62 72ff 85 86 101f 128 132 137 139 141 142ff 143 148f We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com
Table of Contents C166 Family Instruction Set Page 1 2 3 3.1 3.2 3.3 3.4 3.5 4 5 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 7 7.1 7.2 7.3 8 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Overviews . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Data Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Branch Target Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Multiply and Divide Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Extension Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Branch Condition Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Short Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 Long Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Indirect Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135 DPP Override Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137 Constants within Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 Instruction Range (#irang2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138 Branch Target Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139 Instruction State Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141 Time Unit Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142 Minimum Execution Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143 Additional State Times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 Keyword Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 User’s Manual V2.0, 2001-03
C166 Family Instruction Set Introduction Introduction 1 The Infineon C166 Family of 16-bit microcontrollers offers devices that provide various levels of peripheral performance and programmability. This allows to equip each specific application with the microcontroller that fits best to the required functionality and performance. Still the Infineon family concept provides an easy path to upgrade existing applications or to climb the next level of performance in order to realize a subsequent more sophisticated design. Two major characteristics enable this upgrade path to save and reuse almost all of the engineering efforts that have been made for previous designs: All family members are based on the same basic architecture All family members execute the same instructions (except for upgrades for new members) The fact that all members execute basically the same instructions saves know-how with respect to the understanding of the controller itself and also with respect to the used tools (assembler, disassembler, compiler, etc.). This instruction set manual provides an easy and direct access to the instructions of the Infineon 16-bit microcontrollers by listing them according to different criteria, and also unloads the technical manuals for the different devices from redundant information. This manual also describes the different addressing mechanisms and the relation between the logical addresses used in a program and the resulting physical addresses. There is also information provided to calculate the execution time for specific instructions depending on the used address locations and also specific exceptions to the standard rules. Description Levels In the following sections the instructions are compiled according to different criteria in order to provide different levels of precision: Cross Reference Tables summarize all instructions in condensed tables The Instruction Set Summary groups the individual instructions into functional groups The Opcode Table references the instructions by their hexadecimal opcode The Instruction Description describes each instruction in full detail User’s Manual 1 V2.0, 2001-03
C166 Family Instruction Set Introduction All instructions listed in this manual are executed by the following devices (new derivatives will be added to this list): C161K, C161O, C161PI C161CS, C161JC, C161JI C163 C164CI, C164SI, C164CM, C164SM C165 C167CR, C167SR C167CS A few instructions (ATOMIC and EXTended instructions) have been added for these devices and are not recognized by the following devices from the first generation of 16- bit microcontrollers: SAB 80C166, SAB 80C166W SAB 83C166, SAB 83C166W These differences are noted for each instruction, where applicable. User’s Manual 2 V2.0, 2001-03
C166 Family Instruction Set Overviews 2 The following compressed cross-reference tables quickly identify a specific instruction and provide basic information about it. Two ordering schemes are included: The hexadecimal opcode of a specific instruction can be quickly identified with the Overviews respective mnemonic using the first compressed cross-reference table. The mnemonics and addressing modes of the various instructions are listed in the second table. The table shows which addressing modes may be used with a specific instruction and also the instruction length depending on the selected addressing mode. This reference helps to optimize instruction sequences in terms of code size and/or execution time. Both ordering schemes (hexadecimal opcode and mnemonic) are provided in more detailed lists in the following sections of this manual. Note: The ATOMIC and EXTended instructions are not available in the SAB 8XC166(W) devices. They are marked in the cross-reference table. User’s Manual 3 V2.0, 2001-03
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