GL3227E Datasheet_102.pdf-资料库

Genesys Logic, Inc. GL3227E USB 3.1 Gen1 e•MMC Reader Controller Datasheet Revision 1.02 Jun. 28, 2019

GL3227E Datasheet Copyright Copyright © 2019 Genesys Logic, Inc. All rights reserved. No part of the materials shall be reproduced in any form or by any means without prior written consent of Genesys Logic, Inc. Ownership and Title Genesys Logic, Inc. owns and retains of its right, title and interest in and to all materials provided herein. Genesys Logic, Inc. reserves all rights, including, but not limited to, all patent rights, trademarks, copyrights and any other propriety rights. No license is granted hereunder. Disclaimer All Materials are provided “as is”. Genesys Logic, Inc. makes no warranties, express, implied or otherwise, regarding their accuracy, merchantability, fitness for any particular purpose, and non-infringement of intellectual property. In no event shall Genesys Logic, Inc. be liable for any damages, including, without limitation, any direct, indirect, consequential, or incidental damages. The materials may contain errors or omissions. Genesys Logic, Inc. may make changes to the materials or to the products described herein at anytime without notice. Genesys Logic, Inc. 12F., No. 205, Sec. 3, Beixin Rd., Xindian Dist. 231, New Taipei City, Taiwan Tel : (886-2) 8913-1888 Fax : (886-2) 6629-6168 http ://www.genesyslogic.com © 2019 Genesys Logic, Inc. - All rights reserved. Page 2 GLI Confidential

GL3227E Datasheet Revision History Revision Date Description 1.00 1.01 1.02 07/06/2017 First release 08/07/2017 Modify Table 3.1 - QFN48 Pin Description 06/28/2019 Update CH3.1 QFN 48 Pinout © 2019 Genesys Logic, Inc. - All rights reserved. Page 3 GLI Confidential

GL3227E Datasheet Table of Contents CHAPTER 1 GENERAL DESCRIPTION .......................................................................... 6 CHAPTER 2 FEATURES...................................................................................................... 7 CHAPTER 3 PIN ASSIGNMENT ........................................................................................ 8 3.1 QFN 48 Pinout ........................................................................................................... 8 3.2 Pin Description .......................................................................................................... 9 CHAPTER 4 BLOCK DIAGRAM ..................................................................................... 11 4.1 Super Speed and HS/FS PHY ................................................................................ 11 4.2 USB Controller and SSDEV ................................................................................... 11 4.3 EPFIFO .................................................................................................................... 11 4.4 MCU ......................................................................................................................... 11 4.5 MHE (Media Hardware Engine) ........................................................................... 12 4.6 Regulator ................................................................................................................. 12 CHAPTER 5 ELECTRICAL CHARACTERISTICS ...................................................... 13 5.1 Temperature Conditions ......................................................................................... 13 5.2 Operating Conditions ............................................................................................. 13 5.3 DC Characteristics .................................................................................................. 13 5.4 AC Characteristics of Reset Timing ...................................................................... 14 5.4.1 Reset Timing ..................................................................................................... 14 5.4.2 e•MMC Clock Frequency ................................................................................ 15 CHAPTER 6 SPI FLASH MEMORY SUPPORT LIST ................................................... 16 CHAPTER 7 PACKAGE DIMENSION ............................................................................ 17 CHAPTER 8 ORDERING INFORMATION .................................................................... 18 © 2019 Genesys Logic, Inc. - All rights reserved. Page 4 GLI Confidential

GL3227E Datasheet List of Figures Figure 3.1 - QFN48 Pinout Diagram ...................................................................................... 8 Figure 4.1 - QFN48 Functional Block Diagram................................................................... 11 Figure 5.1 - Timing Diagram of Reset Width ...................................................................... 14 Figure 7.1 - QFN 48 Pin Package .......................................................................................... 17 List of Tables Table 3.1 - QFN48 Pin Description ......................................................................................... 9 Table 5.1 - Absolute Maximum Ratings ............................................................................... 13 Table 5.2 - Operating Conditions .......................................................................................... 13 Table 5.3 - DC Characteristics .............................................................................................. 13 Table 6.1 - SPI Flash Memory Support List ........................................................................ 16 Table 8.1 - Ordering Information ......................................................................................... 18 © 2019 Genesys Logic, Inc. - All rights reserved. Page 5 GLI Confidential

GL3227E Datasheet CHAPTER 1 GENERAL DESCRIPTION The GL3227E is an USB 3.1 Gen1 eMMC RAID reader controller, it provides single LUN (Logic Unit Number) which can support e•MMC v5.0, 1/4/8bit data bus, High Speed SDR/ High Speed DDR/ HS200/ HS400 mode. The GL3227E integrates a high speed 8051 microprocessor and a high efficiency hardware engine for the best data transfer performance between USB and various memory card interfaces. It supports Serial Peripheral Interface (SPI) for firmware upgrade to SPI Flash Memory via USB port. It also integrates 5V to 3.3V and 3.3V to 1.8V/1.2V regulators and power MOSFETs which can reduce system BOM cost. © 2019 Genesys Logic, Inc. - All rights reserved. Page 6 GLI Confidential

GL3227E Datasheet CHAPTER 2 FEATURES  USB specification compliance - Comply with Universal Serial Bus 3.0 Specification rev. 1.0 (USB 3.1 GEN1) - Comply with Universal Serial Bus Specification rev. 2.0 (USB 2.0) - Comply with USB Mass Storage Class Specification rev. 1.0 - - Support USB Mass Storage Class Bulk-Only Transport (BOT) Support 1 device address and up to 3 endpoints: Control (0) / Bulk Data Read In (1) / Bulk Data Write Out (2) Support 5 Gbps SuperSpeed, 480 Mbps high-speed, and 12 Mbps full-speed transfer rates -  Integrated USB building blocks - USB2.0 transceiver macrocell (UTM), Serial Interface Engine (SIE), embedded Power-On Reset (POR)  Embedded high speed 8051 micro-controller  High efficient DMA hardware engine improves transfer rate between USB and flash card interfaces    Support Embedded MultiMediaCard - - High Speed SDR/ High Speed DDR/ HS200/ HS400 e•MMC specification v4.3/ v4.4/ v4.5/ v5.0 TM (e•MMC) Support Serial Peripheral Interface (SPI) for firmware upgrade to SPI Flash Memory via USB interface Support firmware stored in eMMC and upgrade firmware via USB interface  On-Chip 5V to 3.3V, 3.3V to 1.8V/1.2V regulator  On-Chip power MOSFETs for flash media cards power source  On-Chip 1.8V power source for VCCQ of e•MMC to operate as HS200/HS400 mode.  On board 25 MHz Crystal driver circuit            Support USB 2.0 LPM (Link Power Management) Support USB 3.0 LTM (Latency Tolerance Messaging) Support USB 3.0 U1/U2/U3 low power link state Pass the USB-IF Test Procedure for SuperSpeed product (TID: 341010008) Support two e•MMC chips by RAID 0 to increase the reading/writing performance Support one or two e•MMC chips by PCB co-layout, flexible for product design Support reset control of e•MMC for better compatibility Support PIA (Partition Information Area) in e•MMC to store customized VID/PID, USB device descriptor, SCSI inquiry and EEP configuration to save extra BOM cost Support programmable SSC (Spread Spectrum Clocking), clock rate in memory card interface for better EMI test effect Support Over-Current protection mechanism Support one power/access indicator LED (shared with SPI_MOSI)  Available in QFN48 pin package (6x6mm) © 2019 Genesys Logic, Inc. - All rights reserved. Page 7 GLI Confidential

GL3227E Datasheet CHAPTER 3 PIN ASSIGNMENT 3.1 QFN 48 Pinout Figure 3.1 - QFN48 Pinout Diagram © 2019 Genesys Logic, Inc. - All rights reserved. Page 8 GLI Confidential GL3227EQFN-48(Die Pad must be connected to ground)24232221201918171615141337383940414243444546474836 35 34 33 32 31 30 29 28 27 26 251 2 3 4 5 6 7 8 9 10 11 12eMMC1_D0eMMC1_D1VBUSDVDD33SD_VCCV33IDVDD12eMMC2_RSTZeMMC1_RSTZSPI_CSSPI_MISOSPI_CKeMMC2_D0eMMC2_CLKeMMC2_CMDeMMC2_D3eMMC2_D2VUHS2DVDD33eMMC2_D4eMMC2_D5eMMC2_D6eMMC2_D7eMMC2_DSeMMC2_D1eMMC1_DSeMMC1_D7eMMC1_D6eMMC1_D5eMMC1_D4DVDD33VUHS1eMMC1_D2eMMC1_D3eMMC1_CMDeMMC1_CLKDMDPAVDD33XIXOTXNTXPAVDD12RXNRXPRSTZSPI_MOSI/LED

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