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1. General Description
2. Features
3. System Applications
4. Application Examples
4.1. Unmanaged Media Converter
5. Block Diagram
6. Pin Assignments
6.1. Package Identification
6.2. Pin Assignments Table
7. Pin Descriptions
7.1. Media Dependent Interface Pins
7.2. High Speed Serial Interface Pins
7.3. General Purpose Interfaces
7.4. LED Pins
7.5. Configuration Strapping Pins
7.6. Management Interface Pins
7.7. Miscellaneous Pins
7.8. Embedded Switch Regulator Pins
7.9. Power and GND Pins
8. Physical Layer Functional Overview
8.1. MDI Interface
8.2. 1000Base-T Transmit Function
8.3. 1000Base-T Receive Function
8.4. 100Base-TX Transmit Function
8.5. 100Base-TX Receive Function
8.6. 10Base-T Transmit Function
8.7. 10Base-T Receive Function
8.8. Auto-Negotiation for UTP
8.9. Crossover Detection and Auto Correction
8.10. Polarity Correction
9. General Function Descriptions
9.1. Reset
9.1.1. Hardware Reset
9.1.2. Software Reset
9.1.2.1 CHIP_RESET
9.1.2.2 SOFT_RESET
9.2. IEEE 802.3x Full Duplex Flow Control
9.3. Half Duplex Flow Control
9.3.1. Back-Pressure Mode
9.4. Search and Learning
9.5. SVL and IVL/SVL
9.6. Illegal Frame Filtering
9.7. IEEE 802.3 Reserved Group Addresses Filtering Control
9.8. Broadcast/Multicast/Unknown DA Storm Control
9.9. Port Security Function
9.10. MIB Counters
9.11. Port Mirroring
9.12. VLAN Function
9.12.1. Port-Based VLAN
9.12.2. IEEE 802.1Q Tag-Based VLAN
9.12.3. Protocol-Based VLAN
9.13. QoS Function
9.13.1. Input Bandwidth Control
9.13.2. Priority Assignment
9.13.3. Priority Queue Scheduling
9.13.4. IEEE 802.1p/Q and DSCP Remarking
9.13.5. ACL-Based Priority
9.14. IEEE 802.1x Function
9.14.1. Port-Based Access Control
9.14.2. Authorized Port-Based Access Control
9.14.3. Port-Based Access Control Direction
9.14.4. MAC-Based Access Control
9.14.5. MAC-Based Access Control Direction
9.14.6. Optional Unauthorized Behavior
9.15. IEEE 802.1D Function
9.16. Realtek Cable Test (RTCT)
9.17. LED Indicators
9.18. Green Ethernet
9.18.1. Link-On and Cable Length Power Saving
9.18.2. Link-Down Power Saving
9.19. Regulator
10. Interface Descriptions
10.1. Master I2C for EEPROM Auto-load
10.2. Realtek Slave I2C-Like Interface for External CPU to Access the RTL8213B
10.3. Slave MII Management SMI Interface for External CPU to Access RTL8213B
11. Electrical Characteristics
11.1. Absolute Maximum Ratings
11.2. Recommended Operating Range
11.3. Thermal Characteristics
11.3.1. Assembly Description
11.3.2. Material Properties
11.3.3. Simulation Conditions
11.3.4. Thermal Performance of QFN-56 on PCB Under Still Air Convection
11.4. DC Characteristics
11.5. Switch Regulator
11.6. AC Characteristics
11.6.1. Master I2C for EEPROM Auto-load Interface Timing Characteristics
11.6.2. Slave I2C-like Mode Timing Characteristics
11.6.3. Slave MII Management SMI for External CPU Access Interface Timing Characteristics
11.6.4. SGMII/1000Base-X Characteristics
11.6.5. Power and Reset Characteristics
12. Mechanical Dimensions
13. Ordering Information
RTL8213B-CG 10/100/1000M Copper to 100Base-FX/1000Base-X Fiber Media Converter DRAFT DATASHEET (CONFIDENTIAL: Development Partners Only) Rev. 1.0 30 Dec. 2018 Track ID: xxxx-xxxx-xx Realtek Semiconductor Corp. No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan Tel.: +886-3-578-0211 Fax: +886-3-577-6047 www.realtek.com
COPYRIGHT RTL8213B DRAFT Datasheet ©2018 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp. DISCLAIMER Realtek provides this document ‘as is’, without warranty of any kind. Realtek may make improvements and/or changes in this document or in the product described in this document at any time. This document could include technical inaccuracies or typographical errors. TRADEMARKS Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners. USING THIS DOCUMENT This document is intended for the hardware and software engineer’s general information on the Realtek RTL8213B IC. Though every effort has been made to ensure that this document is current and accurate, more information may have become available subsequent to the production of this guide. ELECTROSTATIC DISCHARGE (ESD) WARNING This product can be damaged by Electrostatic Discharge (ESD). When handling, care must be taken. Damage due to inappropriate handling is not covered by warranty. Do not open the protective conductive packaging until you have read the following, and are at an approved anti-static workstation.  Use an approved anti-static mat to cover your work surface.  Use a conductive wrist strap attached to a good earth ground  Always discharge yourself by touching a grounded bare metal surface or approved anti-static mat before picking up an ESD-sensitive electronic component  If working on a prototyping board, use a soldering iron or station that is marked as ESD-safe  Always disconnect the microcontroller from the prototyping board when it is being worked on REVISION HISTORY Revision Release Date Summary 1.0 2018/12/30 First Release. Unmanaged Gigabit Media Converter ii Track ID: xxxx-xxxx-xx Rev. 1.0
Table of Contents RTL8213B DRAFT Datasheet 1. GENERAL DESCRIPTION .................................................................................................................................................... 1 2. 3. FEATURES ................................................................................................................................................................................. 3 SYSTEM APPLICATIONS ...................................................................................................................................................... 5 4. APPLICATION EXAMPLES .................................................................................................................................................. 5 4.1. UNMANAGED MEDIA CONVERTER ......................................................................................................................................................... 5 5. 6. BLOCK DIAGRAM .................................................................................................................................................................. 6 PIN ASSIGNMENTS ................................................................................................................................................................ 7 6.1. 6.2. PACKAGE IDENTIFICATION .................................................................................................................................................................. 7 PIN ASSIGNMENTS TABLE ................................................................................................................................................................... 8 7. PIN DESCRIPTIONS ............................................................................................................................................................... 9 7.1. 7.2. 7.3. 7.4. 7.5. 7.6. 7.7. 7.8. 7.9. MEDIA DEPENDENT INTERFACE PINS ................................................................................................................................................ 9 HIGH SPEED SERIAL INTERFACE PINS ............................................................................................................................................... 9 GENERAL PURPOSE INTERFACES ........................................................................................................................................................ 9 LED PINS ................................................................................................................................................................................................ 9 CONFIGURATION STRAPPING PINS .................................................................................................................................................. 10 MANAGEMENT INTERFACE PINS ..................................................................................................................................................... 11 MISCELLANEOUS PINS ...................................................................................................................................................................... 11 EMBEDDED SWITCH REGULATOR PINS .......................................................................................................................................... 12 POWER AND GND PINS ..................................................................................................................................................................... 12 8. PHYSICAL LAYER FUNCTIONAL OVERVIEW ........................................................................................................... 13 8.1. 8.2. 8.3. 8.4. 8.5. 8.6. 8.7. 8.8. 8.9. 8.10. MDI INTERFACE ................................................................................................................................................................................. 13 1000BASE-T TRANSMIT FUNCTION ............................................................................................................................................... 13 1000BASE-T RECEIVE FUNCTION................................................................................................................................................... 13 100BASE-TX TRANSMIT FUNCTION .............................................................................................................................................. 13 100BASE-TX RECEIVE FUNCTION.................................................................................................................................................. 14 10BASE-T TRANSMIT FUNCTION .................................................................................................................................................... 14 10BASE-T RECEIVE FUNCTION ....................................................................................................................................................... 14 AUTO-NEGOTIATION FOR UTP ........................................................................................................................................................ 14 CROSSOVER DETECTION AND AUTO CORRECTION ..................................................................................................................... 15 POLARITY CORRECTION .................................................................................................................................................................... 15 9. GENERAL FUNCTION DESCRIPTIONS ......................................................................................................................... 16 9.1. RESET .................................................................................................................................................................................................... 16 9.1.1. Hardware Reset ............................................................................................................................................................................ 16 Software Reset............................................................................................................................................................................... 16 9.1.2. IEEE 802.3X FULL DUPLEX FLOW CONTROL .............................................................................................................................. 17 HALF DUPLEX FLOW CONTROL ...................................................................................................................................................... 17 9.3.1. Back-Pressure Mode ................................................................................................................................................................... 17 SEARCH AND LEARNING ................................................................................................................................................................... 18 SVL AND IVL/SVL ........................................................................................................................................................................... 18 9.2. 9.3. 9.4. 9.5. Unmanaged Gigabit Media Converter iii Track ID: xxxx-xxxx-xx Rev. 1.0
RTL8213B DRAFT Datasheet 9.12.1. 9.12.2. 9.12.3. 9.13.1. 9.13.2. 9.13.3. 9.13.4. 9.13.5. 9.14. ILLEGAL FRAME FILTERING ............................................................................................................................................................. 18 9.6. IEEE 802.3 RESERVED GROUP ADDRESSES FILTERING CONTROL .......................................................................................... 19 9.7. BROADCAST/MULTICAST/UNKNOWN DA STORM CONTROL ................................................................................................... 20 9.8. PORT SECURITY FUNCTION .............................................................................................................................................................. 20 9.9. 9.10. MIB COUNTERS .................................................................................................................................................................................. 20 9.11. PORT MIRRORING ............................................................................................................................................................................... 20 9.12. VLAN FUNCTION ............................................................................................................................................................................... 21 Port-Based VLAN ................................................................................................................................................................... 21 IEEE 802.1Q Tag-Based VLAN .......................................................................................................................................... 21 Protocol-Based VLAN ........................................................................................................................................................... 21 9.13. QOS FUNCTION ................................................................................................................................................................................... 22 Input Bandwidth Control ...................................................................................................................................................... 22 Priority Assignment ............................................................................................................................................................... 22 Priority Queue Scheduling ................................................................................................................................................... 23 IEEE 802.1p/Q and DSCP Remarking .............................................................................................................................. 23 ACL-Based Priority ............................................................................................................................................................... 23 IEEE 802.1X FUNCTION ................................................................................................................................................................... 24 Port-Based Access Control .................................................................................................................................................. 24 Authorized Port-Based Access Control ............................................................................................................................. 24 Port-Based Access Control Direction ................................................................................................................................ 24 MAC-Based Access Control ................................................................................................................................................. 24 MAC-Based Access Control Direction .............................................................................................................................. 24 Optional Unauthorized Behavior ....................................................................................................................................... 24 9.15. IEEE 802.1D FUNCTION ................................................................................................................................................................... 25 9.16. REALTEK CABLE TEST (RTCT) ....................................................................................................................................................... 25 9.17. LED INDICATORS ............................................................................................................................................................................... 26 9.18. GREEN ETHERNET .............................................................................................................................................................................. 28 Link-On and Cable Length Power Saving ........................................................................................................................ 28 Link-Down Power Saving ..................................................................................................................................................... 28 9.19. REGULATOR ......................................................................................................................................................................................... 28 9.14.1. 9.14.2. 9.14.3. 9.14.4. 9.14.5. 9.14.6. 9.18.1. 9.18.2. 10. INTERFACE DESCRIPTIONS ............................................................................................................................................ 29 10.1. MASTER I2C FOR EEPROM AUTO-LOAD .................................................................................................................................... 29 10.2. REALTEK SLAVE I2C-LIKE INTERFACE FOR EXTERNAL CPU TO ACCESS THE RTL8213B ................................................ 30 SLAVE MII MANAGEMENT SMI INTERFACE FOR EXTERNAL CPU TO ACCESS RTL8213B .............................................. 31 10.3. 11. ELECTRICAL CHARACTERISTICS ................................................................................................................................ 32 11.1. ABSOLUTE MAXIMUM RATINGS...................................................................................................................................................... 32 RECOMMENDED OPERATING RANGE ............................................................................................................................................. 32 11.2. THERMAL CHARACTERISTICS .......................................................................................................................................................... 33 11.3. Assembly Description ............................................................................................................................................................ 33 Material Properties ................................................................................................................................................................ 33 Simulation Conditions ........................................................................................................................................................... 33 Thermal Performance of QFN-56 on PCB Under Still Air Convection.................................................................... 34 11.4. DC CHARACTERISTICS ...................................................................................................................................................................... 34 11.5. SWITCH REGULATOR ......................................................................................................................................................................... 34 11.6. AC CHARACTERISTICS ...................................................................................................................................................................... 35 11.3.1. 11.3.2. 11.3.3. 11.3.4. Unmanaged Gigabit Media Converter iv Track ID: xxxx-xxxx-xx Rev. 1.0
RTL8213B DRAFT Datasheet 11.6.1. 11.6.2. 11.6.3. 11.6.4. 11.6.5. Master I2C for EEPROM Auto-load Interface Timing Characteristics .................................................................... 35 Slave I2C-like Mode Timing Characteristics ................................................................................................................... 36 Slave MII Management SMI for External CPU Access Interface Timing Characteristics ................................... 37 SGMII/1000Base-X Characteristics .................................................................................................................................. 38 Power and Reset Characteristics ....................................................................................................................................... 40 12. MECHANICAL DIMENSIONS ............................................................................................................................................ 41 13. ORDERING INFORMATION .............................................................................................................................................. 42 Unmanaged Gigabit Media Converter v Track ID: xxxx-xxxx-xx Rev. 1.0
List of Tables RTL8213B DRAFT Datasheet TABLE 1. PIN ASSIGNMENTS TABLE ................................................................................................................................................................... 8 TABLE 2. MEDIA DEPENDENT INTERFACE PINS ............................................................................................................................................... 9 TABLE 3. HIGH SPEED SERIAL INTERFACE PINS ............................................................................................................................................... 9 TABLE 4. GENERAL PURPOSE INTERFACES PINS .............................................................................................................................................. 9 TABLE 5. LED PINS ............................................................................................................................................................................................. 10 TABLE 6. CONFIGURATION STRAPPING PINS .................................................................................................................................................. 10 TABLE 7. MANAGEMENT INTERFACE PINS ..................................................................................................................................................... 11 TABLE 8. MISCELLANEOUS PINS ........................................................................................................................................................................... 11 TABLE 9. EMBEDDED SWITCH REGULATOR PINS .............................................................................................................................................. 12 TABLE 10. POWER AND GND PINS ....................................................................................................................................................................... 12 TABLE 11. MEDIA DEPENDENT INTERFACE PIN MAPPING .............................................................................................................................. 15 TABLE 12. RESERVED MULTICAST ADDRESS CONFIGURATION TABLE ........................................................................................................ 19 TABLE 13. LED DEFINITIONS ................................................................................................................................................................................ 26 TABLE 14. SLAVE MII MANAGEMENT SMI ACCESS FORMAT ........................................................................................................................ 31 TABLE 15. ABSOLUTE MAXIMUM RATINGS ........................................................................................................................................................ 32 TABLE 16. RECOMMENDED OPERATING RANGE................................................................................................................................................ 32 TABLE 17. ASSEMBLY DESCRIPTION .................................................................................................................................................................... 33 TABLE 18. MATERIAL PROPERTIES ....................................................................................................................................................................... 33 TABLE 19. SIMULATION CONDITIONS .................................................................................................................................................................. 33 TABLE 20. THERMAL PERFORMANCE OF QFN-56 ON PCB UNDER STILL AIR CONVECTION ................................................................. 34 TABLE 21. DC CHARACTERISTICS ........................................................................................................................................................................ 34 TABLE 22. SWITCH REGULATOR ........................................................................................................................................................................... 34 TABLE 23. MASTER I2C FOR EEPROM AUTO-LOAD TIMING CHARACTERISTICS .................................................................................... 35 TABLE 24. SLAVE I2C-LIKE MODE TIMING CHARACTERISTICS ..................................................................................................................... 36 TABLE 25. MDIO TIMING CHARACTERISTICS AND REQUIREMENT .............................................................................................................. 37 TABLE 26. SGMII/1000BASE-X DIFFERENTIAL TRANSMITTER CHARACTERISTICS ................................................................................. 38 TABLE 27. SGMII/1000BASE-X DIFFERENTIAL RECEIVER CHARACTERISTICS ........................................................................................ 39 TABLE 28. POWER AND RESET CHARACTERISTICS ........................................................................................................................................... 40 TABLE 29. ORDERING INFORMATION ................................................................................................................................................................... 42 Unmanaged Gigabit Media Converter vi Track ID: xxxx-xxxx-xx Rev. 1.0
List of Figures RTL8213B DRAFT Datasheet FIGURE 1. UNMANAGED MEDIA CONVERTER ................................................................................................................................................... 5 FIGURE 2. BLOCK DIAGRAM ................................................................................................................................................................................ 6 FIGURE 3. PIN ASSIGNMENTS (QFN-40)............................................................................................................................................................ 7 FIGURE 4. CONCEPTUAL EXAMPLE OF POLARITY CORRECTION ................................................................................................................ 15 FIGURE 5. PROTOCOL-BASED VLAN FRAME FORMAT AND FLOW CHART ............................................................................................. 22 FIGURE 6. PULL-UP AND PULL-DOWN OF LED PINS FOR SINGLE-COLOR LED .................................................................................... 27 FIGURE 7. PULL-UP AND PULL-DOWN OF LED PINS FOR BI-COLOR LED ............................................................................................. 27 FIGURE 8. SMI START AND STOP COMMAND ................................................................................................................................................. 29 FIGURE 9. MASTER I2C FOR EEPROM AUTO-LOAD INTERFACE CONNECTION EXAMPLE ................................................................. 29 FIGURE 10. 8-BIT EEPROM SEQUENTIAL READ .............................................................................................................................................. 29 FIGURE 11. REALTEK SLAVE I2C-LIKE FOR EXTERNAL CPU ACCESS INTERFACE CONNECTION EXAMPLE........................................ 30 FIGURE 12. REALTEK SLAVE I2C-LIKE INTERFACE WRITE COMMAND ........................................................................................................ 30 FIGURE 13. REALTEK SLAVE I2C-LIKE INTERFACE READ COMMAND .......................................................................................................... 30 FIGURE 14. SLAVE MII MANAGEMENT SMI INTERFACE CONNECTION EXAMPLE ..................................................................................... 31 FIGURE 15. MASTER I2C FOR EEPROM AUTO-LOAD TIMING CHARACTERISTICS ................................................................................... 35 FIGURE 16. SCK/SDA POWER ON TIMING ......................................................................................................................................................... 35 FIGURE 17. SLAVE I2C-LIKE MODE TIMING CHARACTERISTICS .................................................................................................................... 36 FIGURE 18. MDIO SOURCED BY THE MASTER .................................................................................................................................................. 37 FIGURE 19. MDIO SOURCED BY THE RTL8213B (SLAVE) ............................................................................................................................. 37 FIGURE 20. SGMII/1000BASE-X DIFFERENTIAL TRANSMITTER EYE DIAGRAM ....................................................................................... 38 FIGURE 21. SGMII/1000BASE-X DIFFERENTIAL RECEIVER EYE DIAGRAM .............................................................................................. 39 FIGURE 22. POWER AND RESET CHARACTERISTICS .......................................................................................................................................... 40 Unmanaged Gigabit Media Converter vii Track ID: xxxx-xxxx-xx Rev. 1.0
1. General Description The RTL8213B-CG is a QFN40, high-performance media converter featuring low-power integrated 1-port Giga-PHY that support 1000Base-T, 100Base-TX, and 10Base-T. RTL8213B DRAFT Datasheet For specific applications, the RTL8213B supports one SerDes interface that could be configured as a SGMII/1000Base-X/100FX interface. The RTL8213B integrates a SRAM for packet buffering, non- blocking switch fabric, and internal register management into a single CMOS device. Only a 25MHz crystal is required; an optional EEPROM is offered for internal register configuration. The embedded packet storage SRAM in the RTL8213B features superior memory management technology to efficiently utilize memory space. The RTL8213B integrates a 2048-entry look-up table with a 4-way XOR Hashing algorithm for address searching and learning. The table provides read/write access from the Slave I2C-like serial Interface, or Slave Media Independent Interface Management (MIIM) Interface. Each of the entries can be configured as a static entry. Normal entry aging time is between 200 and 400 seconds. Sixteen Filtering Databases are used to provide Independent VLAN Learning and Shared VLAN Learning (IVL/SVL) functions. The Extension GMAC1 of the RTL8213B implements a 1000Base-X/100Base-FX interface. The RTL8213B supports standard 802.3x flow control frames for full duplex, and optional backpressure for half duplex. It determines when to invoke the flow control mechanism by checking the availability of system resources, including the packet buffers and transmitting queues. The RTL8213B supports broadcast/multicast output dropping, and will forward broadcast/multicast packets to non-blocked ports only. For IP multicast applications, the RTL8213B can forward IPv4 IGMPv1/v2/v3 and IPv6 MLDv1/v2 snooping protocol packets. In order to support flexible traffic classification, the RTL8213B supports 48-entry ACL rule check and multiple actions options. Each port can optionally enable or disable the ACL rule check function. The ACL rule key can be based on packet physical port, Layer2, Layer3, and Layer4 information. When an ACL rule matches, the action taken is configurable to Drop/Permit/Redirect/Mirror, change priority value in 802.1q/Q tag, force output tag format and rate policing. The rate policing mechanism supports from 8Kbps to 1Gbps (in 8Kbps steps). In Bridge operation the RTL8213B supports 16 sets of port configurations: disable, block, learning, and forwarding for Spanning Tree Protocol and Multiple Spanning Tree Protocol. To meet security and management application requirements, the RTL8213B supports IEEE 802.1x Port-based/MAC-based Access Control. A 1-set Port Mirroring function is configured to mirror traffic (RX, TX, or both) appearing on one of the switch’s ports. Support is provided on each port for multiple RFC MIB Counters, for easy debug and diagnostics. To improve real-time and multimedia networking applications, the RTL8213B supports eight priority assignments for each received packet. These are based on (1) Port-based priority; (2) 802.1p/Q VLAN tag priority; (3) DSCP field in IPv4/IPv6 header; and (4) ACL-assigned priority. Each output port supports a weighted ratio of eight priority queues to fit bandwidth requirements in different applications. The input bandwidth control function helps limit per-port traffic utilization. There is one leaky bucket for average packet rate control for each queue of all ports. Queue scheduling algorithm can use Strict Priority (SP) or Weighted Fair Queue (WFQ) or Weighted Round Robin (WRR) or mixed. Unmanaged Gigabit Media Converter 1 Track ID: xxxx-xxxx-xx Rev. 1.0
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