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KCU116原理图 PDF版本.pdf

发布时间：2022-06-14 发布人：admin 分类：说明书 资料大小：3.14M 资料格式：pdf 举报 版权申诉
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    HW-U1-KCU116_REV1_0 Sheet Title Page (1)
    HW-U1-KCU116_REV1_0 Sheet Block Diagram (2)
    HW-U1-KCU116_REV1_0 Sheet FPGA Bank 0 (3)
    HW-U1-KCU116_REV1_0 Sheet SYSMON Hdr INIT DONE LED QSPI0 (4)
    HW-U1-KCU116_REV1_0 Sheet FPGA Banks 64 FMC (5)
    HW-U1-KCU116_REV1_0 Sheet FPGA Bank 65 HDMI QSPI1 SGMII (6)
    HW-U1-KCU116_REV1_0 Sheet FPGA Banks 66 67 DDR4 (7)
    HW-U1-KCU116_REV1_0 Sheet FPGA Banks 86 - GPIO and CLOCKS (8)
    HW-U1-KCU116_REV1_0 Sheet FPGA Banks 87 PMOD 84 UART ZSFP SMA (9)
    HW-U1-KCU116_REV1_0 Sheet FPGA GTY224 GTY225 PCIE (10)
    HW-U1-KCU116_REV1_0 Sheet FPGA GTY226 - ZSFP GTY227 - FMC DP (11)
    HW-U1-KCU116_REV1_0 Sheet FPGA Power 1 (12)
    HW-U1-KCU116_REV1_0 Sheet FPGA Power 2 (13)
    HW-U1-KCU116_REV1_0 Sheet FPGA GND (14)
    HW-U1-KCU116_REV1_0 Sheet FPGA Decoupling 1 (15)
    HW-U1-KCU116_REV1_0 Sheet FPGA Decoupling 2 (16)
    HW-U1-KCU116_REV1_0 Sheet JTAG Headers (17)
    HW-U1-KCU116_REV1_0 Sheet DDR4 Data [15-0] (18)
    HW-U1-KCU116_REV1_0 Sheet DDR4 Data [31:16] (19)
    HW-U1-KCU116_REV1_0 Sheet PCIE EDGE CONNECTOR 8-LANE (20)
    HW-U1-KCU116_REV1_0 Sheet FMC+ HPC0 Header Rows A B C D (21)
    HW-U1-KCU116_REV1_0 Sheet FMC+ HPC0 Header Rows E F G (22)
    HW-U1-KCU116_REV1_0 Sheet FMC+ HPC0 Header Rows H J K (23)
    HW-U1-KCU116_REV1_0 Sheet FMC+ HPC0 Header_GND (24)
    HW-U1-KCU116_REV1_0 Sheet Blank (25)
    HW-U1-KCU116_REV1_0 Sheet ZSFP0 and ZSFP1 (26)
    HW-U1-KCU116_REV1_0 Sheet ZSFP2 and ZSPF3 (27)
    HW-U1-KCU116_REV1_0 Sheet SFP Clock Recovery (28)
    HW-U1-KCU116_REV1_0 Sheet HDMI CODEC (29)
    HW-U1-KCU116_REV1_0 Sheet HDMI CONNECTOR (30)
    HW-U1-KCU116_REV1_0 Sheet System Controller 1 (31)
    HW-U1-KCU116_REV1_0 Sheet System Controller 2 (32)
    HW-U1-KCU116_REV1_0 Sheet System Controller 3 (33)
    HW-U1-KCU116_REV1_0 Sheet System Controller 4 - Config DIP (34)
    HW-U1-KCU116_REV1_0 Sheet Micro SD Card Connector (35)
    HW-U1-KCU116_REV1_0 Sheet Fixed Clocks (36)
    HW-U1-KCU116_REV1_0 Sheet MGT Programmable Clock - SMAs (37)
    HW-U1-KCU116_REV1_0 Sheet Dual USB UART - EEPROM (38)
    HW-U1-KCU116_REV1_0 Sheet SGMII 10/100/1000 Ethernet PHY (39)
    HW-U1-KCU116_REV1_0 Sheet Buttons - Switches - LEDs (40)
    HW-U1-KCU116_REV1_0 Sheet PMODs (41)
    HW-U1-KCU116_REV1_0 Sheet I2C MUXes - IO Expander (42)
    HW-U1-KCU116_REV1_0 Sheet PMBUS Header - I2C Level Shifters (43)
    HW-U1-KCU116_REV1_0 Sheet 12V Power Connectors Switch (44)
    HW-U1-KCU116_REV1_0 Sheet VCCINT 40A Regulator (45)
    HW-U1-KCU116_REV1_0 Sheet VCCBRAM 6A Regulator (46)
    HW-U1-KCU116_REV1_0 Sheet VCCAUX 3A Regulator (47)
    HW-U1-KCU116_REV1_0 Sheet VCC1V2 2A Regulator (48)
    HW-U1-KCU116_REV1_0 Sheet VCC1V8 3A Regulator (49)
    HW-U1-KCU116_REV1_0 Sheet VCC3V3 5A Regulator (50)
    HW-U1-KCU116_REV1_0 Sheet VADJ_FMC 10A Regulator (51)
    HW-U1-KCU116_REV1_0 Sheet MGTAVCC 6A Regulator (52)
    HW-U1-KCU116_REV1_0 Sheet MGTAVTT 6A Regulator (53)
    HW-U1-KCU116_REV1_0 Sheet MGTVCCAUX 1A Regulator (54)
    HW-U1-KCU116_REV1_0 Sheet UTIL_3V3 20A Regulator (55)
    HW-U1-KCU116_REV1_0 Sheet SYS_5V0 1A Regulator (56)
    HW-U1-KCU116_REV1_0 Sheet SYS_2V5 SYS_1V8 SYS_1V0 Regulators (57)
    HW-U1-KCU116_REV1_0 Sheet DDR4 Termination Supply (58)
    HW-U1-KCU116_REV1_0 Sheet Power Status LEDs - Fan Ctrl (59)
    HW-U1-KCU116_REV1_0 Sheet Mechanical Components (60)
    D C B A 4 3 2 1 HW-U1-KCU116 Evaluation Board (XCKU5P-FFVB676) DISCLAIMER: XILINX IS DISCLOSING THIS USER GUIDE, MANUAL, RELEASE NOTE, SCHEMATIC, AND/OR SPECIFICATION (THE “DOCUMENTATION”) TO YOU SOLELY FOR USE IN THE DEVELOPMENT OF DESIGNS TO OPERATE WITH XILINX HARDWARE DEVICES. YOU MAY NOT REPRODUCE, DISTRIBUTE, REPUBLISH, DOWNLOAD, DISPLAY, POST, OR TRANSMIT THE DOCUMENTATION IN ANY FORM OR BY ANY MEANS INCLUDING, BUT NOT LIMITED TO, ELECTRONIC, MECHANICAL, PHOTOCOPYING, RECORDING, OR OTHERWISE, WITHOUT THE PRIOR WRITTEN CONSENT OF XILINX. XILINX EXPRESSLY DISCLAIMS ANY LIABILITY ARISING OUT OF YOUR USE OF THE DOCUMENTATION. XILINX RESERVES THE RIGHT, AT ITS SOLE DISCRETION, TO CHANGE THE DOCUMENTATION WITHOUT NOTICE AT ANY TIME. XILINX ASSUMES NO OBLIGATION TO CORRECT ANY ERRORS CONTAINED IN THE DOCUMENTATION, OR TO ADVISE YOU OF ANY CORRECTIONS OR UPDATES. XILINX EXPRESSLY DISCLAIMS ANY LIABILITY IN CONNECTION WITH TECHNICAL SUPPORT OR ASSISTANCE THAT MAY BE PROVIDED TO YOU IN CONNECTION WITH THE DOCUMENTATION. THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION. THE XILINX HARDWARE, FPGA AND CPLD DEVICES REFERRED TO HEREIN ("PRODUCTS") ARE SUBJECT TO THE TERMS AND CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE, OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY OR PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO APPLICABLE LAWS AND REGULATIONS. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. Title Page TITLE: Title Page SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 1 OF 60 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX VER: REV: DRAWN BY: 1.0 01 DN 4 3 2 1 D C B A
    D C B A 4 3 2 1 PB, DIP SWITCHES LEDS LEDS (Page 40) PMOD Page 40 Page 41 DDR4 Comp. Memory 32-bit: 2 x 16-bit MT40A256M16GE-075E Pages 18-19 12VDC Page 44 FMC0 DP[0:3] Page 21 ZSFP x4 CONNECTORS ZSFP 1x4 Cage Pages 26-27 8-LANE PCIE EDGE CONNECTOR Page 20 GTY227 GTY226 86 HD 87 HD 67 HP U1 0 GTY225 XCKU5P-FFVB676 GTY224 0 84 HD 66 HP 65 HP 64 HP INIT,DONE LEDs QSPI0 SYSMON HDR. Page 4 PROG. PB Page 3 Ethernet PHY Page 39 JTAG CONN. System Controller and SD Card Socket BANK# PAGE# BANK# PAGE# MECHANICALS Page 17 Page 31-35 Blank Page System Clock devices Fixed and Programmable Page 25 Pages 36-37 zSFP Clock Recovery IIC EEPROM Page 28 Page 38 BANK 0 BANK 64 BANK 65 BANK 66 BANK 67 BANK 86 BANK 84 BANK 87 3 5 6 7 7 8 9 9 GTY224 GTY225 GTY226 GTY227 PWR BANKS PWR DECOUPLING 10 10 11 11 12-14 15-16 HDMI QSPI1 zSFP CTRL USB UART IIC MAIN Page 29-30 Page 6 Page 26-27 Page 39 Page 42 FMC HPC0 Connector Page 21-24 2 x IIC MUX I/O EXPANDER (IIC MAIN) Page 60 Page 42 PMBUS Hdr. Level-Shifters Page 43 VCCINT @ 40A VCCBRAM @ 6A VCCAUX @ 3A VCC1V2 @ 2A VCC1V8 @ 3A VCC3V3 @ 5A VADJ_FMC @ 10A MGTAVCC @ 6A MGTAVTT @ 6A MGTVCCAUX @ 1A Pages 45-54 PMBUS UTIL RAIL UTIL_3V3 @ 20A Page 55 SYS_5V0 @ 1A Page 56 UTIL_2V5 @ 2A Page 57 SYS_1V8 @ 1A Page 57 SYS_1V0 @ 2A Page 57 VTT Source/sink LDO: DDR4 VTT @ 3A Page 58 Ironwood Socket P/N: C11090-D5616 Block Diagram TITLE: Block Diagram SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 2 OF 60 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX VER: REV: DRAWN BY: 1.0 01 DN D C B A 4 3 2 1
    4 3 2 1 D C B A POR_OVERRIDE select Default: 2-3 GND VCCINT 5 8 J 1 2 3 3 X 1 _ R D H GND PUDC_B POR_OVERRIDE SOC_DK5_FFVB676_IRONWOOD BANK 0 XCKU5PFFVB676 PUDC_B_0_W9 POR_OVERRIDE_Y12 RDWR_FCS_B_0_AA12 DXP_T14 DXN_T13 VCCADC_N14 GNDADC_N13 VREFN_P13 VREFP_R14 VP_P14 VN_R13 VBATT_Y9 CCLK_0_Y11 TCK_0_AE12 TMS_0_AB10 TDO_0_Y10 TDI_0_AB12 INIT_B_0_W10 PROGRAM_B_0_AB9 RSVDGND_W11 DONE_0_AB11 D03_0_AE11 D02_0_AC11 D01_DIN_0_AC12 D00_MOSI_0_AD11 M2_0_AF12 M1_0_AA9 M0_0_AA10 W9 Y12 AA12 T14 T13 N14 N13 P13 R14 P14 R13 Y9 Y11 AE12 AB10 Y10 AB12 W10 AB9 W11 AB11 AE11 AC11 AC12 AD11 AF12 AA9 AA10 VCC1V8 AD12 AA11 VCCO_0_AD12 VCCO_0_AA11 QSPI0_CS_B SYSMON_DXP SYSMON_DXN SYSMON_VREFP SYSMON_VP_R SYSMON_VN_R VCC_VBATT QSPI_CLK JTAG_TCK JTAG_TMS FPGA_TDO_FMC_TDI JTAG_TDI FPGA_INIT_B FPGA_PROG_B FPGA_DONE QSPI0_DQ3 QSPI0_DQ2 QSPI0_DQ1 QSPI0_DQ0 FPGA_M2 GND 1 2 C1264 33PF 50V C0G, NP0 R1172 20 1 1/16W 1% 1 2 2 R94 4.70K 1/16W 1% 1 2 1 2 R1179 1.00K 1/16W 1% GND C25 0.1UF 25V GND GND SYSMON_AGND U1 SOC_676_1MM_IRON C N 1 D40 40V SYS_1V8 3 BAS40-04 2 200MW 1 2 R22 4.70K 1/16W 1% VCC_VBATT TS518FE_FL35E 1 2 B1 GND L A U D _ 1 2 6 S T _ 8 1 5 S T _ T A B VCC1V8_BUS 1 2 1 2 R397 1.00K 1% R291 DNP DNP GND VCCAUX FERRITE-600 FPGA_SYSMON_AVCC C902 0.47UF 10V C1 0.1UF 25V 2 1 1 L16 1 2 FPGA_SYSMON_AVCC 1 SOT23_3 IC VOLT REF, 1.25V REF3012 IN OUT 2 SYSMON_VREF J90 1 2 C492 0.47UF 10V 1 2 GND U64 3 SYSMON_VREFP 2 1 2 C384 10UF 10V 3 HDR_1X3 SYSMON_AGND SYSMON_AGND FERRITE-600 1 L17 2 GND GND SYSMON_AGND VCC1V8 2 1 L55 FERRITE-600 SYSMON_AGND 1 R1180 1.00K 1/16W 1% 2 FPGA_PROG_B Pushbutton TL3301EF100QG P1 2 P2 1 3 P3 P4 4 SW5 1.8V VCC1V8_BUS 1 2 R14 4.70K 1/16W 1% GND FPGA Bank 0 TITLE: FPGA Bank 0 SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 3 OF 60 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX VER: REV: DRAWN BY: 1.0 01 DN D C B A 4 3 2 1
    D C B A 4 3 2 1 VCC1V8_BUS UTIL_3V3 C181 0.1UF 25V 1 2 R13 4.70K 1/16W 1% 1 2 GND FPGA_DONE 1 2 GND SN74AVC1T45 6 4 5 VCCB B DIR VCCA A GND 1 3 2 U44 SC70_6 C87 0.1UF 25V DS32 1 LED-GRN-SMT 2 1/10W % 1 21 1 6 2 8 2 3 R GND DONE_0 = 0, DONE LED OFF DONE_0 = 1, DONE LED ON VCC1V8_BUS UTIL_3V3 UTIL_3V3 C183 0.1UF 25V 1 2 R15 4.70K 1/16W 1% 1 2 GND FPGA_INIT_B R115 1 DNP 2 SN74AVC1T45 6 4 5 VCCB B DIR 1 3 2 VCCA A GND U43 SC70_6 1 2 GND C86 0.1UF 25V 3 2 3 R 1 6 2 % 1/10W 1 LED-GRN-RED RED 4 1 3 2 GRN DS1 21 21 1/10W % 1 1 6 2 6 2 3 R GND INIT_B = 0, RED LED ON INIT_B = 1, GRN LED ON VCC1V8 UTIL_3V3 VCC1V8 VCCAUX R290 DNP 1 2 SYSMON_VP_R_I2C R132 20.5K 1% 1 2 J12 2 1 HDR_1X2 SYSMON_VP_R SYSMON I2C Address jumpers J13 2 1 HDR_1X2 SYSMON_VN_R GND SYSMON_VN_R_I2C R133 20.5K 1% 1 2 GND SYSMON HEADER J93 NC NC 1 3 5 7 9 SYSMON_VREF SYSMON_VN VCCINT_VIN_R_N 11 2 4 6 8 10 12 SYSMON_DXP SYSMON_DXN FPGA_SYSMON_AVCC SYSMON_VP VCCINT_VIN_R_P 70246-1201 SYSMON_AGND SYSMON_VP_R C408 2700PF 50V 1 2 SYSMON_VN_R 3 3 4 R 0 0 1 % 1 21 2 3 4 R 0 0 1 % 1 21 SYSMON_VP SYSMON_VN R11 4.70K 1/16W 1% 1 2 VCC1V8 1 2 R5 2.40K 1/10W 1% 1 2 1 R98 DNP R107 0 1/10W 5% QSPI0_VCC 2 QSPI0_DQ3 QSPI_RESET_B QSPI0_CS_B QSPI0_DQ1 4 1 2 3 4 5 6 7 8 NC NC NC C24 0.1UF 25V 1 2 GND R97 DNP C23 0.1UF 25V 1 2 1 2 1 2 R10 4.70K 1/16W 1% GND QSPI_CLK QSPI0_DQ0 QSPI0_VIO QSPI0_DQ2 MT25QU01GBBB8ESF-0SIT DQ3_HOLD_B VCC RESET_B NC1 NC2 NC3 S_B DQ1 U2 C DQ0 NC7 NC6 NC5 NC4 VSS DQ2_VPP_WP_B 16 15 14 13 12 11 10 9 SO16_50P300X413 NC NC NC GND 3 SYSMON Hdr INIT DONE LED QSPI0 TITLE: SYSMON Hdr INIT DONE LED QSPI0 SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 4 OF 60 VER: REV: DRAWN BY: 1.0 01 DN 2 1 D C B A
    D C B A 4 3 2 1 Layout: Place resistor and capacitor for VREF Underneath the FPGA via array right next to the via SOC_DK5_FFVB676_IRONWOOD BANK 64 XCKU5PFFVB676 IO_T3U_N12_64_AC16 IO_L24N_T3U_N11_64_AA18 IO_L24P_T3U_N10_64_Y18 IO_L23N_T3U_N9_64_AA17 IO_L23P_T3U_N8_64_Y17 IO_L22N_T3U_N7_DBC_AD0N_64_AC17 IO_L22P_T3U_N6_DBC_AD0P_64_AB17 IO_L21N_T3L_N5_AD8N_64_AB20 IO_L21P_T3L_N4_AD8P_64_AA20 IO_L20N_T3L_N3_AD1N_64_AB19 IO_L20P_T3L_N2_AD1P_64_AA19 IO_L19N_T3L_N1_DBC_AD9N_64_Y21 IO_L19P_T3L_N0_DBC_AD9P_64_Y20 IO_T2U_N12_64_AE18 IO_L18N_T2U_N11_AD2N_64_AE16 IO_L18P_T2U_N10_AD2P_64_AD16 IO_L17N_T2U_N9_AD10N_64_AF17 IO_L17P_T2U_N8_AD10P_64_AE17 IO_L16N_T2U_N7_QBC_AD3N_64_AD18 IO_L16P_T2U_N6_QBC_AD3P_64_AC18 IO_L15N_T2L_N5_AD11N_64_AF19 IO_L15P_T2L_N4_AD11P_64_AF18 IO_L14N_T2L_N3_GC_64_AD19 IO_L14P_T2L_N2_GC_64_AC19 IO_L13N_T2L_N1_GC_QBC_64_AE20 IO_L13P_T2L_N0_GC_QBC_64_AD20 IO_T1U_N12_64_AF20 IO_L12N_T1U_N11_GC_64_AC21 IO_L12P_T1U_N10_GC_64_AB21 IO_L11N_T1U_N9_GC_64_AE21 IO_L11P_T1U_N8_GC_64_AD21 IO_L10N_T1U_N7_QBC_AD4N_64_AB22 IO_L10P_T1U_N6_QBC_AD4P_64_AA22 IO_L9N_T1L_N5_AD12N_64_AC23 IO_L9P_T1L_N4_AD12P_64_AC22 IO_L8N_T1L_N3_AD5N_64_AE23 IO_L8P_T1L_N2_AD5P_64_AD23 IO_L7N_T1L_N1_QBC_AD13N_64_AF22 IO_L7P_T1L_N0_QBC_AD13P_64_AE22 IO_T0U_N12_VRP_64_AF23 IO_L6N_T0U_N11_AD6N_64_AC24 IO_L6P_T0U_N10_AD6P_64_AB24 IO_L5N_T0U_N9_AD14N_64_AD25 IO_L5P_T0U_N8_AD14P_64_AD24 IO_L4N_T0U_N7_DBC_AD7N_64_AD26 IO_L4P_T0U_N6_DBC_AD7P_64_AC26 IO_L3N_T0L_N5_AD15N_64_AF25 IO_L3P_T0L_N4_AD15P_64_AF24 IO_L2N_T0L_N3_64_AB26 IO_L2P_T0L_N2_64_AB25 IO_L1N_T0L_N1_DBC_64_AE26 IO_L1P_T0L_N0_DBC_64_AE25 VREF_64_W18 AC16 AA18 Y18 AA17 Y17 AC17 AB17 AB20 AA20 AB19 AA19 Y21 Y20 AE18 AE16 AD16 AF17 AE17 AD18 AC18 AF19 AF18 AD19 AC19 AE20 AD20 AF20 AC21 AB21 AE21 AD21 AB22 AA22 AC23 AC22 AE23 AD23 AF22 AE22 AF23 AC24 AB24 AD25 AD24 AD26 AC26 AF25 AF24 AB26 AB25 AE26 AE25 W18 VADJ_FMC AA21 AB18 AD22 VCCO_64_AA21 VCCO_64_AB18 VCCO_64_AD22 U1 SOC_676_1MM_IRON FMC_HPC0_VREF_A_M2C R984 DNP 1 2 C1211 DNP 1 2 GND NC NC NC NC FMC_HPC0_LA11_N FMC_HPC0_LA11_P FMC_HPC0_LA02_N FMC_HPC0_LA02_P FMC_HPC0_LA03_N FMC_HPC0_LA03_P FMC_HPC0_LA04_N FMC_HPC0_LA04_P FMC_HPC0_LA05_N FMC_HPC0_LA05_P FMC_HPC0_LA06_N FMC_HPC0_LA06_P FMC_HPC0_LA07_N FMC_HPC0_LA07_P FMC_HPC0_LA08_N FMC_HPC0_LA08_P FMC_HPC0_LA09_N FMC_HPC0_LA09_P FMC_HPC0_LA10_N FMC_HPC0_LA10_P FMC_HPC0_LA01_CC_N FMC_HPC0_LA01_CC_P FMC_HPC0_LA00_CC_N FMC_HPC0_LA00_CC_P FMC_HPC0_CLK0_M2C_N FMC_HPC0_CLK0_M2C_P FMC_HPC0_LA17_CC_N FMC_HPC0_LA17_CC_P FMC_HPC0_LA18_CC_N FMC_HPC0_LA18_CC_P FMC_HPC0_LA12_N FMC_HPC0_LA12_P FMC_HPC0_LA13_N FMC_HPC0_LA13_P FMC_HPC0_LA14_N FMC_HPC0_LA14_P FMC_HPC0_LA15_N FMC_HPC0_LA15_P FMC_HPC0_LA16_N FMC_HPC0_LA16_P FMC_HPC0_LA19_N FMC_HPC0_LA19_P FMC_HPC0_LA20_N FMC_HPC0_LA20_P FMC_HPC0_LA21_N FMC_HPC0_LA21_P FMC_HPC0_LA22_N FMC_HPC0_LA22_P D C B A FPGA Banks 64 FMC TITLE: FPGA Banks 64 FMC SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 5 OF 60 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX VER: REV: DRAWN BY: 1.0 01 DN 4 3 2 1
    4 3 2 1 D C B A SOC_DK5_FFVB676_IRONWOOD BANK 65 XCKU5PFFVB676 IO_T3U_N12_PERSTN0_65_T19 IO_L24N_T3U_N11_DOUT_CSO_B_65_N22 IO_L24P_T3U_N10_EMCCLK_65_N21 IO_L23N_T3U_N9_PERSTN1_I2C_SDA_65_P19 IO_L23P_T3U_N8_I2C_SCLK_65_N19 IO_L22N_T3U_N7_DBC_AD0N_D05_65_P23 IO_L22P_T3U_N6_DBC_AD0P_D04_65_N23 IO_L21N_T3L_N5_AD8N_D07_65_R21 IO_L21P_T3L_N4_AD8P_D06_65_R20 IO_L20N_T3L_N3_AD1N_D09_65_P21 IO_L20P_T3L_N2_AD1P_D08_65_P20 IO_L19N_T3L_N1_DBC_AD9N_D11_65_R23 IO_L19P_T3L_N0_DBC_AD9P_D10_65_R22 IO_T2U_N12_CSI_ADV_B_65_N26 IO_L18N_T2U_N11_AD2N_D13_65_R26 IO_L18P_T2U_N10_AD2P_D12_65_R25 IO_L17N_T2U_N9_AD10N_D15_65_P26 IO_L17P_T2U_N8_AD10P_D14_65_P25 IO_L16N_T2U_N7_QBC_AD3N_A01_D17_65_V26 IO_L16P_T2U_N6_QBC_AD3P_A00_D16_65_U26 IO_L15N_T2L_N5_AD11N_A03_D19_65_P24 IO_L15P_T2L_N4_AD11P_A02_D18_65_N24 IO_L14N_T2L_N3_GC_A05_D21_65_U25 IO_L14P_T2L_N2_GC_A04_D20_65_T25 IO_L13N_T2L_N1_GC_QBC_A07_D23_65_U24 IO_L13P_T2L_N0_GC_QBC_A06_D22_65_T24 IO_T1U_N12_SMBALERT_65_AA23 IO_L12N_T1U_N11_GC_A09_D25_65_W24 IO_L12P_T1U_N10_GC_A08_D24_65_V24 IO_L11N_T1U_N9_GC_A11_D27_65_W23 IO_L11P_T1U_N8_GC_A10_D26_65_V23 IO_L10N_T1U_N7_QBC_AD4N_A13_D29_65_W26 IO_L10P_T1U_N6_QBC_AD4P_A12_D28_65_W25 IO_L9N_T1L_N5_AD12N_A15_D31_65_AA25 IO_L9P_T1L_N4_AD12P_A14_D30_65_AA24 IO_L8N_T1L_N3_AD5N_A17_65_Y26 IO_L8P_T1L_N2_AD5P_A16_65_Y25 IO_L7N_T1L_N1_QBC_AD13N_A19_65_Y23 IO_L7P_T1L_N0_QBC_AD13P_A18_65_Y22 IO_T0U_N12_VRP_A28_65_W21 IO_L6N_T0U_N11_AD6N_A21_65_W20 IO_L6P_T0U_N10_AD6P_A20_65_W19 IO_L5N_T0U_N9_AD14N_A23_65_T23 IO_L5P_T0U_N8_AD14P_A22_65_T22 IO_L4N_T0U_N7_DBC_AD7N_A25_65_V22 IO_L4P_T0U_N6_DBC_AD7P_A24_65_V21 IO_L3N_T0L_N5_AD15N_A27_65_U20 IO_L3P_T0L_N4_AD15P_A26_65_T20 IO_L2N_T0L_N3_FWE_FCS2_B_65_U22 IO_L2P_T0L_N2_FOE_B_65_U21 IO_L1N_T0L_N1_DBC_RS1_65_V19 IO_L1P_T0L_N0_DBC_RS0_65_U19 VREF_65_V18 T19 N22 N21 P19 N19 P23 N23 R21 R20 P21 P20 R23 R22 N26 R26 R25 P26 P25 V26 U26 P24 N24 U25 T25 U24 T24 AA23 W24 V24 W23 V23 W26 W25 AA25 AA24 Y26 Y25 Y23 Y22 W21 W20 W19 T23 T22 V22 V21 U20 T20 U22 U21 V19 U19 V18 VCC1V8 P22 U23 Y24 VCCO_65_P22 VCCO_65_U23 VCCO_65_Y24 U1 SOC_676_1MM_IRON VRP_65 1 2 R210 240 1/10W 1% GND PCIE_PERST_LS NC FPGA_EMCCLK PCIE_WAKE_LS_B NC QSPI1_DQ1 QSPI1_DQ0 QSPI1_DQ3 QSPI1_DQ2 NC HDMI_R_CLK SFP_REC_CLOCK_N SFP_REC_CLOCK_P NC HDMI_INT PHY1_PDWN_B_I_INT_B_O PHY1_GPIO_0 PHY1_MDIO PHY1_SGMII_OUT_N PHY1_SGMII_OUT_P PHY1_SGMII_IN_N PHY1_SGMII_IN_P PHY1_MDC PHY1_CLKOUT PHY1_SGMII_CLK_N PHY1_SGMII_CLK_P PHY1_RESET_B HDMI_R_D17 HDMI_R_D16 HDMI_R_D15 HDMI_R_D14 HDMI_R_D13 HDMI_R_D12 HDMI_R_D11 HDMI_R_D10 HDMI_R_D9 HDMI_R_D8 HDMI_R_D7 HDMI_R_D6 VRP_65 HDMI_R_D5 HDMI_R_D4 HDMI_R_D3 HDMI_R_D2 HDMI_R_D1 HDMI_R_D0 HDMI_R_DE HDMI_R_SPDIF QSPI1_CS_B HDMI_R_VSYNC HDMI_R_HSYNC HDMI_SPDIF_OUT R143 DNP 1 2 GND 6 0 2 R W 0 1 / 1 4 . 0 6 % 1 2 1 FPGA_EMCCLK_R VCC1V8 UTIL_3V3 VCC1V8 C13 0.1UF 25V 1 2 GND PCIE_PERST_LS PCIE_WAKE_LS_B TXS0104E 1 2 3 4 5 6 7 VCCA A1 A2 A3 A4 NC1 GND U4 NC NC NC GND VCCB B1 B2 B3 B4 NC2 OE 14 13 12 11 10 9 8 SOIC_14 NC NC NC 1 2 C16 0.1UF 25V GND PCIE_PERST PCIE_WAKE_B 1 2 R6 10.0K 1/10W VCC1V8 UTIL_3V3 VCC1V8 D C VCC1V8 1 2 R2 2.40K 1/10W 1% R8 4.70K 1/16W 1% 1 2 QSPI1_DQ3 QSPI_RESET_B QSPI1_CS_B QSPI1_DQ1 1 R108 1 2 0 1/10W 5% QSPI1_VCC 2 R100 DNP R99 DNP C26 0.1UF 25V 1 2 1 2 1 2 R9 4.70K 1/16W 1% GND QSPI_CLK QSPI1_DQ0 QSPI1_VIO 1 2 3 4 5 6 7 8 MT25QU01GBBB8ESF-0SIT DQ3_HOLD_B VCC RESET_B NC1 NC2 NC3 S_B DQ1 U3 C DQ0 NC7 NC6 NC5 NC4 VSS DQ2_VPP_WP_B 16 15 14 13 12 11 10 9 SO16_50P300X413 NC NC NC NC NC NC 1 2 C27 0.1UF 25V GND QSPI1_DQ2 B GND FPGA Bank 65 HDMI QSPI1 SGMII TITLE: FPGA Bank 65 HDMI QSPI1 SGMII SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 6 OF 60 VER: REV: DRAWN BY: 1.0 01 DN A 4 3 2 1
    4 3 2 1 SOC_DK5_FFVB676_IRONWOOD SOC_DK5_FFVB676_IRONWOOD D C B A BANK 66 XCKU5PFFVB676 IO_T3U_N12_66_F22 IO_L24N_T3U_N11_66_B26 IO_L24P_T3U_N10_66_B25 IO_L23N_T3U_N9_66_C26 IO_L23P_T3U_N8_66_D26 IO_L22N_T3U_N7_DBC_AD0N_66_C24 IO_L22P_T3U_N6_DBC_AD0P_66_D23 IO_L21N_T3L_N5_AD8N_66_D25 IO_L21P_T3L_N4_AD8P_66_D24 IO_L20N_T3L_N3_AD1N_66_E23 IO_L20P_T3L_N2_AD1P_66_F23 IO_L19N_T3L_N1_DBC_AD9N_66_E26 IO_L19P_T3L_N0_DBC_AD9P_66_E25 IO_T2U_N12_66_G22 IO_L18N_T2U_N11_AD2N_66_H22 IO_L18P_T2U_N10_AD2P_66_H21 IO_L17N_T2U_N9_AD10N_66_G26 IO_L17P_T2U_N8_AD10P_66_H26 IO_L16N_T2U_N7_QBC_AD3N_66_F25 IO_L16P_T2U_N6_QBC_AD3P_66_F24 IO_L15N_T2L_N5_AD11N_66_J26 IO_L15P_T2L_N4_AD11P_66_J25 IO_L14N_T2L_N3_GC_66_H24 IO_L14P_T2L_N2_GC_66_H23 IO_L13N_T2L_N1_GC_QBC_66_G25 IO_L13P_T2L_N0_GC_QBC_66_G24 IO_T1U_N12_66_M24 IO_L12N_T1U_N11_GC_66_J24 IO_L12P_T1U_N10_GC_66_J23 IO_L11N_T1U_N9_GC_66_K23 IO_L11P_T1U_N8_GC_66_K22 IO_L10N_T1U_N7_QBC_AD4N_66_L25 IO_L10P_T1U_N6_QBC_AD4P_66_L24 IO_L9N_T1L_N5_AD12N_66_K26 IO_L9P_T1L_N4_AD12P_66_K25 IO_L8N_T1L_N3_AD5N_66_M26 IO_L8P_T1L_N2_AD5P_66_M25 IO_L7N_T1L_N1_QBC_AD13N_66_L23 IO_L7P_T1L_N0_QBC_AD13P_66_L22 IO_T0U_N12_VRP_66_M22 IO_L6N_T0U_N11_AD6N_66_K20 IO_L6P_T0U_N10_AD6P_66_L20 IO_L5N_T0U_N9_AD14N_66_J21 IO_L5P_T0U_N8_AD14P_66_K21 IO_L4N_T0U_N7_DBC_AD7N_66_L19 IO_L4P_T0U_N6_DBC_AD7P_66_M19 IO_L3N_T0L_N5_AD15N_66_J20 IO_L3P_T0L_N4_AD15P_66_J19 IO_L2N_T0L_N3_66_M21 IO_L2P_T0L_N2_66_M20 IO_L1N_T0L_N1_DBC_66_K18 IO_L1P_T0L_N0_DBC_66_L18 VREF_66_J18 F22 B26 B25 C26 D26 C24 D23 D25 D24 E23 F23 E26 E25 G22 H22 H21 G26 H26 F25 F24 J26 J25 H24 H23 G25 G24 M24 J24 J23 K23 K22 L25 L24 K26 K25 M26 M25 L23 L22 M22 K20 L20 J21 K21 L19 M19 J20 J19 M21 M20 K18 L18 J18 DDR4_A8 DDR4_A13 DDR4_A7 DDR4_A5 DDR4_A2 DDR4_A9 DDR4_A1 DDR4_A0 DDR4_A3 DDR4_A12 DDR4_A11 DDR4_A4 DDR4_A10 DDR4_A6 DDR4_BA0 DDR4_BA1 DDR4_BG0 DDR4_A14_WE_B DDR4_A15_CAS_B DDR4_A16_RAS_B DDR4_ACT_B DDR4_PAR DDR4_ODT DDR4_CS_B DDR4_CK_C DDR4_CK_T DDR4_CKE USER_SMA_CLOCK_N USER_SMA_CLOCK_P SYSCLK_300_N SYSCLK_300_P DDR4_RESET_B DDR4_ALERT_B USER_SMA_N USER_SMA_P VRP_66 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC VCC1V2 E24 H25 J22 VCCO_66_E24 VCCO_66_H25 VCCO_66_J22 1 R1097 1.00K 1/16W 1% U1 SOC_676_1MM_IRON 2 GND VRP_66 1 R345 240 1/10W 1% 2 GND BANK 67 XCKU5PFFVB676 IO_T3U_N12_67_E22 IO_L24N_T3U_N11_67_B22 IO_L24P_T3U_N10_67_C22 IO_L23N_T3U_N9_67_A25 IO_L23P_T3U_N8_67_A24 IO_L22N_T3U_N7_DBC_AD0N_67_B21 IO_L22P_T3U_N6_DBC_AD0P_67_C21 IO_L21N_T3L_N5_AD8N_67_B24 IO_L21P_T3L_N4_AD8P_67_C23 IO_L20N_T3L_N3_AD1N_67_D21 IO_L20P_T3L_N2_AD1P_67_E21 IO_L19N_T3L_N1_DBC_AD9N_67_A23 IO_L19P_T3L_N0_DBC_AD9P_67_A22 IO_T2U_N12_67_B16 IO_L18N_T2U_N11_AD2N_67_A20 IO_L18P_T2U_N10_AD2P_67_A19 IO_L17N_T2U_N9_AD10N_67_A15 IO_L17P_T2U_N8_AD10P_67_B15 IO_L16N_T2U_N7_QBC_AD3N_67_A18 IO_L16P_T2U_N6_QBC_AD3P_67_A17 IO_L15N_T2L_N5_AD11N_67_B17 IO_L15P_T2L_N4_AD11P_67_C17 IO_L14N_T2L_N3_GC_67_B20 IO_L14P_T2L_N2_GC_67_B19 IO_L13N_T2L_N1_GC_QBC_67_C19 IO_L13P_T2L_N0_GC_QBC_67_C18 IO_T1U_N12_67_G19 IO_L12N_T1U_N11_GC_67_D20 IO_L12P_T1U_N10_GC_67_D19 IO_L11N_T1U_N9_GC_67_D18 IO_L11P_T1U_N8_GC_67_E18 IO_L10N_T1U_N7_QBC_AD4N_67_E20 IO_L10P_T1U_N6_QBC_AD4P_67_F20 IO_L9N_T1L_N5_AD12N_67_G21 IO_L9P_T1L_N4_AD12P_67_G20 IO_L8N_T1L_N3_AD5N_67_F19 IO_L8P_T1L_N2_AD5P_67_F18 IO_L7N_T1L_N1_QBC_AD13N_67_H19 IO_L7P_T1L_N0_QBC_AD13P_67_H18 IO_T0U_N12_VRP_67_F17 IO_L6N_T0U_N11_AD6N_67_C16 IO_L6P_T0U_N10_AD6P_67_D16 IO_L5N_T0U_N9_AD14N_67_G16 IO_L5P_T0U_N8_AD14P_67_H16 IO_L4N_T0U_N7_DBC_AD7N_67_E17 IO_L4P_T0U_N6_DBC_AD7P_67_E16 IO_L3N_T0L_N5_AD15N_67_D15 IO_L3P_T0L_N4_AD15P_67_E15 IO_L2N_T0L_N3_67_G17 IO_L2P_T0L_N2_67_H17 IO_L1N_T0L_N1_DBC_67_F15 IO_L1P_T0L_N0_DBC_67_G15 VREF_67_J16 E22 B22 C22 A25 A24 B21 C21 B24 C23 D21 E21 A23 A22 B16 A20 A19 A15 B15 A18 A17 B17 C17 B20 B19 C19 C18 G19 D20 D19 D18 E18 E20 F20 G21 G20 F19 F18 H19 H18 F17 C16 D16 G16 H16 E17 E16 D15 E15 G17 H17 F15 G15 J16 NC NC NC NC NC NC NC DDR4_DQ5 DDR4_DQ0 DDR4_DQ7 DDR4_DQ3 DDR4_DQS0_C DDR4_DQS0_T DDR4_DQ1 DDR4_DQ2 DDR4_DQ4 DDR4_DQ6 DDR4_DM0 DDR4_DQ10 DDR4_DQ8 DDR4_DQ13 DDR4_DQ15 DDR4_DQS1_C DDR4_DQS1_T DDR4_DQ11 DDR4_DQ9 DDR4_DQ12 DDR4_DQ14 DDR4_DM1 DDR4_DQ19 DDR4_DQ21 DDR4_DQ23 DDR4_DQ20 DDR4_DQS2_C DDR4_DQS2_T DDR4_DQ17 DDR4_DQ22 DDR4_DQ18 DDR4_DQ16 DDR4_DM2 VRP_67 DDR4_DQ29 DDR4_DQ25 DDR4_DQ26 DDR4_DQ30 DDR4_DQS3_C DDR4_DQS3_T DDR4_DQ27 DDR4_DQ28 DDR4_DQ31 DDR4_DQ24 DDR4_DM3 USER_SMA_CLOCK_P 2 1 2 1 R1174 100 1/10W 1% USER_SMA_CLOCK_N SYSCLK_300_P R212 100 1/10W 1% SYSCLK_300_N VCC1V2 C20 D17 G18 VCCO_67_C20 VCCO_67_D17 VCCO_67_G18 U1 SOC_676_1MM_IRON 2 GND 1 R1101 1.00K 1/16W 1% VRP_67 1 2 R1068 240 1/10W 1% GND FPGA Banks 66 67 DDR4 TITLE: FPGA Banks 66 67 DDR4 SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 7 OF 60 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX VER: REV: DRAWN BY: 1.0 01 DN D C B A 4 3 2 1
    D C B A 4 3 2 1 SOC_DK5_FFVB676_IRONWOOD BANK 86 XCKU5PFFVB676 IO_L12N_AD0N_86_B11 IO_L12P_AD0P_86_C11 IO_L11N_AD1N_86_A10 IO_L11P_AD1P_86_B10 IO_L10N_AD2N_86_A9 IO_L10P_AD2P_86_B9 IO_L9N_AD3N_86_C9 IO_L9P_AD3P_86_D9 IO_L8N_HDGC_AD4N_86_D10 IO_L8P_HDGC_AD4P_86_D11 IO_L7N_HDGC_AD5N_86_E10 IO_L7P_HDGC_AD5P_86_E11 IO_L6N_HDGC_AD6N_86_F9 IO_L6P_HDGC_AD6P_86_F10 IO_L5N_HDGC_AD7N_86_G9 IO_L5P_HDGC_AD7P_86_G10 IO_L4N_AD8N_86_G11 IO_L4P_AD8P_86_H11 IO_L3N_AD9N_86_H9 IO_L3P_AD9P_86_J9 IO_L2N_AD10N_86_J10 IO_L2P_AD10P_86_J11 IO_L1N_AD11N_86_K9 IO_L1P_AD11P_86_K10 B11 C11 A10 B10 A9 B9 C9 D9 D10 D11 E10 E11 F9 F10 G9 G10 G11 H11 H9 J9 J10 J11 K9 K10 GPIO_SW_E GPIO_SW_S GPIO_SW_N GPIO_SW_W GPIO_SW_C CPU_RESET GPIO_LED_0 GPIO_LED_1 CLK_74_25_N CLK_74_25_P GPIO_LED_2 GPIO_LED_3 GPIO_LED_4 GPIO_LED_5 GPIO_LED_6 GPIO_LED_7 GPIO_DIP_SW0 GPIO_DIP_SW1 GPIO_DIP_SW2 GPIO_DIP_SW3 NC NC NC NC VCC3V3 E9 H10 VCCO_86_E9 VCCO_86_H10 U1 SOC_676_1MM_IRON CLK_74_25_P 1 R430 100 1/10W 1% 2 CLK_74_25_N 4 3 2 1 FPGA Banks 86 - GPIO and CLOCKS TITLE: FPGA Banks 86 - GPIO and CLOCKS SCHEM, ROHS COMPLIANT HW-U1-KCU116_REV1_0 ASSY P/N: 0432019 PCB P/N: 1280924 SCH P/N: 0381757 TEST P/N: TSSXXXX DATE: 04/04/2017:05:22 SHEET SIZE: B SHEET 8 OF 60 VER: REV: DRAWN BY: 1.0 01 DN D C B A
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