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Second edition Charles Pfeil

BGA Breakouts and Routing Effective Design Methods for Very Large BGAs Second Edition Version 5.1 Charles Pfeil 5/12/2010 Very large BGAs, over 1500 pins, present a unique challenge for routing on a printed circuit board. Often just routing out of the BGA is the primary contributor to the number of layers required for routing. This book presents a number of studies and solutions for addressing these challenges.

WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either expressed or implied. This document is for information and instruction purposes. Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice, and the reader should, in all cases, consult Mentor Graphics to determine whether any changes have been made. Contractor is: Mentor Graphics Corporation 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777 Telephone: 503.685.7000 Toll-Free Telephone: 800.592.2210 Website: www.mentor.com SupportNet: www.mentor.com/supportnet Contact the author: charles_pfeil@mentor.com TRADEMARKS: The trademarks, logos and service marks (“Marks”) used herein are the property of Mentor Graphics Corporation or other third parties. No one is permitted to use these Marks without the prior written consent of Mentor Graphics or the respective third-party owner. A current list of Mentor Graphics’ trademarks may be viewed at: www.mentor.com/terms_conditions/trademarks.cfm © Copyright 2008 Mentor Graphics Corporation. All Rights Reserved.

PRINTED CIRCUIT BOARD DESIGN Who could have possibly imagined that significant inventions created by the great minds of yesterday would parlay into the groundbreaking visions of today’s intricate technology? Because of risk takers of only a few decades ago, today’s designers, enabled by Mentor Graphics’ innovative PCB design solutions are inventing products that improve effectiveness and efficiency resulting in improved productivity. To connect with other innovators and visionaries of future electronic development join Mentor’s PCB community at http://communities.mentor.com/mgcx/index.jspa, call us at 800.547.3000 or for more information visit www.mentor.com/pcb © 2009 Mentor Graphics Corporation, All rights reserved.

Acknowledgments I gratefully acknowledge those who contributed material, ideas, and review during the production of this book. • My colleagues at Mentor Graphics who provided review, discussion and feedback on various aspects of the content: Happy Holden Steve Kaufer Chuck Ferry Kendall Hiles • Mentor Graphics SDD customers who took the time to meet with me and discuss the issues: Vern Wnek and Kevin Seaman, Broadcom Aydin Cokoyoglu, Alcatel-Lucent Shaun Olsen, Intel Larry Paul and Andy Green, Qualcomm • The software and package design team at Xilinx who provide feedback on my research with the Virtex-4 and Virtex-5 devices. • The Marcom team at Mentor Graphics who provided review and produced the finished copy: Leslie Van Grove Mark Forbes Thanks to everyone who supported and encouraged this effort. i

Table of Contents Preface – Second Edition ....................................................................... v Chapter One - Introduction ................................................................... 1 Expedition PCB ............................................................................... 2 Figures ............................................................................................ 2 Definitions ...................................................................................... 2 Via Types ........................................................................................ 6 Stackup Types ................................................................................. 6 The Problem ................................................................................. 12 Solutions ....................................................................................... 15 Chapter Two - BGA Packages .............................................................. 17 High Pin Counts ............................................................................ 17 Impact on Routing, Performance and Cost .................................. 20 Off-Matrix Ball Pads ..................................................................... 22 0.8mm Pin-Pitch ........................................................................... 23 The Near Future ........................................................................... 24 Chapter Three - HDI Layer Stackups .................................................... 25 Fabrication Vendors ..................................................................... 25 Dependencies ............................................................................... 26 Overview of Stackup Types .......................................................... 27 HDI Stackup Details ...................................................................... 31 Via Models .................................................................................... 36 Plane Layer Assignments .............................................................. 39 Layer Count .................................................................................. 42 Design Rules ................................................................................. 43 Fanout Patterns ............................................................................ 43 Signal Integrity ............................................................................. 44 Recommended HDI Stackups ....................................................... 44 Secondary HDI Stackups ............................................................... 48 Any-Layer-Via Stackups ................................................................ 52 Summary ...................................................................................... 53 iii

BGA Breakouts and Routing Chapter Four - Fanout Patterns ........................................................... 55 Theoretical Breakout Methods .................................................... 56 Signal Integrity Concerns .............................................................. 60 Minimizing the Variables .............................................................. 61 Fanout Pattern Goals and Approach ............................................ 64 Through-Vias ................................................................................ 65 Drilled Blind and Buried-vias ........................................................ 78 HDI Micro-Vias .............................................................................. 89 Summary ...................................................................................... 94 Chapter Five - Layer Biased Breakouts ................................................ 95 Board Description ......................................................................... 95 General Assessment of Original Board......................................... 95 Recommendations and Solutions ................................................ 96 Using Layer Biased Breakouts ...................................................... 97 Fanouts for Micro-Via Layers ..................................................... 101 Route Results .............................................................................. 119 Summary .................................................................................... 120 Chapter Six - 0.8mm Pin-Pitch BGA Tests .......................................... 121 Test Scenario .............................................................................. 121 Test 1: Through-Vias ................................................................... 124 Test 2: Micro-Vias and Through-Vias ......................................... 134 Test 3: Any-Layer-Vias ................................................................ 149 Summary .................................................................................... 163 Chapter Seven - Software for Generating BGA Fanouts ..................... 165 Method ....................................................................................... 166 Regions ....................................................................................... 167 Adding Blind and Through-Vias .................................................. 168 Adding Buried Vias ..................................................................... 170 Additional Example .................................................................... 173 Conclusion ........................................................................................ 175 About the Author .............................................................................. 177 iv

Preface – Second Edition This new edition includes updates throughout the book with greater details, new methods, and clearer figures. It also has an additional chapter called “Software for Generating BGA Fanouts”. This chapter describes how to use new software in Mentor Graphics Expedition PCB and BoardStationXE to automatically generate efficient fanouts patterns for large dense BGAs. v

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