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STM32F302_STM32F303数据手册.pdf
Table 1. Device summary
1 Introduction
2 Description
Table 2. STM32F30x family device features and peripheral counts
Figure 1. STM32F302xx block diagram
Figure 2. STM32F303xx block diagram
3 Functional overview
3.1 ARM® Cortex™-M4F core with embedded Flash and SRAM
3.2 Memory protection unit
3.3 Embedded Flash memory
3.4 Embedded SRAM
3.5 Boot modes
3.6 CRC (cyclic redundancy check) calculation unit
3.7 Power management
3.7.1 Power supply schemes
3.7.2 Power supply supervisor
3.7.3 Voltage regulator
3.7.4 Low-power modes
3.8 Clocks and startup
Figure 3. Clock tree
3.9 GPIOs (general-purpose inputs/outputs)
3.10 DMA (direct memory access)
3.11 Interrupts and events
3.11.1 Nested vectored interrupt controller (NVIC)
3.12 Fast ADC (analog-to-digital converter)
3.12.1 Temperature sensor
Table 3. Temperature sensor calibration values
3.12.2 Internal voltage reference (VREFINT)
Table 4. Temperature sensor calibration values
3.12.3 VBAT battery voltage monitoring
3.12.4 OPAMP reference voltage (VOPAMP)
3.13 DAC (digital-to-analog converter)
3.14 Operational amplifier
3.15 Fast comparators
3.16 Timers and watchdogs
Table 5. Timer feature comparison
3.16.1 Advanced timers (TIM1, TIM8)
3.16.2 General-purpose timers (TIM2, TIM3, TIM4, TIM15, TIM16, TIM17)
3.16.3 Basic timers (TIM6, TIM7)
3.16.4 Independent watchdog
3.16.5 Window watchdog
3.16.6 SysTick timer
3.17 Real-time clock (RTC) and backup registers
3.18 I2C bus
Table 6. Comparison of I2C analog and digital filters
Table 7. STM32F30x I2C implementation
3.19 Universal synchronous/asynchronous receiver transmitter (USART)
3.20 Universal asynchronous receiver transmitter (UART)
Table 8. USART features
3.21 Serial peripheral interface (SPI)/Inter-integrated sound interfaces (I2S)
Table 9. STM32F30x SPI/I2S implementation
3.22 Controller area network (CAN)
3.23 Universal serial bus (USB)
3.24 Infrared Transmitter
Figure 4. Infrared transmitter
3.25 Touch sensing controller (TSC)
Table 10. Capacitive sensing GPIOs available on STM32F30x devices
Table 11. No. of capacitive sensing channels available on STM32F302xx/STM32F303xx devices
3.26 Development support
3.26.1 Serial wire JTAG debug port (SWJ-DP)
3.26.2 Embedded trace macrocell™
4 Pinouts and pin description
Figure 5. STM32F302xx/STM32F303xx LQFP48 pinout
Figure 6. STM32F302xx/STM32F303xx LQFP64 pinout
Figure 7. STM32F302xx/STM32F303xx LQFP100 pinout
Table 12. Legend/abbreviations used in the pinout table
Table 13. STM32F302xx/STM32F303xx pin definitions (continued)
Table 14. Alternate functions for port A
Table 15. Alternate functions for port B
Table 16. Alternate functions for port C
Table 17. Alternate functions for port D
Table 18. Alternate functions for port E
Table 19. Alternate functions for port F
5 Memory mapping
Figure 8. STM32F30x memory map
Table 20. STM32F30x memory map and peripheral register boundary addresses (continued)
6 Electrical characteristics
6.1 Parameter conditions
6.1.1 Minimum and maximum values
6.1.2 Typical values
6.1.3 Typical curves
6.1.4 Loading capacitor
6.1.5 Pin input voltage
Figure 9. Pin loading conditions
Figure 10. Pin input voltage
6.1.6 Power supply scheme
Figure 11. Power supply scheme
6.1.7 Current consumption measurement
Figure 12. Current consumption measurement scheme
6.2 Absolute maximum ratings
Table 21. Voltage characteristics
Table 22. Current characteristics
Table 23. Thermal characteristics
6.3 Operating conditions
6.3.1 General operating conditions
Table 24. General operating conditions
6.3.2 Operating conditions at power-up / power-down
Table 25. Operating conditions at power-up / power-down
6.3.3 Embedded reset and power control block characteristics
Table 26. Embedded reset and power control block characteristics
Table 27. Programmable voltage detector characteristics (continued)
6.3.4 Embedded reference voltage
Table 28. Embedded internal reference voltage
6.3.5 Supply current characteristics
Table 29. Typical and maximum current consumption from VDD supply at VDD = 3.6 V (continued)
Table 30. Typical and maximum current consumption from the VDDA supply
Table 31. Typical and maximum VDD consumption in Stop and Standby modes
Table 32. Typical and maximum VDDA consumption in Stop and Standby modes
Table 33. Typical and maximum current consumption from VBAT supply
Table 34. Typical current consumption in Run mode, code with data processing running from Flash
Table 35. Typical current consumption in Sleep mode, code running from Flash or RAM
6.3.6 External clock source characteristics
Table 36. High-speed external user clock characteristics
Figure 13. High-speed external clock source AC timing diagram
Table 37. Low-speed external user clock characteristics
Figure 14. Low-speed external clock source AC timing diagram
Table 38. HSE oscillator characteristics
Figure 15. Typical application with an 8 MHz crystal
Table 39. LSE oscillator characteristics (fLSE = 32.768 kHz)
Figure 16. Typical application with a 32.768 kHz crystal
6.3.7 Internal clock source characteristics
Table 40. HSI oscillator characteristics
Table 41. LSI oscillator characteristics
Table 42. Low-power mode wakeup timings
6.3.8 PLL characteristics
Table 43. PLL characteristics
6.3.9 Memory characteristics
Table 44. Flash memory characteristics
Table 45. Flash memory endurance and data retention
6.3.10 EMC characteristics
Table 46. EMS characteristics
Table 47. EMI characteristics
6.3.11 Electrical sensitivity characteristics
Table 48. ESD absolute maximum ratings
Table 49. Electrical sensitivities
6.3.12 I/O current injection characteristics
Table 50. I/O current injection susceptibility
6.3.13 I/O port characteristics
Table 51. I/O static characteristics (continued)
Figure 17. TC and TTa I/O input characteristics - CMOS port
Figure 18. TC and TTa I/O input characteristics - TTL port
Figure 19. Five volt tolerant (FT and FTf) I/O input characteristics - CMOS port
Figure 20. Five volt tolerant (FT and FTf) I/O input characteristics - TTL port
Table 52. Output voltage characteristics
Table 53. I/O AC characteristics
Figure 21. I/O AC characteristics definition
6.3.14 NRST pin characteristics
Table 54. NRST pin characteristics
Figure 22. Recommended NRST pin protection
6.3.15 Timer characteristics
Table 55. TIMx characteristics
Table 56. IWDG min/max timeout period at 40 kHz (LSI)
Table 57. WWDG min-max timeout value @72 MHz (PCLK)
6.3.16 Communications interfaces
Table 58. I2C characteristics
Table 59. I2C analog filter characteristics
Figure 23. I2C bus AC waveforms and measurement circuit
Table 60. SPI characteristics
Figure 24. SPI timing diagram - slave mode and CPHA = 0
Figure 25. SPI timing diagram - slave mode and CPHA = 1(1)
Figure 26. SPI timing diagram - master mode(1)
Table 61. I2S characteristics
Figure 27. I2S slave timing diagram (Philips protocol)(1)
Figure 28. I2S master timing diagram (Philips protocol)(1)
Table 62. USB startup time
Table 63. USB DC electrical characteristics
Figure 29. USB timings: definition of data signal rise and fall time
Table 64. USB: Full-speed electrical characteristics
6.3.17 ADC characteristics
Table 65. ADC characteristics
Table 66. Minimum sampling time to be respected for fast and slow channels
Table 67. ADC accuracy
Figure 30. ADC accuracy characteristics
Figure 31. Typical connection diagram using the ADC
6.3.18 DAC electrical specifications
Table 68. DAC characteristics (continued)
Figure 32. 12-bit buffered /non-buffered DAC
6.3.19 Comparator characteristics
Table 69. Comparator characteristics (continued)
6.3.20 Operational amplifer charateristics
Table 70. Operational amplifier characteristics
6.3.21 Temperature sensor characteristics
Table 71. TS characteristics
6.3.22 VBAT monitoring characteristics
Table 72. VBAT monitoring characteristics
7 Package characteristics
7.1 Package mechanical data
Figure 33. LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package outline
Figure 34. Recommended footprint(1)
Table 73. LQPF100 – 14 x 14 mm, 100-pin low-profile quad flat package mechanical data
Figure 35. LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package outline
Figure 36. Recommended footprint(1)
Table 74. LQFP64 – 10 x 10 mm, 64-pin low-profile quad flat package mechanical data
Figure 37. LQFP48 – 7 x 7mm, 48-pin low-profile quad flat package outline
Figure 38. Recommended footprint(1)
Table 75. LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package mechanical data
7.2 Thermal characteristics
Table 76. Package thermal characteristics
7.2.1 Reference document
7.2.2 Selecting the product temperature range
Figure 39. LQFP100 PD max vs. TA
8 Part numbering
Table 77. Ordering information scheme
9 Revision history
Table 78. Document revision history
STM32F302xx STM32F303xx
ARM Cortex-M4F 32b MCU+FPU, up to 256KB Flash+48KB SRAM
4 ADCs, 2 DACs, 7 comp, 4 PGA, timers, 2.0-3.6 V operation
Datasheet production data
Features
■ Core: ARM® 32-bit Cortex™-M4F CPU (72 MHz
max), single-cycle multiplication and HW
division, DSP instruction with FPU (floating-point
unit) and MPU (memory protection unit).
■ Operating conditions:
– VDD, VDDA voltage range: 2.0 V to 3.6 V
■ Memories
– 128 to 256 Kbytes of Flash memory
– Up to 40 Kbytes of SRAM on data bus with
HW parity check
– 8 Kbytes of SRAM on instruction bus with
HW parity check (CCM)
■ CRC calculation unit
■ Reset and supply management
– Power-on/Power down reset (POR/PDR)
– Programmable voltage detector (PVD)
– Low power modes: Sleep, Stop and Standby
– VBAT supply for RTC and backup registers
■ Clock management
– 4 to 32 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– Internal 8 MHz RC with x 16 PLL option
– Internal 40 kHz oscillator
■ Up to 87 fast I/Os
– All mappable on external interrupt vectors
– Several 5 V-tolerant
■ 12-channel DMA controller
■ Up to four ADC 0.20 µS (up to 39 channels) with
selectable resolution of 12/10/8/6 bits, 0 to 3.6 V
conversion range, separate analog supply from
2 to 3.6 V
■ Up to two 12-bit DAC channels with analog
supply from 2.4 to 3.6 V
■ Seven fast rail-to-rail analog comparators with
analog supply from 2 to 3.6 V
■ Up to four operational amplifiers that can be
used in PGA mode, all terminal accessible with
analog supply from 2.4 to 3.6 V
■ Support for up to 24 capacitive sensing keys
supporting touchkey, linear and rotary
touchsensors
LQFP48 (7 × 7 mm)
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
■ Up to 13 timers
– One 32-bit timer and two 16-bit timers with
up to 4 IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
– Up to two 16-bit 6-channel advanced-control
timers, with up to 6 PWM channels,
deadtime generation and emergency stop
– One 16-bit timer with 2 IC/OCs, 1
OCN/PWM, deadtime generation and
emergency stop
– Two 16-bit timers with IC/OC/OCN/PWM,
deadtime generation and emergency stop
– Two watchdog timers (independent, window)
– SysTick timer: 24-bit downcounter
– Up to two 16-bit basic timers to drive the
DAC
■ Calendar RTC with Alarm, periodic wakeup from
Stop/Standby
■ Communication interfaces
– CAN interface (2.0B Active)
– Two I2C Fast mode plus (1 Mbit/s) with 20
mA current sink, SMBus/PMBus, wakeup
from STOP
– Up to five USART/UARTs (ISO 7816
interface, LIN, IrDA, modem control)
– Up to three SPIs, two with multiplexed I2S
interface, 4 to 16 programmable bit frame
– USB 2.0 full speed interface
– Infrared Transmitter
■ Serial wire debug, JTAG, Cortex-M4F ETM
■ 96-bit unique ID
Table 1.
Device summary
Reference
Part number
STM32F302xx
STM32F302CB, STM32F302CC, STM32F302RB,
STM32F302RC, STM32F302VB, STM32F302VC
STM32F303xx
STM32F303CB, STM32F303CC, STM32F303RB,
STM32F303RC, STM32F303VB, STM32F303VC
September 2012
Doc ID 023353 Rev 2
This is information on a product in full production.
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1
Contents
Contents
STM32F302xx/STM32F303xx
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ARM® Cortex™-M4F core with embedded Flash and SRAM . . . . . . . . . 13
3.1
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3
3.4
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5
3.6
CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 14
Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.7
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.7.1
3.7.2
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.7.3
3.7.4
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.8
3.9
GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.10 DMA (direct memory access) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.11
Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.11.1
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 18
Fast ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.12.1
Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.12.2
3.12.3
VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.12.4 OPAMP reference voltage (VOPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.13 DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.14 Operational amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Fast comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.15
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.16
3.16.1
Advanced timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.16.2 General-purpose timers (TIM2, TIM3, TIM4, TIM15, TIM16, TIM17) . . 23
3.16.3
Basic timers (TIM6, TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.12
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5
6
3.16.4
Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.16.5 Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.16.6
3.17 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 25
I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.18
3.19 Universal synchronous/asynchronous receiver transmitter (USART) . . . 26
3.20 Universal asynchronous receiver transmitter (UART) . . . . . . . . . . . . . . . 27
3.21 Serial peripheral interface (SPI)/Inter-integrated sound interfaces (I2S) . 27
3.22 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.23 Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.24
Infrared Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.25
Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.26 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 31
Embedded trace macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.26.1
3.26.2
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1
6.1.1
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1.2
6.1.3
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1.4
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1.5
6.1.6
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.1.7
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
6.3.1
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 59
6.3.2
6.3.3
Embedded reset and power control block characteristics . . . . . . . . . . . 59
Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.3.4
6.3.5
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
6.2
6.3
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External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
6.3.6
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
6.3.7
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
6.3.8
Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
6.3.9
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
6.3.10
Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.3.11
I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.3.12
I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
6.3.13
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
6.3.14
Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
6.3.15
Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
6.3.16
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
6.3.17
DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
6.3.18
6.3.19
Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
6.3.20 Operational amplifer charateristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
6.3.21
6.3.22
VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
7
8
9
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.1
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
7.2
Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
7.2.1
7.2.2
Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . . 118
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
STM32F30x family device features and peripheral counts. . . . . . . . . . . . . . . . . . . . . . . . . 10
Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
STM32F30x I2C implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
USART features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
STM32F30x SPI/I2S implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Capacitive sensing GPIOs available on STM32F30x devices . . . . . . . . . . . . . . . . . . . . . . 30
No. of capacitive sensing channels available on STM32F302xx/STM32F303xx devices . 30
Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
STM32F302xx/STM32F303xx pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Alternate functions for port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Alternate functions for port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Alternate functions for port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Alternate functions for port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Alternate functions for port E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Alternate functions for port F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
STM32F30x memory map and peripheral register boundary
addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 21.
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 22.
Table 23.
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 24. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 25. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 26.
Programmable voltage detector characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 27.
Table 28.
Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Typical and maximum current consumption from VDD supply
Table 29.
at VDD = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Typical and maximum current consumption from the VDDA supply . . . . . . . . . . . . . . . . . . 64
Typical and maximum VDD consumption in Stop and Standby modes . . . . . . . . . . . . . . . 65
Typical and maximum VDDA consumption in Stop and Standby modes . . . . . . . . . . . . . . 65
Typical and maximum current consumption from VBAT supply. . . . . . . . . . . . . . . . . . . . . . 66
Typical current consumption in Run mode, code with data processing
running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Typical current consumption in Sleep mode, code running from Flash or RAM . . . . . . . . . 68
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
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List of tables
STM32F302xx/STM32F303xx
EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 46.
EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 47.
ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 48.
Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Table 49.
I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Table 50.
Table 51.
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Table 52. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 53.
I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Table 54.
TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 55.
Table 56.
IWDG min/max timeout period at 40 kHz (LSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Table 57. WWDG min-max timeout value @72 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 58.
I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 59.
SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Table 60.
I2S characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Table 61.
USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Table 62.
USB DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Table 63.
USB: Full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Table 64.
Table 65.
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Table 66. Minimum sampling time to be respected for fast and slow channels . . . . . . . . . . . . . . . . 103
ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Table 67.
DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Table 68.
Table 69.
Comparator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Table 70. Operational amplifier characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Table 71.
VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Table 72.
LQPF100 – 14 x 14 mm, 100-pin low-profile quad flat package mechanical data . . . . . . 114
Table 73.
Table 74.
LQFP64 – 10 x 10 mm, 64-pin low-profile quad flat package mechanical data . . . . . . . . 115
LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package mechanical data . . . . . . . . . . 116
Table 75.
Table 76.
Package thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Table 77. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Table 78.
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
6/122
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STM32F302xx/STM32F303xx
List of figures
List of figures
STM32F302xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 1.
STM32F303xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 2.
Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 3.
Infrared transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 4.
STM32F302xx/STM32F303xx LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 5.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
STM32F302xx/STM32F303xx LQFP64 pinout
Figure 6.
STM32F302xx/STM32F303xx LQFP100 pinout
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 7.
STM32F30x memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 8.
Figure 9.
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 10. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 11. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 12. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 13. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 14.
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 15. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure 16. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Figure 17. TC and TTa I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 18. TC and TTa I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Figure 19. Five volt tolerant (FT and FTf) I/O input characteristics - CMOS port. . . . . . . . . . . . . . . . . 86
Figure 20. Five volt tolerant (FT and FTf) I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . 87
Figure 21.
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 22. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 23.
Figure 24. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 25. SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Figure 26. SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
I2S slave timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 27.
I2S master timing diagram (Philips protocol)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
Figure 28.
Figure 29. USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . 100
Figure 30. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Figure 31. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 32.
Figure 33.
LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . 114
Figure 34. Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Figure 35.
LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 115
Figure 36. Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 37.
LQFP48 – 7 x 7mm, 48-pin low-profile quad flat
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 38. Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 39.
LQFP100 PD max vs. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Doc ID 023353 Rev 2
7/122
Introduction
STM32F302xx/STM32F303xx
1
Introduction
This datasheet provides the ordering information and mechanical device characteristics of
the STM32F30x microcontrollers.
This STM32F30x datasheet should be read in conjunction with the STM32F30x reference
manual. The reference manual is available from the STMicroelectronics website
www.st.com.
For information on the Cortex™-M4F core please refer to the Cortex™-M4F Technical
Reference Manual, available from the www.arm.com website at the following address:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.subset.cortexm.m4/index.html
8/122
Doc ID 023353 Rev 2
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