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ZC706原理图.pdf

发布时间：2022-05-29 发布人：admin 分类：说明书 资料大小：1.95M 资料格式：pdf 举报 版权申诉
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    zc706_2_0 Sheet 1
    zc706_2_0 Sheet 2
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    D C B A 4 3 2 1 ZC706 EVALUATION PLATFORM HW-Z7-ZC706 (XC7Z045-FFG900) DISCLAIMER: XILINX IS DISCLOSING THIS USER GUIDE, MANUAL, RELEASE NOTE, SCHEMATIC, AND/OR SPECIFICATION (THE “DOCUMENTATION”) TO YOU SOLELY FOR USE IN THE DEVELOPMENT OF DESIGNS TO OPERATE WITH XILINX HARDWARE DEVICES. YOU MAY NOT REPRODUCE, DISTRIBUTE, REPUBLISH, DOWNLOAD, DISPLAY, POST, OR TRANSMIT THE DOCUMENTATION IN ANY FORM OR BY ANY MEANS INCLUDING, BUT NOT LIMITED TO, ELECTRONIC, MECHANICAL, PHOTOCOPYING, RECORDING, OR OTHERWISE, WITHOUT THE PRIOR WRITTEN CONSENT OF XILINX. XILINX EXPRESSLY DISCLAIMS ANY LIABILITY ARISING OUT OF YOUR USE OF THE DOCUMENTATION. XILINX RESERVES THE RIGHT, AT ITS SOLE DISCRETION, TO CHANGE THE DOCUMENTATION WITHOUT NOTICE AT ANY TIME. XILINX ASSUMES NO OBLIGATION TO CORRECT ANY ERRORS CONTAINED IN THE DOCUMENTATION, OR TO ADVISE YOU OF ANY CORRECTIONS OR UPDATES. XILINX EXPRESSLY DISCLAIMS ANY LIABILITY IN CONNECTION WITH TECHNICAL SUPPORT OR ASSISTANCE THAT MAY BE PROVIDED TO YOU IN CONNECTION WITH THE DOCUMENTATION. THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION. THE XILINX HARDWARE, FPGA AND CPLD DEVICES REFERRED TO HEREIN ("PRODUCTS") ARE SUBJECT TO THE TERMS AND CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE, OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY OR PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO APPLICABLE LAWS AND REGULATIONS. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. 4 3 2 REV. 2.0 Title: DISCLAIMER SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 1 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    4 3 2 1 D JTAG Module & Connectors Page 16 Dual QUAD SPI Page 21 SFP+ Page 41 SD Card Connector C Page 22 FMC2 HPC Connector Page 24 FMC LPC Connector Page 28 10/100/1000 Ethernet PHY RGMII Only Pages 29 & 30 DDR3 Components 4x256Mx8 SDRAM Single Ended Clock Reset/POR pushbuttons Pages 17-20 Page 34, 16 Zynq-7000 U1 12V PWR Jack J60 p.48 Power Supply Pages 48-57 Power Controller 1 U48 PMBus 0x65 p.49 Switching Module VCCINT 1.00V @ 16A U42 p.50 Switching Module VCC1V8/VCCAUX 1.8V @ 10A U98 p.51 Switching Module VCC1V5_PL 1.5V @ 6A U85 p.52 Switching Module VADJ/VADJ_FPGA 2.5V @ 6A U86 p.53 Switching Module VCC3V3/VCC3V3_FPGA 3.3V @ 10A U15 p.54 Switching Dual VCCPINT 1.0V @ 1.5A U104 Switching Dual VCC1V5_PS 1.5V @ 2.5A U104 p.55 p.55 Switching Dual VCCP1V8 1.8V @ 1.5A U105 Switching Dual VCC3V3_PS 3.3V @ 2.5A U105 p.55 p.55 Switching Regulator VCC5V0 5.0V @ 3A U44 Linear Regulator V33D_CTL1 3.3V @ 0.25A U20 p.49 p.56 Clock Recovery Page 43 DDR3 SODIMM Pages 23 USB UART Page 40 ARM PL PJTAG PMOD header Page 39 Switches LEDs, Buttons Page 38 IIC RTC IIC Port Expander Page 37 MGT and User SMAs Page 44 PCIe x4 Page 42 Linear Regulator MGTAVCC 1.0V @ 3A U93 Linear Regulator MGTAVTT 1.2V @ 3A U94 p.57 p.57 p.57 Linear Regulator MGTVCCAUX 1.8V @ 3A U95 Linear Regulator VCC2V5 2.5V @ 1.5A U19 Linear Regulator VCCAUX_IO 2.0V @ 3A U92 Linear Regulator VTTDDR_PL 0.75V @ 3A U28 p.57 p.57 p.56 Linear Regulator VTTDDR_PS 0.75V @ 0.5A (3A Max) U27 p.56 B MECHANICALS Page 58 USB 2.0 ULPI Xcvr. PHY & Connector Page 31 HDMI CODEC & Connector Configurable Clocks XADC Hdr. IIC MUX IIC EEPROM Pages 32 & 33 Page 34 Page 35 Page 36 2mm 2X7 JTAG Hdr. TDO J3 TDI U45,46,47 Digilent USB JTAG Module TDO U30 TDI A 2X10 JTAG Hdr. 3-to-1 Analog Switch TDO J62 TDI JTAG Chain FMC HPC FMC LPC TDI TDO TDI TDO J37 J5 FPGA U1 TDI TDO IIC Addressing 0b1110100 PCA9548 0b1011101 SI570 0bxxxxx00 FMC HPC 0bxxxxx00 FMC LPC 0b1010100 IIC EEPROM 0b0100001 IIC Port Expander 0b0111001 ADV7511 0b1100101 PMBUS Controller 0b1010001 IIC RTC 0b1010000 SFP+ 0b1101000 SI5324 0b1010000 0b0011000 DDR3 SODIMM 4 3 2 Title: ZC706 Block Diagram SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 2 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    D C B A 4 SOC_Z7_FF900_IRONWOOD BANK 0 XC7Z045FF900 DXN_0_U14 VCCADC_0_P15 GNDADC_0_P14 DXP_0_U15 VREFN_0_R14 VREFP_0_T15 VP_0_R15 VN_0_T14 VCCBATT_0_P9 RSVDGND_AA12 TCK_0_Y12 TMS_0_V10 TDO_0_Y10 TDI_0_P10 INIT_B_0_W9 PROGRAM_B_0_Y9 CFGBVS_0_V9 DONE_0_AA9 RSVDVCC_U9 RSVDVCC_R9 RSVDVCC_T9 U14 P15 P14 U15 R14 T15 R15 T14 P9 AA12 Y12 V10 Y10 P10 W9 Y9 V9 AA9 U9 R9 T9 VCC3V3_FPGA Y15 Y13 VCCO_0_Y15 VCCO_0_Y13 U1 SOC_IRONWOOD_FF900 J 6 5 12 3 VCC3V3_FPGA 1 2 R255 10.0K 1/10W 1% XADC_DXN XADC_VCC XADC_DXP XADC_VREFP XADC_VP_R XADC_VN_R FPGA_VBATT FMC_LPC_TDO_FPGA_TDI FPGA_TCK_BUF FPGA_TMS_BUF JTAG_TDO FPGA_INIT_B FPGA_PROG_B 35 35 35 35 35 35 3 16 16 16 28 3 38 FPGA_DONE 3,36 J6 1 2 1 2 GND C1 0.1UF 25V X5R 1 2 C2 0.1UF 25V X5R XADC_AGND GND 2 1 SOC_Z7_FF900_IRONWOOD BANK 9 XC7Z045FF900 IO_L6P_T0_9_Y20 IO_L6N_T0_VREF_9_AA20 IO_L11P_T1_SRCC_9_AC18 IO_L11N_T1_SRCC_9_AC19 IO_L12P_T1_MRCC_9_AD18 IO_L12N_T1_MRCC_9_AD19 IO_L13P_T2_MRCC_9_AA18 IO_L13N_T2_MRCC_9_AA19 IO_L14P_T2_SRCC_9_AB19 IO_L14N_T2_SRCC_9_AB20 IO_L19P_T3_9_AD20 IO_L19N_T3_VREF_9_AE20 Y20 AA20 AC18 AC19 AD18 AD19 AA18 AA19 AB19 AB20 AD20 AE20 VADJ_FPGA AC20 Y19 VCCO_9_AC20 VCCO_9_Y19 R425 DNP DNP DNP U1 SOC_IRONWOOD_FF900 39 39 39 39 PMOD1_4_LS PMOD1_5_LS PMOD1_6_LS PMOD1_7_LS USER_SMA_CLOCK_P USER_SMA_CLOCK_N SFP_TX_DISABLE 41 SM_FAN_TACH 48 SM_FAN_PWM 48 PWRCTL1_FMC_PG_C2M_LS38 REC_CLOCK_C_P 43 REC_CLOCK_C_N 43 44 44 VCC3V3_FPGA 5% 1/10W 0 R426 5% 2 1/10W 0 R427 1 5% 2 1/10W 0 R428 1 2 1 1 R424 1 R423 DNP DNP DNP 2 DNP DNP DNP 2 1 2 GND 3 FPGA_VBATT VCCAUX C N BAS40-04 1 3 40V 200MW 2 D7 1 R9 4.7K 1/10W 5% 2 B2 1 2 GND 4 TS518FE_FL35E TS518FE_FL35E VCC3V3 L E D - G R N - S M T 1% 1/10W 261 R384 VCC3V3 2 D S 3 1 2 1 1 R383 261 1/10W 1% 2 3,36 FPGA_DONE 1 3 Q2 2 NDS331N 460MW GND Zynq Bank 0, 9 R381 261 VCC3V3 VCC3V3 1 2 R8 4.7K 1/10W 5% FPGA_INIT_B 3 SN74AVC1T45 6 4 5 VCCB B DIR VCCA A GND 1 3 2 21 1/10W 1% R382 261 DS2 VCC3V3 RED 4 1 3 2 GRN LED-GRN-RED GND U101 SC70_6 GND 1% 3 2 1 2 1/10W Title: Zynq Bank 0, 9 SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: 2-14-2014_15:01 GND Sheet Size: B Sheet of 3 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    4 3 2 1 SOC_Z7_FF900_IRONWOOD SOC_Z7_FF900_IRONWOOD 4 5 1 R W 0 1 / 1 2 2 % 1 21 PL_PJTAG_TDO_R PL_PJTAG_TDO 39 BANK 10 XC7Z045FF900 IO_0_10_AA13 IO_L1P_T0_10_AK13 IO_L1N_T0_10_AK12 IO_L2P_T0_10_AH18 IO_L2N_T0_10_AJ18 IO_L3P_T0_DQS_10_AJ14 IO_L3N_T0_DQS_10_AJ13 IO_L4P_T0_10_AJ16 IO_L4N_T0_10_AK16 IO_L5P_T0_10_AJ15 IO_L5N_T0_10_AK15 IO_L6P_T0_10_AH17 IO_L6N_T0_VREF_10_AH16 IO_L7P_T1_10_AE12 IO_L7N_T1_10_AF12 IO_L8P_T1_10_AH14 IO_L8N_T1_10_AH13 IO_L9P_T1_DQS_10_AD14 IO_L9N_T1_DQS_10_AD13 IO_L10P_T1_10_AG12 IO_L10N_T1_10_AH12 IO_L11P_T1_SRCC_10_AE13 IO_L11N_T1_SRCC_10_AF13 IO_L12P_T1_MRCC_10_AF14 IO_L12N_T1_MRCC_10_AG14 IO_L13P_T2_MRCC_10_AG17 IO_L13N_T2_MRCC_10_AG16 IO_L14P_T2_SRCC_10_AF15 IO_L14N_T2_SRCC_10_AG15 IO_L15P_T2_DQS_10_AF18 IO_L15N_T2_DQS_10_AF17 IO_L16P_T2_10_AE16 IO_L16N_T2_10_AE15 IO_L17P_T2_10_AE18 IO_L17N_T2_10_AE17 IO_L18P_T2_10_AD16 IO_L18N_T2_10_AD15 IO_L19P_T3_10_AC14 IO_L19N_T3_VREF_10_AC13 IO_L20P_T3_10_AA15 IO_L20N_T3_10_AA14 IO_L21P_T3_DQS_10_AB12 IO_L21N_T3_DQS_10_AC12 IO_L22P_T3_10_AB15 IO_L22N_T3_10_AB14 IO_L23P_T3_10_AC17 IO_L23N_T3_10_AC16 IO_L24P_T3_10_AB17 IO_L24N_T3_10_AB16 IO_25_10_AA17 AA13 AK13 AK12 AH18 AJ18 AJ14 AJ13 AJ16 AK16 AJ15 AK15 AH17 AH16 AE12 AF12 AH14 AH13 AD14 AD13 AG12 AH12 AE13 AF13 AF14 AG14 AG17 AG16 AF15 AG15 AF18 AF17 AE16 AE15 AE18 AE17 AD16 AD15 AC14 AC13 AA15 AA14 AB12 AC12 AB15 AB14 AC17 AC16 AB17 AB16 AA17 VADJ_FPGA AA16 AB13 AD17 AE14 AG18 AH15 AJ12 VCCO_10_AA16 VCCO_10_AB13 VCCO_10_AD17 VCCO_10_AE14 VCCO_10_AG18 VCCO_10_AH15 VCCO_10_AJ12 PL_PJTAG_TCK PL_PJTAG_TMS PL_PJTAG_TDI IIC_SDA_MAIN_LS IIC_SCL_MAIN_LS GPIO_DIP_SW3 FMC_LPC_LA11_P FMC_LPC_LA11_N FMC_LPC_LA04_P FMC_LPC_LA04_N FMC_LPC_LA13_P FMC_LPC_LA13_N FMC_LPC_LA02_P FMC_LPC_LA02_N FMC_LPC_LA09_P FMC_LPC_LA09_N FMC_LPC_LA08_P FMC_LPC_LA08_N FMC_LPC_LA03_P FMC_LPC_LA03_N FMC_LPC_LA00_CC_P FMC_LPC_LA00_CC_N USRCLK_P USRCLK_N 39 39 39 36 36 38 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 34 34 FMC_LPC_CLK0_M2C_P 28 FMC_LPC_CLK0_M2C_N 28 FMC_LPC_LA01_CC_P 28 FMC_LPC_LA01_CC_N 28 FMC_LPC_LA14_P 28 FMC_LPC_LA14_N 28 FMC_LPC_LA05_P 28 FMC_LPC_LA05_N 28 FMC_LPC_LA16_P 28 FMC_LPC_LA16_N 28 FMC_LPC_LA12_P 28 FMC_LPC_LA12_N 28 FMC_LPC_LA10_P 28 FMC_LPC_LA10_N 28 FMC_LPC_LA07_P 28 FMC_LPC_LA07_N 28 FMC_LPC_LA06_P 28 FMC_LPC_LA06_N 28 FMC_LPC_LA15_P 28 FMC_LPC_LA15_N 28 GPIO_DIP_SW2 GPIO_DIP_SW1 GPIO_DIP_SW0 PMOD1_3_LS IIC_RTC_IRQ_1_B D C B A BANK 11 XC7Z045FF900 IO_0_11_W23 IO_L1P_T0_11_AJ25 IO_L1N_T0_11_AK25 IO_L2P_T0_11_AK22 IO_L2N_T0_11_AK23 IO_L3P_T0_DQS_11_AJ21 IO_L3N_T0_DQS_11_AK21 IO_L4P_T0_11_AJ23 IO_L4N_T0_11_AJ24 IO_L5P_T0_11_AH23 IO_L5N_T0_11_AH24 IO_L6P_T0_11_AG22 IO_L6N_T0_VREF_11_AH22 IO_L7P_T1_11_AC24 IO_L7N_T1_11_AD24 IO_L8P_T1_11_AG24 IO_L8N_T1_11_AG25 IO_L9P_T1_DQS_11_AF23 IO_L9N_T1_DQS_11_AF24 IO_L10P_T1_11_AD21 IO_L10N_T1_11_AE21 IO_L11P_T1_SRCC_11_AD23 IO_L11N_T1_SRCC_11_AE23 IO_L12P_T1_MRCC_11_AE22 IO_L12N_T1_MRCC_11_AF22 IO_L13P_T2_MRCC_11_AG21 IO_L13N_T2_MRCC_11_AH21 IO_L14P_T2_SRCC_11_AF20 IO_L14N_T2_SRCC_11_AG20 IO_L15P_T2_DQS_11_AJ20 IO_L15N_T2_DQS_11_AK20 IO_L16P_T2_11_AK17 IO_L16N_T2_11_AK18 IO_L17P_T2_11_AH19 IO_L17N_T2_11_AJ19 IO_L18P_T2_11_AF19 IO_L18N_T2_11_AG19 IO_L19P_T3_11_AB21 IO_L19N_T3_VREF_11_AB22 IO_L20P_T3_11_W21 IO_L20N_T3_11_Y21 IO_L21P_T3_DQS_11_Y22 IO_L21N_T3_DQS_11_Y23 IO_L22P_T3_11_AA24 IO_L22N_T3_11_AB24 IO_L23P_T3_11_AA22 IO_L23N_T3_11_AA23 IO_L24P_T3_11_AC22 IO_L24N_T3_11_AC23 IO_25_11_AC21 W23 AJ25 AK25 AK22 AK23 AJ21 AK21 AJ23 AJ24 AH23 AH24 AG22 AH22 AC24 AD24 AG24 AG25 AF23 AF24 AD21 AE21 AD23 AE23 AE22 AF22 AG21 AH21 AF20 AG20 AJ20 AK20 AK17 AK18 AH19 AJ19 AF19 AG19 AB21 AB22 W21 Y21 Y22 Y23 AA24 AB24 AA22 AA23 AC22 AC23 AC21 SI5324_RST_LS SI5324_INT_ALM_LS 47 47 38 47 47 39 39 GPIO_SW_LEFT PCIE_WAKE_B_LS PCIE_PERST_LS PMOD1_0_LS PMOD1_1_LS FMC_HPC_LA07_P 26 FMC_HPC_LA07_N 26 FMC_HPC_LA05_P 24 FMC_HPC_LA05_N 24 FMC_HPC_LA06_P 24 FMC_HPC_LA06_N 24 FMC_HPC_LA14_P 24 FMC_HPC_LA14_N 24 FMC_HPC_LA10_P 24 FMC_HPC_LA10_N 24 FMC_HPC_LA12_P 25 FMC_HPC_LA12_N 25 FMC_HPC_LA09_P 24 FMC_HPC_LA09_N 24 FMC_HPC_LA11_P 26 FMC_HPC_LA11_N 26 FMC_HPC_CLK0_M2C_P 26 FMC_HPC_CLK0_M2C_N 26 FMC_HPC_LA01_CC_P 24 FMC_HPC_LA01_CC_N 24 FMC_HPC_LA00_CC_P 25 FMC_HPC_LA00_CC_N 25 FMC_HPC_LA04_P 26 FMC_HPC_LA04_N 26 FMC_HPC_LA02_P 26 FMC_HPC_LA02_N 26 FMC_HPC_LA03_P 25 FMC_HPC_LA03_N 25 FMC_HPC_LA08_P 25 FMC_HPC_LA08_N 25 PMOD1_2_LS HDMI_SPDIF_OUT_LS GPIO_LED_RIGHT GPIO_LED_LEFT FMC_HPC_LA15_P FMC_HPC_LA15_N FMC_HPC_LA16_P FMC_HPC_LA16_N FMC_HPC_LA13_P FMC_HPC_LA13_N HDMI_R_D35 HDMI_INT HDMI_R_SPDIF 38 26 26 25 25 24 24 33 32 33 39 38 38 D C B A 38 38 38 39 37 VADJ_FPGA AB23 AE24 AF21 AH25 AJ22 AK19 W22 VCCO_11_AB23 VCCO_11_AE24 VCCO_11_AF21 VCCO_11_AH25 VCCO_11_AJ22 VCCO_11_AK19 VCCO_11_W22 U1 SOC_IRONWOOD_FF900 U1 SOC_IRONWOOD_FF900 4 3 2 Zynq Bank 10, 11 Title: Zynq Bank 10, 11 SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 4 58 1 Ver: Rev: 2.0 04 Drawn By BF
    D C B A 4 3 2 1 SOC_Z7_FF900_IRONWOOD SOC_Z7_FF900_IRONWOOD BANK 12 XC7Z045FF900 BANK 13 XC7Z045FF900 IO_0_12_Y25 IO_L1P_T0_12_Y30 IO_L1N_T0_12_AA30 IO_L2P_T0_12_AB29 IO_L2N_T0_12_AB30 IO_L3P_T0_DQS_12_Y26 IO_L3N_T0_DQS_12_Y27 IO_L4P_T0_12_Y28 IO_L4N_T0_12_AA29 IO_L5P_T0_12_AA27 IO_L5N_T0_12_AA28 IO_L6P_T0_12_AB25 IO_L6N_T0_VREF_12_AB26 IO_L7P_T1_12_AC26 IO_L7N_T1_12_AD26 IO_L8P_T1_12_AD30 IO_L8N_T1_12_AE30 IO_L9P_T1_DQS_12_AC29 IO_L9N_T1_DQS_12_AD29 IO_L10P_T1_12_AD25 IO_L10N_T1_12_AE26 IO_L11P_T1_SRCC_12_AB27 IO_L11N_T1_SRCC_12_AC27 IO_L12P_T1_MRCC_12_AC28 IO_L12N_T1_MRCC_12_AD28 IO_L13P_T2_MRCC_12_AE28 IO_L13N_T2_MRCC_12_AF28 IO_L14P_T2_SRCC_12_AE27 IO_L14N_T2_SRCC_12_AF27 IO_L15P_T2_DQS_12_AF29 IO_L15N_T2_DQS_12_AG29 IO_L16P_T2_12_AF30 IO_L16N_T2_12_AG30 IO_L17P_T2_12_AG26 IO_L17N_T2_12_AG27 IO_L18P_T2_12_AE25 IO_L18N_T2_12_AF25 IO_L19P_T3_12_AH28 IO_L19N_T3_VREF_12_AH29 IO_L20P_T3_12_AJ30 IO_L20N_T3_12_AK30 IO_L21P_T3_DQS_12_AJ28 IO_L21N_T3_DQS_12_AJ29 IO_L22P_T3_12_AK27 IO_L22N_T3_12_AK28 IO_L23P_T3_12_AH26 IO_L23N_T3_12_AH27 IO_L24P_T3_12_AJ26 IO_L24N_T3_12_AK26 IO_25_12_AA25 Y25 Y30 AA30 AB29 AB30 Y26 Y27 Y28 AA29 AA27 AA28 AB25 AB26 AC26 AD26 AD30 AE30 AC29 AD29 AD25 AE26 AB27 AC27 AC28 AD28 AE28 AF28 AE27 AF27 AF29 AG29 AF30 AG30 AG26 AG27 AE25 AF25 AH28 AH29 AJ30 AK30 AJ28 AJ29 AK27 AK28 AH26 AH27 AJ26 AK26 AA25 VADJ_FPGA AA26 AC30 AD27 AG28 AK29 Y29 VCCO_12_AA26 VCCO_12_AC30 VCCO_12_AD27 VCCO_12_AG28 VCCO_12_AK29 VCCO_12_Y29 HDMI_R_D21 FMC_LPC_LA33_P FMC_LPC_LA33_N FMC_LPC_LA30_P FMC_LPC_LA30_N FMC_LPC_LA32_P FMC_LPC_LA32_N HDMI_R_D28 HDMI_R_D22 HDMI_R_D31 HDMI_R_D18 HDMI_R_D10 HDMI_R_D17 HDMI_R_D19 HDMI_R_D16 HDMI_R_D23 HDMI_R_D20 FMC_LPC_LA31_P FMC_LPC_LA31_N FMC_LPC_LA28_P FMC_LPC_LA28_N FMC_LPC_LA17_CC_P FMC_LPC_LA17_CC_N FMC_LPC_CLK1_M2C_P FMC_LPC_CLK1_M2C_N HDMI_R_D8 HDMI_R_D29 FMC_LPC_LA18_CC_P FMC_LPC_LA18_CC_N FMC_LPC_LA25_P FMC_LPC_LA25_N FMC_LPC_LA24_P FMC_LPC_LA24_N FMC_LPC_LA20_P FMC_LPC_LA20_N FMC_LPC_LA29_P FMC_LPC_LA29_N FMC_LPC_LA21_P FMC_LPC_LA21_N FMC_LPC_LA26_P FMC_LPC_LA26_N FMC_LPC_LA27_P FMC_LPC_LA27_N FMC_LPC_LA22_P FMC_LPC_LA22_N FMC_LPC_LA19_P FMC_LPC_LA19_N FMC_LPC_LA23_P FMC_LPC_LA23_N HDMI_R_D7 28 28 28 28 28 28 33 33 33 33 33 33 33 33 33 33 33 33 33 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 28 33 IO_0_13_U21 IO_L1P_T0_13_P30 IO_L1N_T0_13_R30 IO_L2P_T0_13_T30 IO_L2N_T0_13_U30 IO_L3P_T0_DQS_13_N28 IO_L3N_T0_DQS_13_P28 IO_L4P_T0_13_N29 IO_L4N_T0_13_P29 IO_L5P_T0_13_T29 IO_L5N_T0_13_U29 IO_L6P_T0_13_R28 IO_L6N_T0_VREF_13_T28 IO_L7P_T1_13_V28 IO_L7N_T1_13_V29 IO_L8P_T1_13_W29 IO_L8N_T1_13_W30 IO_L9P_T1_DQS_13_V27 IO_L9N_T1_DQS_13_W28 IO_L10P_T1_13_W25 IO_L10N_T1_13_W26 IO_L11P_T1_SRCC_13_U25 IO_L11N_T1_SRCC_13_V26 IO_L12P_T1_MRCC_13_U26 IO_L12N_T1_MRCC_13_U27 IO_L13P_T2_MRCC_13_R25 IO_L13N_T2_MRCC_13_R26 IO_L14P_T2_SRCC_13_R27 IO_L14N_T2_SRCC_13_T27 IO_L15P_T2_DQS_13_N26 IO_L15N_T2_DQS_13_N27 IO_L16P_T2_13_P25 IO_L16N_T2_13_P26 IO_L17P_T2_13_T24 IO_L17N_T2_13_T25 IO_L18P_T2_13_P23 IO_L18N_T2_13_P24 IO_L19P_T3_13_P21 IO_L19N_T3_VREF_13_R21 IO_L20P_T3_13_T22 IO_L20N_T3_13_T23 IO_L21P_T3_DQS_13_R22 IO_L21N_T3_DQS_13_R23 IO_L22P_T3_13_U22 IO_L22N_T3_13_V22 IO_L23P_T3_13_U24 IO_L23N_T3_13_V24 IO_L24P_T3_13_V23 IO_L24N_T3_13_W24 IO_25_13_V21 U21 P30 R30 T30 U30 N28 P28 N29 P29 T29 U29 R28 T28 V28 V29 W29 W30 V27 W28 W25 W26 U25 V26 U26 U27 R25 R26 R27 T27 N26 N27 P25 P26 T24 T25 P23 P24 P21 R21 T22 T23 R22 R23 U22 V22 U24 V24 V23 W24 V21 HDMI_R_VSYNC 33 FMC_HPC_LA28_P 26 FMC_HPC_LA28_N 26 FMC_HPC_LA24_P 26 FMC_HPC_LA24_N 26 HDMI_R_D33 33 HDMI_R_CLK 33 FMC_HPC_LA31_P 25 FMC_HPC_LA31_N 25 FMC_HPC_LA25_P 25 FMC_HPC_LA25_N 25 FMC_HPC_LA26_P 24 FMC_HPC_LA26_N 24 FMC_HPC_LA27_P 24 FMC_HPC_LA27_N 24 FMC_HPC_LA21_P 26 FMC_HPC_LA21_N 26 FMC_HPC_LA22_P 25 FMC_HPC_LA22_N 25 FMC_HPC_LA18_CC_P 24 FMC_HPC_LA18_CC_N 24 FMC_HPC_LA20_P 25 FMC_HPC_LA20_N 25 FMC_HPC_CLK1_M2C_P 25 FMC_HPC_CLK1_M2C_N 25 FMC_HPC_LA29_P 25 FMC_HPC_LA29_N 25 GPIO_SW_RIGHT 38 HDMI_R_D11 33 FMC_HPC_LA33_P 25 FMC_HPC_LA33_N 25 FMC_HPC_LA23_P 24 FMC_HPC_LA23_N 24 FMC_HPC_LA19_P 26 FMC_HPC_LA19_N 26 FMC_HPC_LA30_P 26 FMC_HPC_LA30_N 26 FMC_HPC_LA32_P 26 FMC_HPC_LA32_N 26 HDMI_R_D5 33 HDMI_R_D9 33 HDMI_R_HSYNC 33 HDMI_R_D6 33 HDMI_R_D32 33 HDMI_R_D30 33 HDMI_R_D4 33 HDMI_R_DE 33 FMC_HPC_LA17_CC_P 24 FMC_HPC_LA17_CC_N 24 HDMI_R_D34 33 VADJ_FPGA N30 P27 R24 T21 U28 V25 VCCO_13_N30 VCCO_13_P27 VCCO_13_R24 VCCO_13_T21 VCCO_13_U28 VCCO_13_V25 U1 SOC_IRONWOOD_FF900 U1 SOC_IRONWOOD_FF900 4 3 2 Zynq Bank 12, 13 Title: Zynq Bank 12, 13 SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 5 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    4 3 2 1 SOC_Z7_FF900_IRONWOOD VTTVREF_SODIMM VTTVREF_SODIMM SOC_Z7_FF900_IRONWOOD BANK 34 XC7Z045FF900 IO_0_VRN_34_M12 IO_L1P_T0_34_B10 IO_L1N_T0_34_A10 IO_L2P_T0_34_B9 IO_L2N_T0_34_A9 IO_L3P_T0_DQS_PUDC_B_34_A8 IO_L3N_T0_DQS_34_A7 IO_L4P_T0_34_C7 IO_L4N_T0_34_B7 IO_L5P_T0_34_C6 IO_L5N_T0_34_B6 IO_L6P_T0_34_C9 IO_L6N_T0_VREF_34_C8 IO_L7P_T1_34_J11 IO_L7N_T1_34_H11 IO_L8P_T1_34_E11 IO_L8N_T1_34_D11 IO_L9P_T1_DQS_34_H12 IO_L9N_T1_DQS_34_G11 IO_L10P_T1_34_E10 IO_L10N_T1_34_D10 IO_L11P_T1_SRCC_34_G10 IO_L11N_T1_SRCC_34_F10 IO_L12P_T1_MRCC_34_D9 IO_L12N_T1_MRCC_34_D8 IO_L13P_T2_MRCC_34_H9 IO_L13N_T2_MRCC_34_G9 IO_L14P_T2_SRCC_34_F9 IO_L14N_T2_SRCC_34_E8 IO_L15P_T2_DQS_34_J8 IO_L15N_T2_DQS_34_H8 IO_L16P_T2_34_F8 IO_L16N_T2_34_F7 IO_L17P_T2_34_E7 IO_L17N_T2_34_D6 IO_L18P_T2_34_H7 IO_L18N_T2_34_G7 IO_L19P_T3_34_L7 IO_L19N_T3_VREF_34_K7 IO_L20P_T3_34_J10 IO_L20N_T3_34_J9 IO_L21P_T3_DQS_34_L8 IO_L21N_T3_DQS_34_K8 IO_L22P_T3_34_K11 IO_L22N_T3_34_K10 IO_L23P_T3_34_L10 IO_L23N_T3_34_L9 IO_L24P_T3_34_L12 IO_L24N_T3_34_K12 IO_25_VRP_34_M10 M12 B10 A10 B9 A9 A8 A7 C7 B7 C6 B6 C9 C8 J11 H11 E11 D11 H12 G11 E10 D10 G10 F10 D9 D8 H9 G9 F9 E8 J8 H8 F8 F7 E7 D6 H7 G7 L7 K7 J10 J9 L8 K8 K11 K10 L10 L9 L12 K12 M10 C713 0.01UF 25V X7R 1 2 GND NC PL_DDR3_A8 PL_DDR3_A13 PL_DDR3_A1 PL_DDR3_A3 PL_CPU_RESET PL_DDR3_BA2 PL_DDR3_CKE1 PL_DDR3_A11 PL_DDR3_A15 PL_DDR3_A5 PL_DDR3_ODT1 PL_DDR3_S0_B PL_DDR3_RAS_B PL_DDR3_A2 PL_DDR3_A4 PL_DDR3_A12 PL_DDR3_A14 PL_DDR3_A0 PL_DDR3_CKE0 PL_DDR3_CLK0_P PL_DDR3_CLK0_N PL_DDR3_CLK1_P PL_DDR3_CLK1_N SYSCLK_P SYSCLK_N PL_DDR3_A6 PL_DDR3_A7 PL_DDR3_A9 PL_DDR3_S1_B PL_DDR3_BA0 PL_DDR3_WE_B PL_DDR3_CAS_B PL_DDR3_A10 PL_DDR3_BA1 PL_DDR3_ODT0 PL_DDR3_D39 PL_DDR3_D38 PL_DDR3_D35 PL_DDR3_DQS4_P PL_DDR3_DQS4_N PL_DDR3_D36 PL_DDR3_D32 PL_DDR3_D37 PL_DDR3_D33 PL_DDR3_DM4 PL_DDR3_D34 PL_DDR3_TEMP_EVENT 23 23 23 23 38 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 34 34 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 6 23 23 23 23 23 23 23 23 23 23 23 38 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 6 VCC1V5_PL A6 C10 D7 F11 G8 J12 K9 VCCO_34_A6 VCCO_34_C10 VCCO_34_D7 VCCO_34_F11 VCCO_34_G8 VCCO_34_J12 VCCO_34_K9 U1 SOC_IRONWOOD_FF900 D C VCC1V5_PL B B3 E4 F1 H5 J2 L6 VCCO_33_B3 VCCO_33_E4 VCCO_33_F1 VCCO_33_H5 VCCO_33_J2 VCCO_33_L6 BANK 33 XC7Z045FF900 IO_0_VRN_33_L5 IO_L1P_T0_33_J4 IO_L1N_T0_33_J3 IO_L2P_T0_33_L1 IO_L2N_T0_33_K1 IO_L3P_T0_DQS_33_K3 IO_L3N_T0_DQS_33_K2 IO_L4P_T0_33_L3 IO_L4N_T0_33_L2 IO_L5P_T0_33_K5 IO_L5N_T0_33_J5 IO_L6P_T0_33_K6 IO_L6N_T0_VREF_33_J6 IO_L7P_T1_33_G2 IO_L7N_T1_33_F2 IO_L8P_T1_33_H6 IO_L8N_T1_33_G6 IO_L9P_T1_DQS_33_J1 IO_L9N_T1_DQS_33_H1 IO_L10P_T1_33_H2 IO_L10N_T1_33_G1 IO_L11P_T1_SRCC_33_H4 IO_L11N_T1_SRCC_33_H3 IO_L12P_T1_MRCC_33_G5 IO_L12N_T1_MRCC_33_G4 IO_L13P_T2_MRCC_33_F5 IO_L13N_T2_MRCC_33_E5 IO_L14P_T2_SRCC_33_F4 IO_L14N_T2_SRCC_33_F3 IO_L15P_T2_DQS_33_E6 IO_L15N_T2_DQS_33_D5 IO_L16P_T2_33_D4 IO_L16N_T2_33_D3 IO_L17P_T2_33_E3 IO_L17N_T2_33_E2 IO_L18P_T2_33_E1 IO_L18N_T2_33_D1 IO_L19P_T3_33_C4 IO_L19N_T3_VREF_33_C3 IO_L20P_T3_33_B5 IO_L20N_T3_33_B4 IO_L21P_T3_DQS_33_A5 IO_L21N_T3_DQS_33_A4 IO_L22P_T3_33_C2 IO_L22N_T3_33_C1 IO_L23P_T3_33_B2 IO_L23N_T3_33_B1 IO_L24P_T3_33_A3 IO_L24N_T3_33_A2 IO_25_VRP_33_L4 L5 J4 J3 L1 K1 K3 K2 L3 L2 K5 J5 K6 J6 G2 F2 H6 G6 J1 H1 H2 G1 H4 H3 G5 G4 F5 E5 F4 F3 E6 D5 D4 D3 E3 E2 E1 D1 C4 C3 B5 B4 A5 A4 C2 C1 B2 B1 A3 A2 L4 U1 SOC_IRONWOOD_FF900 A 6 6 VRN_33 VRP_33 C326 0.01UF 25V X7R 1 2 GND VRN_33 PL_DDR3_D3 PL_DDR3_DM0 PL_DDR3_D0 PL_DDR3_D4 PL_DDR3_DQS0_P PL_DDR3_DQS0_N PL_DDR3_D5 PL_DDR3_D1 PL_DDR3_D2 PL_DDR3_D6 PL_DDR3_D7 GPIO_LED_CENTER PL_DDR3_DM1 PL_DDR3_D10 PL_DDR3_D8 PL_DDR3_DQS1_P PL_DDR3_DQS1_N PL_DDR3_D13 PL_DDR3_D12 PL_DDR3_D9 PL_DDR3_D11 PL_DDR3_D14 PL_DDR3_D15 NC PL_DDR3_D19 PL_DDR3_D20 PL_DDR3_D21 PL_DDR3_DQS2_P PL_DDR3_DQS2_N PL_DDR3_D18 PL_DDR3_D23 PL_DDR3_D17 PL_DDR3_D16 PL_DDR3_DM2 PL_DDR3_D22 PL_DDR3_D31 PL_DDR3_D27 PL_DDR3_D26 PL_DDR3_DQS3_P PL_DDR3_DQS3_N PL_DDR3_DM3 PL_DDR3_D30 PL_DDR3_D25 PL_DDR3_D29 PL_DDR3_D28 PL_DDR3_D24 VRP_33 VCC1V5_PL 1 R510 80.6 1/10W 1% 2 1 2 GND R511 80.6 1/10W 1% 4 3 2 Zynq Bank 33, 34 Title: Zynq Bank 33, 34 SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 6 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    D C B A 4 3 2 1 SOC_Z7_FF900_IRONWOOD BANK 35 XC7Z045FF900 VTTVREF_SODIMM C327 0.01UF 25V X7R 1 2 GND IO_0_VRN_35_K16 IO_L1P_T0_AD0P_35_L15 IO_L1N_T0_AD0N_35_L14 IO_L2P_T0_AD8P_35_J13 IO_L2N_T0_AD8N_35_H13 IO_L3P_T0_DQS_AD1P_35_L13 IO_L3N_T0_DQS_AD1N_35_K13 IO_L4P_T0_35_J14 IO_L4N_T0_35_H14 IO_L5P_T0_AD9P_35_K15 IO_L5N_T0_AD9N_35_J15 IO_L6P_T0_35_J16 IO_L6N_T0_VREF_35_H16 IO_L7P_T1_AD2P_35_G17 IO_L7N_T1_AD2N_35_G16 IO_L8P_T1_AD10P_35_G15 IO_L8N_T1_AD10N_35_G14 IO_L9P_T1_DQS_AD3P_35_G12 IO_L9N_T1_DQS_AD3N_35_F12 IO_L10P_T1_AD11P_35_F13 IO_L10N_T1_AD11N_35_E12 IO_L11P_T1_SRCC_35_E13 IO_L11N_T1_SRCC_35_D13 IO_L12P_T1_MRCC_35_F15 IO_L12N_T1_MRCC_35_F14 IO_L13P_T2_MRCC_35_E16 IO_L13N_T2_MRCC_35_E15 IO_L14P_T2_AD4P_SRCC_35_D15 IO_L14N_T2_AD4N_SRCC_35_D14 IO_L15P_T2_DQS_AD12P_35_F17 IO_L15N_T2_DQS_AD12N_35_E17 IO_L16P_T2_35_D16 IO_L16N_T2_35_C16 IO_L17P_T2_AD5P_35_C17 IO_L17N_T2_AD5N_35_B16 IO_L18P_T2_AD13P_35_B17 IO_L18N_T2_AD13N_35_A17 IO_L19P_T3_35_C14 IO_L19N_T3_VREF_35_C13 IO_L20P_T3_AD6P_35_C12 IO_L20N_T3_AD6N_35_B12 IO_L21P_T3_DQS_AD14P_35_B15 IO_L21N_T3_DQS_AD14N_35_A15 IO_L22P_T3_AD7P_35_C11 IO_L22N_T3_AD7N_35_B11 IO_L23P_T3_35_B14 IO_L23N_T3_35_A14 IO_L24P_T3_AD15P_35_A13 IO_L24N_T3_AD15N_35_A12 IO_25_VRP_35_M16 K16 L15 L14 J13 H13 L13 K13 J14 H14 K15 J15 J16 H16 G17 G16 G15 G14 G12 F12 F13 E12 E13 D13 F15 F14 E16 E15 D15 D14 F17 E17 D16 C16 C17 B16 B17 A17 C14 C13 C12 B12 B15 A15 C11 B11 B14 A14 A13 A12 M16 VRN_35 XADC_VAUX0P_R XADC_VAUX0N_R XADC_VAUX8P_R XADC_VAUX8N_R XADC_AD1_R_P XADC_AD1_R_N XADC_GPIO_3 XADC_GPIO_0 GPIO_SW_CENTER XADC_GPIO_1 XADC_GPIO_2 PL_DDR3_RESET_B PL_DDR3_D43 PL_DDR3_D44 PL_DDR3_DM5 PL_DDR3_DQS5_P PL_DDR3_DQS5_N PL_DDR3_D42 PL_DDR3_D45 PL_DDR3_D47 PL_DDR3_D46 PL_DDR3_D41 PL_DDR3_D40 PL_DDR3_D51 PL_DDR3_D49 PL_DDR3_D48 PL_DDR3_D54 PL_DDR3_DQS6_P PL_DDR3_DQS6_N PL_DDR3_D50 PL_DDR3_DM6 PL_DDR3_D52 PL_DDR3_D53 PL_DDR3_D55 GPIO_LED_0 PL_DDR3_D62 PL_DDR3_D57 PL_DDR3_D56 PL_DDR3_DQS7_P PL_DDR3_DQS7_N PL_DDR3_DM7 PL_DDR3_D61 PL_DDR3_D63 PL_DDR3_D59 PL_DDR3_D60 PL_DDR3_D58 VRP_35 7 35 35 35 35 46 46 35 35 38 35 35 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 38 23 23 23 23 23 23 23 23 23 23 23 7 VCC1V5_PL A16 B13 D17 E14 H15 L16 VCCO_35_A16 VCCO_35_B13 VCCO_35_D17 VCCO_35_E14 VCCO_35_H15 VCCO_35_L16 U1 SOC_IRONWOOD_FF900 VCC1V5_PL 1 2 R105 80.6 1/10W 1% 7 7 VRN_35 VRP_35 Zynq Bank 35 4 3 2 GND 2 1 R104 80.6 1/10W 1% Title: Zynq Bank 35 SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 7 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
    4 3 2 1 SOC_Z7_FF900_IRONWOOD SOC_Z7_FF900_IRONWOOD D BANK 109 XC7Z045FF900 MGTXTXP0_109_AK10 MGTXTXN0_109_AK9 MGTXRXP0_109_AH10 MGTXRXN0_109_AH9 MGTXTXP1_109_AK6 MGTXTXN1_109_AK5 MGTXRXP1_109_AJ8 MGTXRXN1_109_AJ7 MGTXTXP2_109_AJ4 MGTXTXN2_109_AJ3 MGTXRXP2_109_AG8 MGTXRXN2_109_AG7 MGTXTXP3_109_AK2 MGTXTXN3_109_AK1 MGTXRXP3_109_AE8 MGTXRXN3_109_AE7 MGTREFCLK0P_109_AD10 MGTREFCLK0N_109_AD9 MGTREFCLK1P_109_AF10 MGTREFCLK1N_109_AF9 AK10 AK9 AH10 AH9 AK6 AK5 AJ8 AJ7 AJ4 AJ3 AG8 AG7 AK2 AK1 AE8 AE7 AD10 AD9 AF10 AF9 24 FMC_HPC_DP0_C2M_P 24 FMC_HPC_DP0_C2M_N 24 FMC_HPC_DP0_M2C_P 24 FMC_HPC_DP0_M2C_N 24 FMC_HPC_DP1_C2M_P 24 FMC_HPC_DP1_C2M_N 24 FMC_HPC_DP1_M2C_P 24 FMC_HPC_DP1_M2C_N 24 FMC_HPC_DP2_C2M_P 24 FMC_HPC_DP2_C2M_N 24 FMC_HPC_DP2_M2C_P 24 FMC_HPC_DP2_M2C_N 24 FMC_HPC_DP3_C2M_P 24 FMC_HPC_DP3_C2M_N 24 FMC_HPC_DP3_M2C_P 24 FMC_HPC_DP3_M2C_N FMC_HPC_GBTCLK0_M2C_C_P8 FMC_HPC_GBTCLK0_M2C_C_N8 NC NC BANK 110 XC7Z045FF900 MGTXTXP0_110_AH2 MGTXTXN0_110_AH1 MGTXRXP0_110_AH6 MGTXRXN0_110_AH5 MGTXTXP1_110_AF2 MGTXTXN1_110_AF1 MGTXRXP1_110_AG4 MGTXRXN1_110_AG3 MGTXTXP2_110_AE4 MGTXTXN2_110_AE3 MGTXRXP2_110_AF6 MGTXRXN2_110_AF5 MGTXTXP3_110_AD2 MGTXTXN3_110_AD1 MGTXRXP3_110_AD6 MGTXRXN3_110_AD5 MGTREFCLK0P_110_AA8 MGTREFCLK0N_110_AA7 MGTREFCLK1P_110_AC8 MGTREFCLK1N_110_AC7 AH2 AH1 AH6 AH5 AF2 AF1 AG4 AG3 AE4 AE3 AF6 AF5 AD2 AD1 AD6 AD5 AA8 AA7 AC8 AC7 24 FMC_HPC_DP4_C2M_P 24 FMC_HPC_DP4_C2M_N 24 FMC_HPC_DP4_M2C_P 24 FMC_HPC_DP4_M2C_N 24 FMC_HPC_DP5_C2M_P 24 FMC_HPC_DP5_C2M_N 24 FMC_HPC_DP5_M2C_P 24 FMC_HPC_DP5_M2C_N 24 FMC_HPC_DP6_C2M_P 24 FMC_HPC_DP6_C2M_N 24 FMC_HPC_DP6_M2C_P 24 FMC_HPC_DP6_M2C_N 24 FMC_HPC_DP7_C2M_P 24 FMC_HPC_DP7_C2M_N 24 FMC_HPC_DP7_M2C_P 24 FMC_HPC_DP7_M2C_N 8 FMC_HPC_GBTCLK1_M2C_C_P 8 FMC_HPC_GBTCLK1_M2C_C_N SI5324_OUT_C_P 43 SI5324_OUT_C_N 43 C U1 SOC_IRONWOOD_FF900 U1 SOC_IRONWOOD_FF900 28 28 28 28 28 28 44 44 44 44 41 41 41 41 1 2 C653 0.1UF 25V X5R FMC_LPC_DP0_C2M_P FMC_LPC_DP0_C2M_N FMC_LPC_DP0_M2C_P FMC_LPC_DP0_M2C_N SMA_MGT_TX_P SMA_MGT_TX_N SMA_MGT_RX_P SMA_MGT_RX_N SFP_TX_P SFP_TX_N SFP_RX_P SFP_RX_N FMC_LPC_GBTCLK0_M2C_C_P FMC_LPC_GBTCLK0_M2C_C_N SMA_MGT_REFCLK_P SMA_MGT_REFCLK_N 8 8 44 44 1 2 C652 0.1UF 25V X5R SOC_Z7_FF900_IRONWOOD BANK 111 XC7Z045FF900 MGTXTXP0_111_AB2 MGTXTXN0_111_AB1 MGTXRXP0_111_AC4 MGTXRXN0_111_AC3 MGTXTXP1_111_Y2 MGTXTXN1_111_Y1 MGTXRXP1_111_AB6 MGTXRXN1_111_AB5 MGTXTXP2_111_W4 MGTXTXN2_111_W3 MGTXRXP2_111_Y6 MGTXRXN2_111_Y5 MGTXTXP3_111_V2 MGTXTXN3_111_V1 MGTXRXP3_111_AA4 MGTXRXN3_111_AA3 MGTREFCLK0P_111_U8 MGTREFCLK0N_111_U7 MGTREFCLK1P_111_W8 MGTREFCLK1N_111_W7 AB2 AB1 AC4 AC3 Y2 Y1 AB6 AB5 W4 W3 Y6 Y5 V2 V1 AA4 AA3 U8 U7 W8 W7 B U1 A 24 24 7 4 6 C F U 1 . 0 V 5 2 R 5 X 8 4 6 C F U 1 . 0 8 8 FMC_LPC_GBTCLK0_M2C_P V 5 2 R 5 X FMC_LPC_GBTCLK0_M2C_C_P 1 2 FMC_LPC_GBTCLK0_M2C_N FMC_LPC_GBTCLK0_M2C_C_N 21 SOC_Z7_FF900_IRONWOOD BANK 112 XC7Z045FF900 PCIE_TX3_P PCIE_TX3_N PCIE_RX3_P PCIE_RX3_N PCIE_TX2_P PCIE_TX2_N PCIE_RX2_P PCIE_RX2_N PCIE_TX1_P PCIE_TX1_N PCIE_RX1_P PCIE_RX1_N PCIE_TX0_P PCIE_TX0_N PCIE_RX0_P PCIE_RX0_N PCIE_CLK_QO_P PCIE_CLK_QO_N NC NC 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 42 MGTXTXP0_112_T2 MGTXTXN0_112_T1 MGTXRXP0_112_V6 MGTXRXN0_112_V5 MGTXTXP1_112_R4 MGTXTXN1_112_R3 MGTXRXP1_112_U4 MGTXRXN1_112_U3 MGTXTXP2_112_P2 MGTXTXN2_112_P1 MGTXRXP2_112_T6 MGTXRXN2_112_T5 MGTXTXP3_112_N4 MGTXTXN3_112_N3 MGTXRXP3_112_P6 MGTXRXN3_112_P5 MGTREFCLK0P_112_N8 MGTREFCLK0N_112_N7 MGTREFCLK1P_112_R8 MGTREFCLK1N_112_R7 MGTAVTTRCAL_112_AB10 MGTRREF_112_AB9 T2 T1 V6 V5 R4 R3 U4 U3 P2 P1 T6 T5 N4 N3 P6 P5 N8 N7 R8 R7 AB10 AB9 SOC_IRONWOOD_FF900 6 4 6 C F U 1 . 0 V 5 2 R 5 X SOC_IRONWOOD_FF900 U1 3 4 6 C F U 1 . 0 V 5 2 R 5 X 4 4 6 C F U 1 . 0 FMC_HPC_GBTCLK1_M2C_P V 5 2 R 5 X FMC_HPC_GBTCLK1_M2C_C_P 8 1 2 FMC_HPC_GBTCLK1_M2C_N FMC_HPC_GBTCLK1_M2C_C_N 8 21 4 24 24 3 5 4 6 C F U 1 . 0 FMC_HPC_GBTCLK0_M2C_P V 5 2 R 5 X FMC_HPC_GBTCLK0_M2C_C_P 21 FMC_HPC_GBTCLK0_M2C_N FMC_HPC_GBTCLK0_M2C_C_N 1 2 8 8 2 MGTAVTT 1 2 R252 100 1/10W 1% Zynq MGT Banks Title: Zynq MGT Banks SCHEM, ROHS COMPLIANT ZC706 EVALUATION PLATFORM PCB P/N: 1280681 SCH P/N: 0381513 Date: Sheet Size: B Sheet 2-14-2014_15:01 of 8 58 1 Ver: Rev: 2.0 04 Drawn By BF D C B A
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