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Microcontroller.Engineering.with.MSP432.Fundamentals.and.Applications.pdf

发布时间：2022-06-14 发布人：admin 分类：说明书 资料大小：35.28M 资料格式：pdf 举报 版权申诉
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    Cover
    Half Title
    Title Page
    Copyright Page
    Dedication
    Table of Contents
    Preface
    Acknowledgments
    Author
    Trademarks and references
    Chapter 1 Introduction to microcontrollers and this book
    1.1 Microcontroller configuration and structure
    1.2 ARM® Cortex®-M4 microcontroller system
    1.3 MSP432P401R microcontroller and its development tools and kits
    1.4 Outstanding features about this book
    1.5 Who this book is for
    1.6 What this book covers
    1.7 How this book is organized and how to use this book
    1.8 How to use the source code and sample projects
    1.9 Instructors and customers support
    Chapter 2 MSP432 microcontroller architectures
    2.1 Overview
    2.2 Introduction to ARM® Cortex®-M4 MCU
    2.2.1 Architecture of ARM® Cortex®-M4 MCU
    2.2.1.1 ARM® MCU architecture block diagram
    2.2.1.2 Architecture of the ARM® Cortex®-M4 core (CPU)
    2.2.1.3 Architecture of the floating-point registers
    2.3 Introduction to MSP-432™ MCU family member—MSP432P401R
    2.3.1 MSP432P401R microcontroller overview
    2.3.2 MSP432P401R microcontroller on-chip memory map
    2.3.3 System peripherals
    2.3.3.1 On-chip peripherals
    2.3.3.2 Interfaces to external parallel and serial peripherals
    2.3.4 MSP432P401R microcontroller GPIO modules
    2.3.4.1 MSP432P401R GPIO ports architecture
    2.3.4.2 General digital I/O function control
    2.3.4.3 PM control
    2.3.4.4 Comparison between the digital I/O function control and PM control
    2.3.4.5 Initialization and configuration of GPIO ports
    2.3.5 MSP432P401R microcontroller system controls
    2.3.5.1 MCU system reset control
    2.3.5.2 Power supply system (PSS)
    2.3.5.3 Power control manager (PCM)
    2.3.5.4 System clock control
    2.3.5.5 System controller (SYSCTL)
    2.4 Introduction to MSP432P401R LaunchPad™ MSP-EXP432P401R evaluation board
    2.4.1 Onboard hardware configurations
    2.4.2 GPIO pins configurations on booster pack interface connectors (J1~J4)
    2.5 Introduction to EduBASE ARM® trainer
    2.6 Summary
    Chapter 3 MSP432 microcontroller development kits
    3.1 Overview
    3.2 Entire MSP432P401R-based development system
    3.3 Download and install development suite and specified firmware
    3.4 Introduction to the IDE: Keil® MDK μVersion5
    3.4.1 Keil® MDK-ARM® for the MDK-Cortex-M family
    3.4.2 General development flow with MDK-ARM®
    3.4.3 Functions of the Keil® MDK-ARM® μVersion®5 GUI
    3.4.3.1 File menu
    3.4.3.2 Edit and view menus
    3.4.3.3 Project menu
    3.4.3.4 Flash menu
    3.4.3.5 Debug menu
    3.4.3.6 Peripherals menu
    3.4.3.7 Tools menu
    3.4.3.8 Software version control system (SVCS) menu
    3.4.3.9 Window menu
    3.4.3.10 Help menu
    3.5 Embedded software development procedure
    3.6 ARM®-MDK μVision5 debugger and debug process
    3.6.1 ARM® μVision5 debug architecture
    3.6.2 ARM® debug adaptor and debug adaptor driver
    3.6.3 MSP432™ Family Launchpad™ debug adaptor and debug adaptor driver
    3.6.4 ARM® μVersion5 debug process
    3.7 MSP432™ family software suite
    3.7.1 MSPWare for MSP432™ series software package
    3.7.1.1 Peripheral driver library (driverlib)
    3.7.1.2 Boot loader
    3.7.1.3 Code examples
    3.8 MSP432™ series CMSIS support
    3.9 Summary
    Chapter 4 ARM® microcontroller software and instruction set
    4.1 Overview
    4.2 Introduction to ARM® Cortex®-M4 software development structure
    4.3 ARM® Cortex®-M4 assembly instruction set
    4.3.1 ARM® Cortex®-M4 assembly language syntax
    4.3.2 ARM® Cortex®-M4 pseudo instructions
    4.3.3 ARM® Cortex®-M4 addressing modes
    4.3.3.1 Immediate offset addressing mode
    4.3.3.2 Register offset addressing mode
    4.3.3.3 PC-relative addressing mode
    4.3.3.4 Load and store multiple registers addressing mode
    4.3.3.5 PUSH and POP register addressing mode
    4.3.3.6 Load and store register exclusive addressing mode
    4.3.3.7 Inherent addressing mode
    4.3.3.8 Addressing mode summary
    4.3.4 ARM® Cortex®-M4 instruction set categories
    4.3.4.1 Data moving instructions
    4.3.4.2 Arithmetic instructions
    4.3.4.3 Logic instructions
    4.3.4.4 Shift and rotate instructions
    4.3.4.5 Data conversion instructions
    4.3.4.6 Bit field processing instructions
    4.3.4.7 Compare and test instructions
    4.3.4.8 Program flow control instructions
    4.3.4.9 Saturation instructions
    4.3.4.10 Exception-related instructions
    4.3.4.11 Sleep mode instructions
    4.3.4.12 Memory barrier instructions
    4.3.4.13 Miscellaneous instructions
    4.4 ARM® Cortex®-M4 software development procedures
    4.5 Using C language to develop MSP432P401R microcontroller applications
    4.5.1 Standard data types used in intrinsic functions
    4.5.2 CMSIS core-specific intrinsic functions
    4.5.3 Keil® ARM® compiler-specific intrinsic functions
    4.5.4 Inline assembler
    4.5.5 Naming convention and definition in C programming developments
    4.5.6 MSPWare peripheral driver library
    4.5.6.1 Programming models
    4.5.6.2 DRA model
    4.5.6.3 Peripheral driver library and API functions
    4.5.6.4 Comparison between two programming models
    4.5.6.5 Combined programming model example
    4.6 Summary
    Chapter 5 MSP432 microcontroller interrupts and exceptions
    5.1 Overview
    5.2 Exceptions and interrupts in the ARM® Cortex®-M4 MCU system
    5.2.1 Exception and interrupt types
    5.2.2 Exceptions and interrupts management
    5.2.3 Exception and interrupt processing
    5.2.3.1 Exception and interrupt inputs and pending status
    5.2.3.2 Exception and interrupt vector table
    5.2.3.3 Definitions of the priority levels
    5.3 Exceptions and interrupts in the MSP432P401R microcontroller system
    5.3.1 Local interrupts configurations and controls for GPIO pins
    5.3.2 Local interrupts configurations and controls for GPIO ports
    5.3.2.1 NVIC interrupt priority level registers
    5.3.2.2 NVIC Interrupt set enable registers (ISERs)
    5.3.3 Global interrupts configurations and controls
    5.3.4 GPIO interrupt handling and processing procedure
    5.4 Developing GPIO port interrupt projects to handle GPIO interrupts
    5.4.1 Using DRA programming model to handle GPIO interrupts
    5.4.1.1 Create a new project DRAInt and the header file
    5.4.1.2 Create a new C code file DRAInt and add it into the project
    5.4.1.3 Set up environment to compile and run the project
    5.4.2 Using CMSIS-core macros for NVIC registers to handle GPIO interrupts
    5.4.2.1 Popular data structures defined in the MSP432P401R header file
    5.4.2.2 IRQ numbers defined in the MSPWare system header file
    5.4.2.3 NVIC macros defined in the MSPWare system header files
    5.4.2.4 NVIC structure defined in the CMSIS-core header file
    5.4.2.5 Building sample project to use CMSIS-core macros for NVIC to handle interrupts
    5.4.2.6 Create a new project NVICInt and add the C code file
    5.4.3 Using MSPPDL API functions to handle GPIO interrupts
    5.4.3.1 NVIC API functions defined in the MSPPDL
    5.4.3.2 GPIO interrupt-related API functions in the MSPPDL
    5.4.3.3 Building sample project to use API functions to handle interrupts
    5.4.3.4 Create a new project SDInt and add the C code file
    5.4.3.5 Configure environments and run the project
    5.4.4 Using CMSIS-core access functions to handle GPIO interrupts
    5.4.4.1 Building a sample project to use CMSIS-core functions to handle interrupts
    5.4.4.2 Create a new project CMSISInt and add the C code file
    5.4.4.3 Configure environments and run the project
    5.5 Comparison among four interrupt programming methods
    5.6 Summary
    Chapter 6 ARM® and MSP432™ MCU memory system
    6.1 Overview
    6.2 Memory architecture in the MSP432P401R MCU system
    6.3 Static random-access memory (SRAM)
    6.3.1 SRAM memory map in the MSP432P401R MCU system
    6.3.2 SRAM control and status registers
    6.3.2.1 SRAM size (SYS_SRAM_SIZE) register
    6.3.2.2 SRAM bank enable (SYS_SRAM_BANKEN) register
    6.3.2.3 SRAM bank retention control register (SYS_SRAM_BANKRET)
    6.3.3 Bit-band operations
    6.3.3.1 Mapping relationship between the bit-band region and bit-band alias region
    6.3.3.2 Advantages of using the bit-band operations
    6.3.3.3 Illustration example of using bit-band alias addresses
    6.3.3.4 Bit-band operations for different data sizes
    6.3.3.5 Bit-band operations built in C programs
    6.4 Internal ROM
    6.4.1 Bootstrap loader (BSL)
    6.4.2 MSPWare peripheral driver library
    6.5 Flash memory
    6.5.1 Basic operational components of the flash memory
    6.5.1.1 Flash controller clocking
    6.5.1.2 Flash controller address mapping
    6.5.1.3 Flash controller access privileges
    6.5.2 Operational modes of the flash memory
    6.5.2.1 Flash memory read mode and features
    6.5.2.2 Flash memory program (write) mode
    6.5.2.3 Flash memory erase mode
    6.5.2.4 Flash memory Write-Erase protection
    6.5.3 Flash memory interrupt handling
    6.5.4 Low-frequency active and low-frequency LPM0 modes support
    6.5.5 Flash controller benchmarking features
    6.5.6 Recommended settings and flow for program and erase operations
    6.6 Memory system programming methods
    6.6.1 Flash memory projects with DRA model
    6.6.1.1 Flash memory reading projects with DRA model
    6.6.1.2 Flash memory immediate writing projects with DRA model
    6.6.1.3 Flash memory burst programming projects with DRA model
    6.6.1.4 Flash memory erasing projects with DRA model
    6.6.2 Use API functions in the MSPWare library to perform flash memory programming
    6.6.2.1 Flash reading-related API functions
    6.6.2.2 Flash programming-related API functions
    6.6.2.3 Flash erasing-related API functions
    6.6.2.4 Flash program-erase protection-related functions
    6.6.2.5 Flash interrupt processing-related API functions
    6.6.3 Use API functions to build flash memory example projects with SD model
    6.6.3.1 Configuring the environments and run the project
    6.7 Complete memory map in the MSP432P401R MCU system
    6.8 Memory requirements and memory properties
    6.8.1 Memory requirements
    6.8.2 Memory access attributes
    6.8.3 Memory endianness
    6.8.3.1 Little-endian format
    6.8.3.2 Big-endian format
    6.9 Summary
    Chapter 7 MSP432™ parallel I/O ports programming
    7.1 Overview
    7.2 GPIO module architecture and GPIO port configuration
    7.3 GPIO ports controlled by using the general digital I/O control
    7.4 GPIO ports controlled by using the PMC
    7.4.1 PM control for GPIO P2
    7.4.2 PM control for GPIO P3
    7.4.3 PM control for GPIO P7
    7.5 On-board keypads interface programming project
    7.5.1 Keypad interfacing programming structure
    7.5.2 Create the keypad interfacing programming project
    7.5.2.1 Create the C source file DRAKeyPad.c
    7.5.3 Set up the environment to build and run the project
    7.6 ADC programming project
    7.6.1 ADC module in the MSP432P401R MCU system
    7.6.2 ADC module architecture and functional block diagram
    7.6.2.1 External and internal analog input selection
    7.6.2.2 Internal and external reference voltage selection
    7.6.2.3 ADC clock selection and clock predivision
    7.6.2.4 ADC triggering source and sample-hold mode selection
    7.6.2.5 ADC conversion mode selection
    7.6.2.6 ADC conversion result memory-register selection
    7.6.2.7 ADC power management
    7.6.2.8 ADC conversion interrupt-source selection and processing
    7.6.3 ADC14 core and conversion result format
    7.6.4 ADC14 registers
    7.6.4.1 ADC14 control register 0 (ADC14CTL0)
    7.6.4.2 ADC14 control register 1 (ADC14CTL1)
    7.6.4.3 ADC14 conversion memory control registers (ADC14MCTL0~ADC14MCTL31)
    7.6.4.4 ADC14 conversion memory registers (ADC14MEM0~ADC14MEM31)
    7.6.4.5 ADC14 interrupt enable registers (ADC14IER0~ADC14IER1)
    7.6.4.6 ADC14 interrupt flag registers (ADC14IFGR0~ADC14IFGR1)
    7.6.4.7 ADC14 clear interrupt flag registers (ADC14CLRIFGR0~ADC14CLRIFGR1)
    7.6.4.8 ADC14 interrupt vector register (ADC14IV)
    7.6.5 Analog input signal channels and GPIO pins
    7.6.6 ADC14 module initialization
    7.6.7 Build the ADC programming project
    7.6.7.1 ADC module in EduBASE ARM® trainer
    7.6.7.2 Create the ADC programming project (polling-driven)
    7.6.7.3 Create the source file DRAADC14.c
    7.6.7.4 Set up the environment to build and run the project
    7.6.8 ADC module API functions provided in the TivaWare peripheral driver library
    7.6.8.1 Configure and set up the ADC14 module API functions
    7.6.8.2 Enable and disable the ADC14 module API functions
    7.6.8.3 Get the running status and receive the ADC14 conversion results API functions
    7.6.8.4 Configure and process the ADC14 interrupts API functions
    7.6.8.5 Build an example ADC14 project using API functions
    7.7 Analog comparator project
    7.7.1 Architecture and organization of the COMP_E Module
    7.7.2 Compared analog inputs selection
    7.7.3 Reference voltages selection
    7.7.4 Comparator output controls
    7.7.5 Comparator interrupt controls
    7.7.6 Analog comparator interfacing signals and GPIO pins
    7.7.7 Initialization and configuration process for the analog comparator
    7.7.8 Develop an example analog comparator project
    7.7.9 Analog comparator API functions in the MSPPDL
    7.7.9.1 API functions used to initialize COMP_E modules
    7.7.9.2 API functions used to set up reference voltages
    7.7.9.3 API functions used to control and manage the COMP_E modules
    7.7.9.4 API functions used to manage interrupts related to the COMP_E modules
    7.7.10 Use API functions to build a comparator project with the SD model
    7.8 Summary
    Chapter 8 MSP432™ serial I/O ports programming
    8.1 Overview
    8.2 Introduction to SPI mode and SPI operations
    8.2.1 Architecture and organization of the SPI mode
    8.2.2 CKPL and CKPH (transmit–receive frame)
    8.3 Enhanced universal serial communication interfaces eUSCI_A and eUSCI_B
    8.4 eUSCI interface used for SPI mode
    8.4.1 Architecture and functional block diagram of the eUSCI used for SPI mode
    8.4.2 General controls and bit clock generation registers
    8.4.3 SPI data transmit control registers
    8.4.4 SPI data receiving control registers
    8.4.5 SPI interrupt-related control registers
    8.4.5.1 SPI transmit interrupt operation
    8.4.5.2 SPI receive interrupt operation
    8.4.6 eUSCI_Ax module operational principle
    8.4.6.1 Master mode
    8.4.6.2 Slave mode
    8.4.6.3 SPI mode enable
    8.4.6.4 SPI mode working in the low-power modes
    8.4.6.5 Initialization and configuration of the eUSCI module
    8.4.7 eUSCI for SPI mode control signals and GPIO pins in MSP432P401R EVB
    8.4.8 Build the on-board LCD interface programming project
    8.4.8.1 eUSCI_B0 for SPI mode interface for the LCD in EduBASE ARM® trainer
    8.4.8.2 Serial shift register 74VHCT595
    8.4.8.3 LCD module TC1602A and LCD controller SPLC780
    8.4.8.4 Build the example LCD interfacing project
    8.4.9 Build on-board seven-segment LED interface programming project
    8.4.9.1 Structure of seven-segment LEDs
    8.4.9.2 USCIB0 module interface to the seven-segment LED in the EduBASE ARM® trainer
    8.4.9.3 Build an example LED interfacing project
    8.4.10 Build DAC programming project
    8.4.10.1 eUSCI_B0 module interface to the MCP4922 in the EduBASE ARM® trainer
    8.4.10.2 Operations and programming for MCP4922 DAC
    8.4.10.3 Analog-to-digital converter TLC-548
    8.4.10.4 Build the example DAC interfacing project
    8.4.11 eUSCI SPI API functions provided by MSPWare Peripheral Driver Library
    8.4.11.1 eUSCI_SPI_MasterConfig and eUSCI_SPI_SlaveConfig structs
    8.4.11.2 SPI module initialization and configuration functions
    8.4.11.3 SPI module control and status functions
    8.4.11.4 SPI module data processing functions
    8.4.11.5 SPI module interrupt source and processing functions
    8.4.11.6 Build an example project to interface serial peripherals using the SPI module
    8.5 Inter-Integrated Circuit (I2C) interface
    8.5.1 I2C module bus configuration and operational status
    8.5.2 I2C module architecture and functional block diagram
    8.5.3 I2C module data transfer format and frame
    8.5.4 I2C module operational sequence
    8.5.4.1 I2C module works in the master transmit mode
    8.5.4.2 I2C module works in the master receive mode
    8.5.4.3 I2C module works in the slave transmit and receive modes
    8.5.5 I2C module major operational control signals
    8.5.5.1 Acknowledge
    8.5.5.2 Repeated start
    8.5.5.3 Clock low timeout (CLTO)
    8.5.5.4 Multiple slave addresses
    8.5.5.5 Arbitration
    8.5.5.6 Glitch suppression in multimaster configuration
    8.5.6 I2C module running speeds (clock rates) and interrupts
    8.5.6.1 I2C module interrupts generation and processing
    8.5.7 I2C interface control signals and GPIO I2C control registers
    8.5.8 I2C module control registers and their functions
    8.5.8.1 eUSCI_B module for I2C mode control registers
    8.5.8.2 eUSCI_B module for I2C mode transmit and receive registers
    8.5.8.3 eUSCI_B module for I2C mode status and error control registers
    8.5.8.4 eUSCI_B module for I2C mode addresses control registers
    8.5.8.5 eUSCI_B module for I2C mode interrupt control registers
    8.5.9 eUSCI_B module for I2C mode initializations and configurations
    8.5.9.1 Initializations and configurations for the I2C-related GPIO pins
    8.5.9.2 Initializations and configurations for the eUSCI_B1 module for I2C mode
    8.5.10 Build example I2C module projects
    8.5.10.1 Hardware configuration for the master and the slave device
    8.5.10.2 Master side program
    8.5.10.3 Slave side program
    8.5.10.4 Create and build the master side program DRAI2CMaster
    8.5.10.5 Create and build the slave side program DRAI2CSlave
    8.5.10.6 Set up the environment to build and run the project
    8.5.11 I2C API functions provided by MSPWare Peripheral Driver Library
    8.5.11.1 Master operations
    8.5.11.2 I2C module master initialization and configuration API functions
    8.5.11.3 I2C module master sending and receiving data API functions
    8.5.11.4 Slave operations
    8.5.11.5 I2C module slave initialization and configuration API functions
    8.5.11.6 I2C module slave sending and receiving data API functions
    8.5.11.7 I2C module interrupt handling and processing API functions
    8.6 Universal asynchronous receivers/transmitters
    8.6.1 MSP432 asynchronous serial communication protocols and data framing
    8.6.2 Architecture and organization of the eUSCI_A module for UART mode
    8.6.3 Control registers used in eUSCI_A module for UART mode
    8.6.3.1 UART control and status registers
    8.6.3.2 UART baud rate generation and control registers
    8.6.3.3 UART data transmit and receive registers
    8.6.3.4 UART interrupt processing registers
    8.6.4 Operational procedure of the UART and some important properties
    8.6.4.1 UART initialization and configuration
    8.6.4.2 UART baud rate generation
    8.6.4.3 UART transmit enable and data transmit operation
    8.6.4.4 UART receive enable and data receive operation
    8.6.4.5 UART errors detection
    8.6.5 UART modem handshake serial communication mode
    8.6.6 eUSCI_A module for UART control signals and GPIO pins
    8.6.7 Develop an example eUSCI_A2 UART mode project
    8.6.7.1 Initialize and configure the UART-related GPIO ports and pins
    8.6.7.2 Initialize and configure clock source and baud rate for the UART module
    8.6.7.3 Initialize and configure the eUSCI_A2 for UART mode
    8.6.7.4 Build an example UART module project
    8.6.7.5 A practical example URAT lab project with two UART modes
    8.6.8 UART API functions provided by the MSPWare Peripheral Driver Library
    8.6.8.1 UART initialization and configuration API functions
    8.6.8.2 UART control and status API functions
    8.6.8.3 UART send and receive data API functions
    8.6.8.4 UART interrupt handling API functions
    8.7 Summary
    Chapter 9 MSP432™ 16-bit timers and PWM modules
    9.1 Overview
    9.2 Timer_A architecture and functional block diagram
    9.3 Timer_A modules operations
    9.3.1 Timer_A module control
    9.3.2 Timer_A module operation modes
    9.3.2.1 Continuous mode
    9.3.2.2 Up-count mode
    9.3.2.3 Up/down-count mode
    9.3.2.4 Capture/compare control block
    9.3.3 Output examples of using three operational modes
    9.3.3.1 Output implementations for Timer_A module in the up-count mode
    9.3.3.2 Output implementations for Timer_A module in the continuous mode
    9.3.3.3 Output implementations for Timer_A module in the up–down-count mode
    9.3.3.4 Timer_A interrupt processing
    9.3.4 Implementations of the Timer_A modules
    9.3.4.1 Input edge-count mode
    9.3.4.2 Input edge-time mode
    9.3.4.3 PWM mode
    9.3.5 Timer_A module GPIO-related control signals
    9.3.6 Build example Timer_A module projects
    9.3.7 Popular implementations on Timer_A modules
    9.3.7.1 Input edge-count implementations
    9.3.7.2 Input edge-time implementations
    9.3.7.3 PWM implementations
    9.3.8 API functions used for Timer_A module
    9.3.8.1 Timer_A module-related structs
    9.3.8.2 API functions for Timer_A module (TA0~TA3) CFGCTRL
    9.3.8.3 Timer_A module five capture/compare CFGCTRL API functions
    9.3.8.4 API functions used for Clock System Configuration and Control
    9.3.8.5 Implementation of using Timer_A API functions to measure PWM pulses
    9.4 Summary
    Chapter 10 MSP432 32-bit timers and watchdog timer
    10.1 Overview
    10.2 MSP432 Timer32 modules
    10.2.1 Architecture and function block diagram of the Timer32 module
    10.2.2 Operations of the Timer32 modules
    10.2.3 Mappings among the Timer32 registers and programming macros
    10.2.4 An example Timer32 module application project
    10.2.5 API functions used for Timer32 timers in the MSPWare driver library
    10.2.5.1 API functions used to initialize and configure Timer32 module
    10.2.5.2 API functions used to check the working status of the Timer32 module
    10.2.5.3 API functions used to configure and handle interrupts of the Timer32 module
    10.3 MSP432 watchdog timer
    10.3.1 Two operational modes of the watchdog timer
    10.3.1.1 Watchdog timer mode
    10.3.1.2 Interval timer mode
    10.3.2 Architecture and functional block diagram of the WDT_A module
    10.3.3 Watchdog timer-related interrupts and flags
    10.3.4 Watchdog timer operation in different power modes
    10.3.5 Mappings among the WDT_A bit values and programming macros
    10.3.6 Build an example watchdog timer project
    10.3.7 API functions used for WDT_A timer in the mspware driver library
    10.3.7.1 API functions used to initialize and configure the WDT_A module
    10.3.7.2 API functions used to operate the WDT_A module
    10.3.7.3 API functions used to configure and handle interrupts of the WDT_A module
    10.3.7.4 System control-related API functions used to set up the reset types
    10.3.7.5 Build an example WDT_A project with API functions
    10.4 Summary
    Chapter 11 MSP432™ floating-point unit (FPU)
    11.1 Overview
    11.2 Three types of the floating-point data
    11.2.1 Half-precision floating-point data
    11.2.2 Single-precision floating-point data
    11.2.3 Double-precision floating-point data
    11.3 FPU in the Cortex®-M4 MCU
    11.3.1 Architecture of the floating-point registers
    11.3.2 FPU operational modes
    11.4 Implementing the FPU
    11.4.1 Floating-point support in CMSIS-Core
    11.4.2 Floating-point programming in the MSP432P401R MCU system
    11.4.2.1 FPU in the DRA model
    11.4.2.2 FPU in the SD model
    11.4.3 A FPU example project using the DRA model
    11.5 Summary
    Chapter 12 MSP432™ memory protection unit (MPU)
    12.1 Overview
    12.2 Implementation of the MPU
    12.2.1 Memory regions, types, and attributes
    12.2.2 MPU Configuration and Control Registers
    12.2.2.1 MPU type register (MPUTYPE)
    12.2.2.2 MPU control register (MPUCTRL)
    12.2.2.3 MPU region number register (MPUNUMBER)
    12.2.2.4 MPU region base address register (MPUBASE)
    12.2.2.5 MPU region attribute and size register (MPUATTR)
    12.3 Initialization and configuration of the MPU
    12.4 Building a practical example MPU project
    12.4.1 Create a new DRA model MPU project DRAMPU
    12.4.2 Set up the environment to build and run the project
    12.5 API functions provided by the MSPWare Peripheral Driver Library
    12.5.1 MPU setup and status API functions
    12.5.1.1 API function MPU_setRegion()
    12.5.2 MPU module enable and disable API functions
    12.5.3 MPU interrupt handler control API functions
    12.6 Summary
    Appendix A: Download and install Keil MDK-ARM 5.15 IDE and MSP432 DFP
    Appendix B: Download and install MSPWare software package
    Appendix C: MSP432P401R-based EVB hardware setup
    Appendix D: The CMSIS core-specific intrinsic functions
    Index
    Microcontroller Engineering with MSP432 Fundamentals and Applications
    Microcontroller Engineering with MSP432 Fundamentals and Applications Ying Bai
    CRC Press Taylor & Francis Group 6000 Broken Sound Parkway NW, Suite 300 Boca Raton, FL 33487-2742 © 2017 by Taylor & Francis Group, LLC CRC Press is an imprint of Taylor & Francis Group, an Informa business No claim to original U.S. Government works Printed on acid-free paper Version Date: 20160916 International Standard Book Number-13: 978-1-4987-7298-3 (Hardback) This book contains information obtained from authentic and highly regarded sources. Reasonable efforts have been made to publish reliable data and information, but the author and publisher cannot assume responsibility for the validity of all materials or the consequences of their use. The authors and publishers have attempted to trace the copyright holders of all material reproduced in this publication and apologize to copyright holders if permission to publish in this form has not been obtained. If any copyright material has not been acknowledged please write and let us know so we may rectify in any future reprint. Except as permitted under U.S. Copyright Law, no part of this book may be reprinted, reproduced, transmitted, or utilized in any form by any electronic, mechanical, or other means, now known or hereafter invented, including photocopying, microfilming, and recording, or in any information storage or retrieval system, without written permission from the publishers. to photocopy or use material electronically from For permission this work, please access www.copyright.com (http://www.copyright.com/) or contact the Copyright Clearance Center, Inc. (CCC), 222 Rosewood Drive, Danvers, MA 01923, 978-750-8400. CCC is a not-for-profit organization that provides licenses and registration for a variety of users. For organizations that have been granted a photocopy license by the CCC, a separate system of payment has been arranged. Trademark Notice: Product or corporate names may be trademarks or registered trademarks, and are used only for identification and explanation without intent to infringe. Library of Congress Cataloging-in-Publication Data Names: Bai, Ying, 1956- author. Title: Microcontroller engineering with MSP432 : fundamentals and applications / author, Ying Bai. Description: Boca Raton : Taylor & Francis, CRC Press, 2017. | Includes bibliographical references and index. Identifiers: LCCN 2016020120 | ISBN 9781498772983 (alk. paper) Subjects: LCSH: Microcontrollers. | Automatic control. | Texas Instruments MSP430 series microprocessors. Classification: LCC TJ223.M53 B345 2017 | DDC 006.2/2--dc23 LC record available at https://lccn.loc.gov/2016020120 Visit the Taylor & Francis Web site at http://www.taylorandfrancis.com and the CRC Press Web site at http://www.crcpress.com
    This book is dedicated to my wife, Yan Wang, and my daughter, Susan (Xue) Bai.
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