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stanford course ee316.pdf

发布时间：2022-06-09 发布人：admin 分类：说明书 资料大小：2.07M 资料格式：pdf 举报 版权申诉
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    1
    Go register in the class website. I will close the self-registration after 2 weeks. Website is in operation as of today. 2
    The best way to find me is to send email to me or Fely Barrera to set up an appointment. The phone is not very effective because I talk with students in my office most of the time and I won’t pick up the phone when I am talking to students. The TA office hours are supposed to be accessible to most students. If you have difficulty coming to the TA office hours, please let the TA or me know and we can make arrangements. 3
    I work on device physics and device technology. Of the 16 years at IBM Research, 13 years were on Si CMOS and 3 years were on nanotechnology. I worked on image sensors, device modeling, double- gate/multi-gate MOSFET, strained silicon, thin body SOI, Ge FET, carbon nanotube FET, phase change memory, among other things. I managed the team that explore technology options for future technology nodes. I contributed to the chips that are in the Cell Processors in Xbox, Wii, and PS2. At Stanford, my students continue to work on CMOS topics. Right now, we are focusing on device performance estimation for future technology nodes, modeling of parasitic capacitances, alternative channel materials such as III-V compound semiconductor for the transistor channel. For research on nanotechnology that aspires to “replace” or complement Si CMOS, it is important to have a solid understanding of what Si CMOS has to offer so there is a baseline for comparison. Understanding the problems of Si CMOS is the “proving ground” for novel technologies. 4
    Your TA’s are very knowledgeable students. I pick them for their knowledge and expertise and their ability to interact with students. Yi (Alice) Wu is a 3rd year graduate student. She had presented papers at major conference such as the IEDM and has published papers at the most respected journals such as the IEEE Trans. Electron Device Letters. She has been working on exploratory memory devices. 5
    The course objectives are listed here. These are the kinds of things that people expect you to know when you work as a device engineer in a semiconductor company. These are also the skill you will find useful if you are a circuit designer or a materials person because they help you gain a better understanding of how device properties will affect circuit performance (on the application side) and materials (in terms of what material properties would be useful for devices). If you are a professor who claims to know devices, then of course you should know the materials in this class. 6
    Since this is a class, we need to have some metrics for grading. The mid-term exam is open book, open notes, open everything. You will do the exam in a 24 hour period. Past experience indicate that if the exam period is long, students spent way too much time on the exam and it is not worth your time to work on an exam for several days. I announce this date ahead of time so you can plan your activities around it so you can have time for the mid-term exam. 7
    We would like to post the homework solutions soon after the homework is collected so you can see the solutions while your memory is fresh. Late homework prevents us from posting the solutions. 8
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